diff options
| author | Tzung-Bi Shih <tzungbi@chromium.org> | 2021-04-08 18:20:05 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-04-09 05:38:46 +0000 |
| commit | 8e1c9f34df52d1cbf615203435b185a5337845cf (patch) | |
| tree | 06fef54088fdd6a7ea9e7504d5a7cffdbb39338f | |
| parent | 0e30ce3e8d5ca8cca02173a32ad3f5b370153b36 (diff) | |
| download | chrome-ec-8e1c9f34df52d1cbf615203435b185a5337845cf.tar.gz | |
mtscp-rv32i: move mpu settings from board to baseboard
BRANCH=none
BUG=b:184793035
TEST=make BOARD=asurada_scp && make BOARD=cherry_scp
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: I3d9406bf15275a0423cdf2b9ca5ea1b2ea96f7df
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2814478
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
| -rw-r--r-- | baseboard/mtscp-rv32i/baseboard.c (renamed from board/cherry_scp/board.c) | 8 | ||||
| -rw-r--r-- | baseboard/mtscp-rv32i/build.mk | 1 | ||||
| -rw-r--r-- | board/asurada_scp/board.c | 23 | ||||
| -rw-r--r-- | board/asurada_scp/build.mk | 2 | ||||
| -rw-r--r-- | board/cherry_scp/build.mk | 2 |
5 files changed, 6 insertions, 30 deletions
diff --git a/board/cherry_scp/board.c b/baseboard/mtscp-rv32i/baseboard.c index 330bc5e06a..cfc6353afe 100644 --- a/board/cherry_scp/board.c +++ b/baseboard/mtscp-rv32i/baseboard.c @@ -2,17 +2,19 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -/* Cherry SCP configuration */ +/* MT SCP RV32i configuration */ #include "cache.h" #include "csr.h" #include "registers.h" +#define SCP_SRAM_END (CONFIG_IPC_SHARED_OBJ_ADDR & (~(0x400 - 1))) + struct mpu_entry mpu_entries[NR_MPU_ENTRIES] = { /* SRAM (for most code, data) */ - {0, 0xbfc00, MPU_ATTR_C | MPU_ATTR_W | MPU_ATTR_R}, + {0, SCP_SRAM_END, MPU_ATTR_C | MPU_ATTR_W | MPU_ATTR_R}, /* SRAM (for IPI shared buffer) */ - {0xbfc00, 0xc0000, MPU_ATTR_W | MPU_ATTR_R}, + {SCP_SRAM_END, SCP_FW_END, MPU_ATTR_W | MPU_ATTR_R}, /* For AP domain */ {0x60000000, 0x70000000, MPU_ATTR_W | MPU_ATTR_R}, /* For SCP sys */ diff --git a/baseboard/mtscp-rv32i/build.mk b/baseboard/mtscp-rv32i/build.mk index 5835fa2909..420a3a4e08 100644 --- a/baseboard/mtscp-rv32i/build.mk +++ b/baseboard/mtscp-rv32i/build.mk @@ -5,6 +5,7 @@ # # Baseboard specific files build # +baseboard-y+=baseboard.o baseboard-$(HAS_TASK_VDEC_SERVICE)+=vdec.o baseboard-$(HAS_TASK_VENC_SERVICE)+=venc.o diff --git a/board/asurada_scp/board.c b/board/asurada_scp/board.c deleted file mode 100644 index 566c20387e..0000000000 --- a/board/asurada_scp/board.c +++ /dev/null @@ -1,23 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Asurada SCP configuration */ - -#include "cache.h" -#include "csr.h" -#include "registers.h" - -struct mpu_entry mpu_entries[NR_MPU_ENTRIES] = { - /* SRAM (for most code, data) */ - {0, 0x0ffc00, MPU_ATTR_C | MPU_ATTR_W | MPU_ATTR_R}, - /* SRAM (for IPI shared buffer) */ - {0x0ffc00, 0x100000, MPU_ATTR_W | MPU_ATTR_R}, - /* For AP domain */ - {0x60000000, 0x70000000, MPU_ATTR_W | MPU_ATTR_R}, - /* For SCP sys */ - {0x70000000, 0x80000000, MPU_ATTR_W | MPU_ATTR_R}, - {0x10000000, 0x11400000, MPU_ATTR_W | MPU_ATTR_R}, -}; - -#include "gpio_list.h" diff --git a/board/asurada_scp/build.mk b/board/asurada_scp/build.mk index 1095ad66d3..1040ffe553 100644 --- a/board/asurada_scp/build.mk +++ b/board/asurada_scp/build.mk @@ -9,5 +9,3 @@ CHIP:=mt8192_scp CHIP_VARIANT:=mt8192 BASEBOARD:=mtscp-rv32i - -board-y=board.o diff --git a/board/cherry_scp/build.mk b/board/cherry_scp/build.mk index 7f47a6e709..85f3ca810c 100644 --- a/board/cherry_scp/build.mk +++ b/board/cherry_scp/build.mk @@ -9,5 +9,3 @@ CHIP:=mt8192_scp CHIP_VARIANT:=mt8192 BASEBOARD:=mtscp-rv32i - -board-y=board.o |