volteer: enable espi and power sequencing

Add configurations for everything on platform/ec branch, and enable
power sequencing for volteer.

BUG=b:171312361
TEST=https://screenshot.googleplex.com/4m6N6vd2Nx5FpiD.png

Cq-Depend: chromium:2548308
Change-Id: I2332ceb2df388fce2efb661e66ca275b0db0545d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/zephyr-chrome/+/2548320
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2630147
Reviewed-by: Simon Glass <sjg@chromium.org>

5 files changed, 77 insertions, 3 deletions

diff --git a/zephyr/projects/volteer/CMakeLists.txt b/zephyr/projects/volteer/CMakeLists.txt
index 3ab1f87b81..45b1e5300f 100644
--- a/zephyr/projects/volteer/CMakeLists.txt
+++ b/zephyr/projects/volteer/CMakeLists.txt
@@ -12,3 +12,4 @@ project(volteer)
 
 # Include board specific header files
 zephyr_include_directories(include)
+target_sources(app PRIVATE "src/pwrok_signals.c")
diff --git a/zephyr/projects/volteer/include/gpio_map.h b/zephyr/projects/volteer/include/gpio_map.h
index f6639ae03f..cab599a7ef 100644
--- a/zephyr/projects/volteer/include/gpio_map.h
+++ b/zephyr/projects/volteer/include/gpio_map.h
@@ -23,9 +23,11 @@
  */
 #define GPIO_AC_PRESENT            NAMED_GPIO(acok_od)
 #define GPIO_CPU_PROCHOT           NAMED_GPIO(ec_prochot_odl)
+#define GPIO_EC_PCH_SYS_PWROK      NAMED_GPIO(ec_pch_sys_pwrok)
 #define GPIO_EN_PP3300_A           NAMED_GPIO(en_pp3300_a)
 #define GPIO_EN_PP5000             NAMED_GPIO(en_pp5000_a)
 #define GPIO_EN_PP5000_A           NAMED_GPIO(en_pp5000_a)
+#define GPIO_EN_PPVAR_VCCIN        NAMED_GPIO(en_ppvar_vccin)
 #define GPIO_LID_OPEN              NAMED_GPIO(ec_lid_open)
 #define GPIO_PCH_DSW_PWROK         NAMED_GPIO(ec_pch_dsw_pwrok)
 #define GPIO_PCH_PWRBTN_L          NAMED_GPIO(ec_pch_pwr_btn_odl)
@@ -60,6 +62,18 @@
 #define EC_CROS_GPIO_INTERRUPTS                                           \
 	GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) \
 	GPIO_INT(GPIO_LID_OPEN, GPIO_INT_EDGE_BOTH, lid_interrupt)        \
+	GPIO_INT(GPIO_PCH_SLP_S0_L, GPIO_INT_EDGE_BOTH,                   \
+		 power_signal_interrupt)                                  \
+	GPIO_INT(GPIO_PCH_SLP_S3_L, GPIO_INT_EDGE_BOTH,                   \
+		 power_signal_interrupt)                                  \
+	GPIO_INT(GPIO_PCH_SLP_SUS_L, GPIO_INT_EDGE_BOTH,                  \
+		 power_signal_interrupt)                                  \
+	GPIO_INT(GPIO_PG_EC_RSMRST_ODL, GPIO_INT_EDGE_BOTH,               \
+		 power_signal_interrupt)                                  \
+	GPIO_INT(GPIO_PCH_DSW_PWROK, GPIO_INT_EDGE_BOTH,                  \
+		 power_signal_interrupt)                                  \
+	GPIO_INT(GPIO_PG_EC_ALL_SYS_PWRGD, GPIO_INT_EDGE_BOTH,            \
+		 power_signal_interrupt)                                  \
 	GPIO_INT(GPIO_POWER_BUTTON_L, GPIO_INT_EDGE_BOTH,                 \
 		 power_button_interrupt)
 
diff --git a/zephyr/projects/volteer/include/shimmed_tasks.h b/zephyr/projects/volteer/include/shimmed_tasks.h
index d20fe1f74e..4011dae64c 100644
--- a/zephyr/projects/volteer/include/shimmed_tasks.h
+++ b/zephyr/projects/volteer/include/shimmed_tasks.h
@@ -10,15 +10,19 @@
  * Manually define these HAS_TASK_* defines. There is a build time assert
  * to at least verify we have the minimum set defined correctly.
  */
+#define HAS_TASK_CHIPSET 1
 #define HAS_TASK_HOSTCMD 1
 #define HAS_TASK_KEYPROTO 1
+#define HAS_TASK_POWERBTN 1
 
 /*
  * Highest priority on bottom -- same as in platform/ec. List of CROS_EC_TASK
  * items. See CONFIG_TASK_LIST in platform/ec's config.h for more informaiton
  */
-#define CROS_EC_TASK_LIST                                \
-	CROS_EC_TASK(HOSTCMD, host_command_task, 0, 512) \
-	CROS_EC_TASK(KEYPROTO, keyboard_protocol_task, 0, 512)
+#define CROS_EC_TASK_LIST                                      \
+	CROS_EC_TASK(CHIPSET, chipset_task, 0, 512)            \
+	CROS_EC_TASK(HOSTCMD, host_command_task, 0, 512)       \
+	CROS_EC_TASK(KEYPROTO, keyboard_protocol_task, 0, 512) \
+	CROS_EC_TASK(POWERBTN, power_button_task, 0, 512)
 
 #endif /* __CROS_EC_SHIMMED_TASKS_H */
diff --git a/zephyr/projects/volteer/prj.conf b/zephyr/projects/volteer/prj.conf
index 0dcebfcb10..6d67a06c7c 100644
--- a/zephyr/projects/volteer/prj.conf
+++ b/zephyr/projects/volteer/prj.conf
@@ -4,6 +4,10 @@ CONFIG_CROS_EC=y
 CONFIG_AP=y
 CONFIG_AP_X86_INTEL_TGL=y
 
+# eSPI
+CONFIG_ESPI=y
+CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y
+
 # TODO(b/161470456): can we remove the below when zmake generates it?
 CONFIG_CROS_EC_RO=y
 CONFIG_PLATFORM_EC=y
@@ -12,3 +16,7 @@ CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y
 CONFIG_PLATFORM_EC_KEYBOARD=y
 CONFIG_PLATFORM_EC_LID_SWITCH=y
 CONFIG_PLATFORM_EC_POWER_BUTTON=y
+
+# Power Sequencing
+CONFIG_PLATFORM_EC_POWERSEQ=y
+CONFIG_PLATFORM_EC_POWERSEQ_RTC_RESET=y
diff --git a/zephyr/projects/volteer/src/pwrok_signals.c b/zephyr/projects/volteer/src/pwrok_signals.c
new file mode 100644
index 0000000000..e551c383bb
--- /dev/null
+++ b/zephyr/projects/volteer/src/pwrok_signals.c
@@ -0,0 +1,47 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* PWROK signals lists.  Copied from volteer baseboard in platform/ec. */
+
+#include <stdbool.h>
+#include <zephyr.h>
+
+#include "gpio_map.h"
+#include "gpio_signal.h"
+
+/*
+ * TODO(b:173798264): This struct actually comes from
+ * power/intel_x86.h in platform/ec, but we have no way to reach it right
+ * now.  Remove this once we can get that header somehow.
+ */
+struct intel_x86_pwrok_signal {
+	enum gpio_signal gpio;
+	bool active_low;
+	int delay_ms;
+};
+
+const struct intel_x86_pwrok_signal pwrok_signal_assert_list[] = {
+	{
+		.gpio = GPIO_EN_PPVAR_VCCIN,
+		.delay_ms = 5,
+	},
+	{
+		.gpio = GPIO_EC_PCH_SYS_PWROK,
+		.delay_ms = 50 - 5,
+	},
+};
+const int pwrok_signal_assert_count = ARRAY_SIZE(pwrok_signal_assert_list);
+
+const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[] = {
+	/* No delays needed during S0 exit */
+	{
+		.gpio = GPIO_EC_PCH_SYS_PWROK,
+	},
+	/* Turn off VCCIN last */
+	{
+		.gpio = GPIO_EN_PPVAR_VCCIN,
+	},
+};
+const int pwrok_signal_deassert_count = ARRAY_SIZE(pwrok_signal_deassert_list);