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authorDino Li <Dino.Li@ite.com.tw>2020-06-18 18:05:47 +0800
committerCommit Bot <commit-bot@chromium.org>2020-06-23 10:26:01 +0000
commit9d023ddf326119aa37947d3f743473159ee85244 (patch)
treeb23e8f33a4d892a3bf4eb38bb97ef26f76a73423
parentfb16c5a5a9fd4320eb54ac3463a72d2320989e75 (diff)
downloadchrome-ec-9d023ddf326119aa37947d3f743473159ee85244.tar.gz
it83xx: add option to reset PD contract in power-on reset
This CL allows to reset PD contract in power-on reset. It applies to situation of EC's VBAT won't go low when system's power isn't presented. BUG=b:154670981 BRANCH=none TEST=PD contract gets cleared when power-on reset even VBAT keeps high Change-Id: I2c8d185725542bb77fadfe6cb0497e0aace8aee2 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2208343 Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r--chip/it83xx/system.c7
-rw-r--r--include/config.h11
2 files changed, 18 insertions, 0 deletions
diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c
index 77e8c75746..a42134e0d4 100644
--- a/chip/it83xx/system.c
+++ b/chip/it83xx/system.c
@@ -72,6 +72,13 @@ static void check_reset_cause(void)
chip_save_reset_flags(0);
system_set_reset_flags(flags);
+
+ /* Clear PD contract recorded in bram if this is a power-on reset. */
+ if (IS_ENABLED(CONFIG_IT83XX_RESET_PD_CONTRACT_IN_BRAM) &&
+ (flags == (EC_RESET_FLAG_POWER_ON | EC_RESET_FLAG_RESET_PIN))) {
+ for (int i = 0; i < MAX_SYSTEM_BBRAM_IDX_PD_PORTS; i++)
+ system_set_bbram((SYSTEM_BBRAM_IDX_PD0 + i), 0);
+ }
}
static void system_reset_cause_is_unknown(void)
diff --git a/include/config.h b/include/config.h
index cd09eed545..52807501a7 100644
--- a/include/config.h
+++ b/include/config.h
@@ -2339,6 +2339,17 @@
*/
#undef CONFIG_IT83XX_FLASH_CLOCK_48MHZ
+/*
+ * Enable it if EC's VBAT won't go low when system's power isn't
+ * presented (no battery and no AC)
+ * If EC's VSTBY and VBAT(power source of BRAM) aren't connected to the same
+ * power rail and VBAT doesn't go low immediately (eg: there is a larger
+ * capacitance on the rail) after all power off: PD contract recorded in BRAM
+ * won't get cleared (But actually we have unplugged type-c adaptor, so the
+ * contract should be cleared).
+ */
+#undef CONFIG_IT83XX_RESET_PD_CONTRACT_IN_BRAM
+
/* To define it, if I2C channel C and PECI used at the same time. */
#undef CONFIG_IT83XX_SMCLK2_ON_GPC7