diff options
author | Keith Short <keithshort@chromium.org> | 2020-05-08 17:33:47 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-05-09 04:42:48 +0000 |
commit | 778245d7f970a3d6be7d7f29e69172450f0783ed (patch) | |
tree | a21e20140b43b299dfab9c71679267e6c0359492 | |
parent | 4b38876725070d564ea784f08aa1f1c816230849 (diff) | |
download | chrome-ec-778245d7f970a3d6be7d7f29e69172450f0783ed.tar.gz |
volteer: set H1 packet mode GPIO low
GPIO75 on board version 1 is used for H1 packet mode and must be
initialized low.
This change disables the VOLUME_UP button on board version 0.
BUG=b:156117916
BRANCH=none
TEST=make buildall
TEST=verify EC console is not read only.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I58d70e833027a9bdb8d4f2463567820c2de1b590
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191295
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
-rw-r--r-- | baseboard/volteer/baseboard.h | 1 | ||||
-rw-r--r-- | board/trondo/board.h | 5 | ||||
-rw-r--r-- | board/volteer/board.c | 5 | ||||
-rw-r--r-- | board/volteer/board.h | 1 | ||||
-rw-r--r-- | board/volteer/gpio.inc | 9 |
5 files changed, 9 insertions, 12 deletions
diff --git a/baseboard/volteer/baseboard.h b/baseboard/volteer/baseboard.h index f68fc431f6..a0fbc93568 100644 --- a/baseboard/volteer/baseboard.h +++ b/baseboard/volteer/baseboard.h @@ -32,7 +32,6 @@ #define CONFIG_VSTORE #define CONFIG_VSTORE_SLOT_COUNT 1 #define CONFIG_VOLUME_BUTTONS -#define CONFIG_BUTTONS_RUNTIME_CONFIG #define CONFIG_LOW_POWER_IDLE /* Host communication */ diff --git a/board/trondo/board.h b/board/trondo/board.h index 4e386d1a46..1cbdb7bf0f 100644 --- a/board/trondo/board.h +++ b/board/trondo/board.h @@ -69,6 +69,11 @@ /* BC 1.2 */ /* Volume Button feature */ +/* + * TODO (b/149858568): remove CONFIG_BUTTONS_RUNTIME_CONFIG once board ID=0 + * support is stripped. + */ +#define CONFIG_BUTTONS_RUNTIME_CONFIG /* Fan features */ diff --git a/board/volteer/board.c b/board/volteer/board.c index 4f0e0ef6be..76b1aefff1 100644 --- a/board/volteer/board.c +++ b/board/volteer/board.c @@ -44,15 +44,12 @@ __override void config_volteer_gpios(void) /* Legacy support for the first board build */ if (get_board_id() == 0) { CPRINTS("Configuring GPIOs for board ID 0"); + CPRINTS("VOLUME_UP button disabled"); /* Reassign USB_C1_RT_RST_ODL */ bb_controls[USBC_PORT_C1].retimer_rst_gpio = GPIO_USB_C1_RT_RST_ODL_BOARDID_0; ps8xxx_rst_odl = GPIO_USB_C1_RT_RST_ODL_BOARDID_0; - - /* Reassign EC_VOLUP_BTN_ODL */ - button_reassign_gpio(BUTTON_VOLUME_UP, - GPIO_EC_VOLUP_BTN_ODL_BOARDID_0); } } diff --git a/board/volteer/board.h b/board/volteer/board.h index 52e36fc308..1053af0a7c 100644 --- a/board/volteer/board.h +++ b/board/volteer/board.h @@ -84,6 +84,7 @@ #define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW #define GPIO_LID_OPEN GPIO_EC_LID_OPEN #define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV +#define GPIO_PACKET_MODE_EN GPIO_UART2_EC_RX #define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL #define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL #define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL diff --git a/board/volteer/gpio.inc b/board/volteer/gpio.inc index 111e125225..56c3caadfb 100644 --- a/board/volteer/gpio.inc +++ b/board/volteer/gpio.inc @@ -49,13 +49,6 @@ GPIO_INT(USB_C1_MIX_INT_ODL, PIN(0, 3), GPIO_INT_BOTH, bc12_interrupt) /* Volume button interrupts */ GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -/* - * EC_VOLUP_BTN_ODL moved from GPIO75 to GPIO97 on boards with board ID >=1. - * GPIO97/EN_PP1050_BYPASS is DNS on board ID 0, and GPIO75 will be used once - * EFS support is added. - * TODO (b/149858568): remove board ID=0 support. - */ -GPIO_INT(EC_VOLUP_BTN_ODL_BOARDID_0, PIN(7, 5), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) /* Power Sequencing Signals */ @@ -118,6 +111,8 @@ UNIMPLEMENTED(USB_C1_LS_EN) UNIMPLEMENTED(USB_C1_RT_FORCE_PWR) /* Misc Signals */ +GPIO(UART2_EC_RX, PIN(7, 5), GPIO_OUT_LOW) /* H1 Packet Mode */ + /* * eDP backlight - both PCH and EC have enable pins that must be high |