cr50: add support for using a strap pin as a ccd gpio

This change introduces a mechanism which allows to use one of board
strap pins as the CCD gpio and makes DIOA9 the CCD pin on boards with
strap os 0xE.

This change uses 2 bits from the board properties to determine which pin
is used as the ccd gpio.
    0 - no ccd gpio
    1 - DIOA1
    2 - DIOA9
    3 - DIOA12
DIOA6 is another strap pin, but there's only one valid strap with a 5kPU
left, so I decided not to use another board property bit to support it
as a possible ccd gpio. I want to save the board property bit, since
we're running out of them and there are so many other I2C straps boards
can use. We can add it later if we need to.

BUG=b:147812066
BRANCH=cr50
TEST=manual. Use pinmux and gpiocfg to verify the output is only enabled
when the gpio is asserted.
     no added brdproperties - nothing is different with pinmux

     run on Puff
     	gpioset CCD_REC_LID_SWITCH 0
	EC shows recovery button pressed
     	gpioset CCD_REC_LID_SWITCH 0
	EC shows recovery button released

     add BOARD_CCD_REC_LID_PIN_DIOA1 to SPI board
     	pinmux output adds
	DIOA1 27  IN GPIO1_GPIO10
	GPIO1_GPIO10 24  DIOA1

        gpioset CCD_REC_LID_SWITCH 0
	gpiocfg shows "GPIO1_GPIO10: read 0 drive 0"
        gpioset CCD_REC_LID_SWITCH 1
	gpiocfg doesn't show GPIO1_GPIO10 as an output

     add BOARD_CCD_REC_LID_PIN_DIOA9 to SPI board
     	pinmux output adds
	DIOA9 27  IN GPIO1_GPIO10
	GPIO1_GPIO10 16  DIOA9

        gpioset CCD_REC_LID_SWITCH 0
	gpiocfg shows "GPIO1_GPIO10: read 0 drive 0"
        gpioset CCD_REC_LID_SWITCH 1
	gpiocfg doesn't show GPIO1_GPIO10 as an output

     add BOARD_CCD_REC_LID_PIN_DIOA12 to I2C board
     	pinmux output adds
	DIOA12 27  IN GPIO1_GPIO10
	GPIO1_GPIO10 13  DIOA12

        gpioset CCD_REC_LID_SWITCH 0
	gpiocfg shows "GPIO1_GPIO10: read 0 drive 0"
        gpioset CCD_REC_LID_SWITCH 1
	gpiocfg doesn't show GPIO1_GPIO10 as an output

Change-Id: If74385135a572e7e5d0763fad9f5368fdec8d7a0
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2006210
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>

3 files changed, 47 insertions, 1 deletions

diff --git a/board/cr50/board.c b/board/cr50/board.c
index 2463534167..e61f9be991 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -186,6 +186,11 @@ int board_has_ec_cr50_comm_support(void)
 	return !!(board_properties & BOARD_EC_CR50_COMM_SUPPORT);
 }
 
+int board_get_ccd_rec_lid_pin(void)
+{
+	return board_properties & BOARD_CCD_REC_LID_PIN_MASK;
+}
+
 /* Get header address of the backup RW copy. */
 const struct SignedHeader *get_other_rw_addr(void)
 {
@@ -303,7 +308,8 @@ static struct board_cfg board_cfg_table[] = {
 	{
 		.strap_cfg = 0x0E,
 		.board_properties = BOARD_SLAVE_CONFIG_SPI |
-			BOARD_USE_PLT_RESET | BOARD_EC_CR50_COMM_SUPPORT,
+			BOARD_USE_PLT_RESET | BOARD_EC_CR50_COMM_SUPPORT |
+			BOARD_CCD_REC_LID_PIN_DIOA9,
 	},
 	/* Zork: DIOA12 = 5K PU, DIOA6 = 1M PU */
 	{
@@ -657,6 +663,27 @@ static void configure_board_specific_gpios(void)
 		/* Enable powerdown exit on DIOM0 */
 		GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 1);
 	}
+	/* Connect the correct pin to the lid open/recovery switch gpio. */
+	switch (board_get_ccd_rec_lid_pin()) {
+	case BOARD_CCD_REC_LID_PIN_DIOA1:
+		GWRITE(PINMUX, GPIO1_GPIO10_SEL, GC_PINMUX_DIOA1_SEL);
+		GWRITE(PINMUX, DIOA1_SEL, GC_PINMUX_GPIO1_GPIO10_SEL);
+		GWRITE_FIELD(PINMUX, DIOA1_CTL, IE, 1);
+		break;
+	case BOARD_CCD_REC_LID_PIN_DIOA9:
+		GWRITE(PINMUX, GPIO1_GPIO10_SEL, GC_PINMUX_DIOA9_SEL);
+		GWRITE(PINMUX, DIOA9_SEL, GC_PINMUX_GPIO1_GPIO10_SEL);
+		GWRITE_FIELD(PINMUX, DIOA9_CTL, IE, 1);
+		break;
+	case BOARD_CCD_REC_LID_PIN_DIOA12:
+		GWRITE(PINMUX, GPIO1_GPIO10_SEL, GC_PINMUX_DIOA12_SEL);
+		GWRITE(PINMUX, DIOA12_SEL, GC_PINMUX_GPIO1_GPIO10_SEL);
+		GWRITE_FIELD(PINMUX, DIOA12_CTL, IE, 1);
+		break;
+	default:
+		gpio_set_flags(GPIO_CCD_REC_LID_SWITCH, 0);
+		break;
+	}
 
 	if (board_uses_closed_source_set1())
 		closed_source_set1_configure_gpios();
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc
index 76d6adf0f1..2f2402aea3 100644
--- a/board/cr50/gpio.inc
+++ b/board/cr50/gpio.inc
@@ -69,6 +69,7 @@
  * GPIO1.4   detect_tpm_rst_asserted
  * GPIO1.5   unwedge_i2cs_scl
  * GPIO1.6   monitor_i2cs_sda
+ * GPIO1.10  rec_lid_switch
  * GPIO1.11  ec_tx_cr50_rx_in
  * GPIO1.12  strap_a0
  * GPIO1.13  strap_a1
@@ -153,6 +154,13 @@ GPIO(SPI_CS_L,        PIN(0, 9), GPIO_INPUT)
 /* Used during *chip* factory process. */
 GPIO(DIOB4,           PIN(0, 10), GPIO_INPUT | GPIO_PULL_DOWN)
 
+/*
+ * Used to assert lid open or recovery switch with ccd. This signal is
+ * guaranteed to have an external pull-up. The pin is connected to the gpio in
+ * board.c. If the gpio number changes, it needs to be updated in board.c.
+ */
+GPIO(CCD_REC_LID_SWITCH,   PIN(1, 10),  GPIO_ODR_HIGH | GPIO_INPUT)
+
 /* GPIOs used for Cr50 strapping options */
 GPIO(STRAP_A0,        PIN(1, 12), GPIO_INPUT)
 GPIO(STRAP_A1,        PIN(1, 13), GPIO_INPUT)
diff --git a/board/cr50/scratch_reg1.h b/board/cr50/scratch_reg1.h
index ac98d98883..2fedfc5fff 100644
--- a/board/cr50/scratch_reg1.h
+++ b/board/cr50/scratch_reg1.h
@@ -91,11 +91,22 @@
 #define BOARD_EC_CR50_COMM_SUPPORT        BIT(21)
 
 /*
+ * Bits to store which pin is used for the ccd recovery switch/lid open signal.
+ */
+#define BOARD_CCD_REC_LID_PIN_SHIFT       22
+#define BOARD_CCD_REC_LID_PIN_MASK        (3 << BOARD_CCD_REC_LID_PIN_SHIFT)
+#define BOARD_CCD_REC_LID_PIN_DIOA1       (1 << BOARD_CCD_REC_LID_PIN_SHIFT)
+#define BOARD_CCD_REC_LID_PIN_DIOA9       (2 << BOARD_CCD_REC_LID_PIN_SHIFT)
+#define BOARD_CCD_REC_LID_PIN_DIOA12      (3 << BOARD_CCD_REC_LID_PIN_SHIFT)
+
+
+/*
  * Macro to capture all properties related to board strapping pins. This must be
  * updated if additional strap related properties are added.
  */
 #define BOARD_ALL_PROPERTIES ( \
 	BOARD_ALLOW_CHANGE_TPM_MODE | \
+	BOARD_CCD_REC_LID_PIN_MASK | \
 	BOARD_CLOSED_LOOP_RESET | \
 	BOARD_CLOSED_SOURCE_SET1 | \
 	BOARD_DEEP_SLEEP_DISABLED | \