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authorVadim Bendebury <vbendeb@chromium.org>2020-01-13 08:47:51 +1100
committerCommit Bot <commit-bot@chromium.org>2020-01-13 19:34:01 +0000
commit6bfa838a0d5fd9498ac0c298bfb08b99b5fe4a7e (patch)
treea1235fddd97d2525edee17afda6061a8c88c560b
parentf15eb886693218bb2bd8891fef0c3500ab537e56 (diff)
downloadchrome-ec-6bfa838a0d5fd9498ac0c298bfb08b99b5fe4a7e.tar.gz
drop chip factory mode support
There is no need to keep the code supporting chip factory mode in Chrome OS production branches, this code is never used outside of the chip factory environment. BRANCH=cr50, cr50-mp BUG=none TEST=built an image, verified that an Atlas device boots up into the previously created Chrome OS account. Change-Id: If72635b014d15ef6e97fbc4fd5b54b61ec23299a Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1994369 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
-rw-r--r--board/cr50/board.c19
-rw-r--r--board/cr50/board.h3
-rw-r--r--chip/g/sps_tpm.c3
-rw-r--r--common/tpm_registers.c77
4 files changed, 21 insertions, 81 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c
index 4eeb21fc23..e3d46c9e8f 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -1352,11 +1352,6 @@ static uint32_t get_properties(void)
uint8_t config;
uint32_t properties;
- if (chip_factory_mode()) {
- CPRINTS("Chip factory mode, short circuit to SPI");
- return BOARD_SLAVE_CONFIG_SPI;
- }
-
#ifdef H1_RED_BOARD
CPRINTS("Unconditionally enabling SPI and platform reset");
return (BOARD_SLAVE_CONFIG_SPI | BOARD_USE_PLT_RESET);
@@ -1635,20 +1630,6 @@ static int command_board_properties(int argc, char **argv)
DECLARE_SAFE_CONSOLE_COMMAND(brdprop, command_board_properties,
NULL, "Display board properties");
-int chip_factory_mode(void)
-{
- static uint8_t mode_set;
-
- /*
- * Bit 0x2 used to indicate that mode has been set, bit 0x1 is the
- * actual indicator of the chip factory mode.
- */
- if (!mode_set)
- mode_set = 2 | !!gpio_get_level(GPIO_DIOB4);
-
- return mode_set & 1;
-}
-
#ifdef CR50_RELAXED
static int command_rollback(int argc, char **argv)
{
diff --git a/board/cr50/board.h b/board/cr50/board.h
index 5a8c02f453..12b2e72a1b 100644
--- a/board/cr50/board.h
+++ b/board/cr50/board.h
@@ -363,9 +363,6 @@ int board_nvmem_legacy_check_needed(void);
void set_ap_on(void);
-/* Returns True if chip is brought up in a factory test harness. */
-int chip_factory_mode(void);
-
/*
* Trigger generation of the ITE SYNC sequence on the way up after next
* reboot.
diff --git a/chip/g/sps_tpm.c b/chip/g/sps_tpm.c
index 3e504f16b1..a4775e70f6 100644
--- a/chip/g/sps_tpm.c
+++ b/chip/g/sps_tpm.c
@@ -193,9 +193,6 @@ static void process_rx_data(uint8_t *data, size_t data_size, int cs_deasserted)
static void tpm_rx_handler(uint8_t *data, size_t data_size, int cs_deasserted)
{
- if (chip_factory_mode())
- return; /* Ignore TPM traffic in factory mode. */
-
if ((sps_tpm_state == SPS_TPM_STATE_RECEIVING_HEADER) ||
(sps_tpm_state == SPS_TPM_STATE_RECEIVING_WRITE_DATA))
process_rx_data(data, data_size, cs_deasserted);
diff --git a/common/tpm_registers.c b/common/tpm_registers.c
index cd50c8574a..d2862d5814 100644
--- a/common/tpm_registers.c
+++ b/common/tpm_registers.c
@@ -557,13 +557,6 @@ void tpm_register_interface(interface_control_func interface_start,
static void tpm_init(void)
{
-#ifdef ENABLE_TPM
- /*
- * 0xc0 Means successful endorsement. Actual endorsement reasult code
- * is added in lower bits to indicate endorsement failure, if any.
- */
- uint8_t underrun_char = 0xc0;
-#endif
/* This is more related to TPM task activity than TPM transactions */
cprints(CC_TASK, "%s", __func__);
@@ -616,18 +609,7 @@ static void tpm_init(void)
ccprints("Endorsement %s",
(endorse_result == mnf_success) ?
"succeeded" : "failed");
-
- if (chip_factory_mode()) {
- underrun_char |= endorse_result;
-
- ccprints("Setting underrun character to 0x%x",
- underrun_char);
- sps_tx_status(underrun_char);
- }
} else {
- if (chip_factory_mode())
- sps_tx_status(underrun_char | mnf_manufactured);
-
_plat__SetNvAvail();
}
#endif
@@ -832,9 +814,7 @@ void tpm_reinstate_nvmem_commits(void)
static void tpm_reset_now(int wipe_first)
{
- /* TPM is not running in factory mode. */
- if (!chip_factory_mode())
- if_stop();
+ if_stop();
/* This is more related to TPM task activity than TPM transactions */
cprints(CC_TASK, "%s(%d)", __func__, wipe_first);
@@ -865,12 +845,8 @@ static void tpm_reset_now(int wipe_first)
(uintptr_t)(&__bss_libtpm2_end) -
(uintptr_t)(&__bss_libtpm2_start));
- /*
- * Prevent NVRAM commits until further notice, unless running in
- * factory mode.
- */
- if (!chip_factory_mode())
- nvmem_disable_commits();
+ /* Prevent NVRAM commits until further notice. */
+ nvmem_disable_commits();
/* Re-initialize our registers */
tpm_init();
@@ -889,13 +865,7 @@ static void tpm_reset_now(int wipe_first)
*/
hook_call_deferred(&reinstate_nvmem_commits_data, 3 * SECOND);
- /*
- * In chip factory mode SPI idle byte sent on MISO is used for
- * progress reporting. TPM flow control messes it up, do not start TPM
- * in factory mode.
- */
- if (!chip_factory_mode())
- if_start();
+ if_start();
}
int tpm_sync_reset(int wipe_first)
@@ -916,34 +886,29 @@ void tpm_task(void *u)
{
uint32_t evt = 0;
- if (!chip_factory_mode()) {
+ /*
+ * Just in case there is a resume from deep sleep where AP is not out
+ * of reset, let's not proceed until AP is actually up.
+ */
+ while (!ap_is_on()) {
/*
- * Just in case there is a resume from deep sleep where AP is
- * not out of reset, let's not proceed until AP is actually
- * up. No need to worry about the AP state in chip factory
- * mode of course.
+ * The only events we should expect at this point would be the
+ * reset request or a command routed through TPM task context
+ * to make use of the large stack.
*/
- while (!ap_is_on()) {
+ evt = task_wait_event(-1);
+ if (evt & (TPM_EVENT_RESET | TPM_EVENT_ALT_EXTENSION)) {
/*
- * The only events we should expect at this point
- * would be the reset request or a command routed
- * through TPM task context to make use of the large
- * stack.
+ * No need to remember the reset request: tpm reset
+ * will happen as soon as we break out from this while
+ * loop.
*/
- evt = task_wait_event(-1);
- if (evt & (TPM_EVENT_RESET | TPM_EVENT_ALT_EXTENSION)) {
- /*
- * No need to remember the reset request: tpm
- * reset will happen as soon as we break out
- * from this while loop,
- */
- evt &= TPM_EVENT_ALT_EXTENSION;
- break;
- }
+ evt &= TPM_EVENT_ALT_EXTENSION;
+ break;
+ }
- cprints(CC_TASK, "%s:%d unexpected event %x",
+ cprints(CC_TASK, "%s:%d unexpected event %x",
__func__, __LINE__, evt);
- }
}
tpm_reset_now(0);