diff options
| author | Keith Short <keithshort@chromium.org> | 2019-10-08 13:41:29 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-10-15 20:35:42 +0000 |
| commit | 7cdce86b60b97e0916819c90ada0a3667f40c3d8 (patch) | |
| tree | 35fef41d2b6064cea53a627e1a80760e9fdbca0f | |
| parent | c6448a1a81aa86ef6d77a2667886a746d396d1b9 (diff) | |
| download | chrome-ec-7cdce86b60b97e0916819c90ada0a3667f40c3d8.tar.gz | |
icelake: Cleanup GPIO_PCH_DSW_PWROK
Change GPIO_EC_PCH_DSW_PWROK to GPIO_PCH_DSW_PWROK to match convention
for EC to PCH signals used by other Intel processors (specifically
cannonlake already used GPIO_PCH_DSW_PWROK).
BUG=none
BRANCH=none
TEST=buildall -j
Change-Id: I59fb8d3ee3867c70dde74c186ba3974490c3cd27
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1848252
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
| -rw-r--r-- | board/dragonegg/board.h | 15 | ||||
| -rw-r--r-- | board/tglrvpu_ite/board.h | 1 | ||||
| -rw-r--r-- | power/icelake.c | 6 |
3 files changed, 12 insertions, 10 deletions
diff --git a/board/dragonegg/board.h b/board/dragonegg/board.h index 59feb9dc4f..daf6f4c255 100644 --- a/board/dragonegg/board.h +++ b/board/dragonegg/board.h @@ -46,13 +46,14 @@ * then redefined here to so it's more clear which signal is being used for * which purpose. */ -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_RSMRST_L_PGOOD GPIO_PG_EC_RSMRST_ODL -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PCH_SLP_S4_L GPIO_SLP_S4_L +#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L +#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_AC_PRESENT GPIO_ACOK_OD +#define GPIO_RSMRST_L_PGOOD GPIO_PG_EC_RSMRST_ODL +#define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK +#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GPIO_PCH_SLP_S4_L GPIO_SLP_S4_L #ifndef __ASSEMBLER__ diff --git a/board/tglrvpu_ite/board.h b/board/tglrvpu_ite/board.h index bbc0aaecaa..9a050d2d5c 100644 --- a/board/tglrvpu_ite/board.h +++ b/board/tglrvpu_ite/board.h @@ -25,6 +25,7 @@ #define CONFIG_CHIPSET_TIGERLAKE #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD +#define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK /* Charger */ #define CONFIG_CHARGER_ISL9241 diff --git a/power/icelake.c b/power/icelake.c index 9480c54387..175a4269b3 100644 --- a/power/icelake.c +++ b/power/icelake.c @@ -68,7 +68,7 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason) gpio_set_level(GPIO_PCH_RSMRST_L, 0); /* Turn off DSW_PWROK to meet tPCH14 */ - gpio_set_level(GPIO_EC_PCH_DSW_PWROK, 0); + gpio_set_level(GPIO_PCH_DSW_PWROK, 0); /* Turn off DSW load switch. */ gpio_set_level(GPIO_EN_PP3300_A, 0); @@ -130,7 +130,7 @@ enum power_state power_handle_state(enum power_state state) * stable and the DSW_PWROK signal being passed to the PCH. */ msleep(10); - gpio_set_level(GPIO_EC_PCH_DSW_PWROK, dswpwrok_in); + gpio_set_level(GPIO_PCH_DSW_PWROK, dswpwrok_in); dswpwrok_out = dswpwrok_in; } @@ -164,7 +164,7 @@ enum power_state power_handle_state(enum power_state state) * stable and the DSW_PWROK signal being passed to the PCH. */ msleep(10); - gpio_set_level(GPIO_EC_PCH_DSW_PWROK, dswpwrok_in); + gpio_set_level(GPIO_PCH_DSW_PWROK, dswpwrok_in); CPRINTS("Pass thru GPIO_DSW_PWROK: %d", dswpwrok_in); dswpwrok_out = dswpwrok_in; |