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authorHu, Hebo <hebo.hu@intel.com>2019-04-11 11:41:14 +0800
committerchrome-bot <chrome-bot@chromium.org>2019-04-20 03:58:44 -0700
commit88c2046eaf7d4cd30958b644e41f4779752c2d4a (patch)
treeebabfb1c792f1a22f1c2b89f794df9e4c23589e6
parentafbb1b511cdf5ab36ce2f6969ac701322fe91517 (diff)
downloadchrome-ec-88c2046eaf7d4cd30958b644e41f4779752c2d4a.tar.gz
ish/ish5: fix high frequent wakeup issue in low power mode
on ish, need fw clean fabric agent error status, otherwise will cause ish wakeup immediately after entered low power mode. this operaion has no impact for other functions. BUG=b:130193448 BRANCH=none TEST=verified on arcada platform Change-Id: Iecd85d1ab037aafa988d6c32ad47b51003913198 Signed-off-by: Hu, Hebo <hebo.hu@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1563470 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Mathew King <mathewk@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Mathew King <mathewk@chromium.org> Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
-rw-r--r--chip/ish/i2c.c1
-rw-r--r--chip/ish/registers.h11
-rw-r--r--chip/ish/system.c15
-rw-r--r--core/minute-ia/interrupts.c1
4 files changed, 28 insertions, 0 deletions
diff --git a/chip/ish/i2c.c b/chip/ish/i2c.c
index 284a46a1cc..cecb81f40f 100644
--- a/chip/ish/i2c.c
+++ b/chip/ish/i2c.c
@@ -416,6 +416,7 @@ int chip_i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
}
}
+ i2c_intr_switch(ctx->base, DISABLE_INT);
i2c_mmio_write(ctx->base, IC_ENABLE, IC_ENABLE_DISABLE);
if (ctx->error_flag)
diff --git a/chip/ish/registers.h b/chip/ish/registers.h
index 84c6e901fc..13e4a7b7f8 100644
--- a/chip/ish/registers.h
+++ b/chip/ish/registers.h
@@ -51,6 +51,7 @@ enum ish_i2c_port {
/* HW interrupt pins mapped to IOAPIC, from I/O sources */
#define ISH_I2C0_IRQ 0
#define ISH_I2C1_IRQ 1
+#define ISH_FABRIC_IRQ 5
#define ISH_I2C2_IRQ 40
#define ISH_WDT_IRQ 6
#define ISH_GPIO_IRQ 7
@@ -115,6 +116,7 @@ enum ish_i2c_port {
#define ISH_D3_FALL_VEC IRQ_TO_VEC(ISH_D3_FALL_IRQ)
#define ISH_BME_RISE_VEC IRQ_TO_VEC(ISH_BME_RISE_IRQ)
#define ISH_BME_FALL_VEC IRQ_TO_VEC(ISH_BME_FALL_IRQ)
+#define ISH_FABRIC_VEC IRQ_TO_VEC(ISH_FABRIC_IRQ)
#ifdef CONFIG_ISH_UART_0
#define ISH_DEBUG_UART UART_PORT_0
@@ -284,6 +286,15 @@ enum ish_i2c_port {
#define CCU_MIASS_RST (1 << 2) /* Used to indicate UIA shutdown reset */
#define CCU_SRECC_RST (1 << 3) /* Used to indicate SRAM ECC reset */
+/* Fabric Agent Status register */
+#define FABRIC_AGENT_STATUS REG32(ISH_OCP_BASE + 0x7828)
+#define FABRIC_INBAND_ERR_SECONDARY_BIT BIT(29)
+#define FABRIC_INBAND_ERR_PRIMARY_BIT BIT(28)
+#define FABRIC_M_ERR_BIT BIT(24)
+#define FABRIC_MIA_STATUS_BIT_ERR (FABRIC_INBAND_ERR_SECONDARY_BIT | \
+ FABRIC_INBAND_ERR_PRIMARY_BIT | \
+ FABRIC_M_ERR_BIT)
+
/* CSME Registers */
#define ISH_RST_REG REG32(ISH_IPC_BASE + 0x44)
diff --git a/chip/ish/system.c b/chip/ish/system.c
index 6c6ce75828..22e6d60a06 100644
--- a/chip/ish/system.c
+++ b/chip/ish/system.c
@@ -34,6 +34,8 @@ int system_is_reboot_warm(void)
void system_pre_init(void)
{
+ task_enable_irq(ISH_FABRIC_IRQ);
+
#ifdef CONFIG_LOW_POWER_IDLE
ish_pm_init();
#endif
@@ -138,3 +140,16 @@ uint32_t system_get_lfw_address(void)
void system_set_image_copy(enum system_image_copy_t copy)
{
}
+
+static void fabric_isr(void)
+{
+ /**
+ * clear fabric error status, otherwise it will wakeup ISH immediately
+ * when entered low power mode.
+ * TODO(b:130740646): figure out why this issue happens.
+ */
+ if (FABRIC_AGENT_STATUS & FABRIC_MIA_STATUS_BIT_ERR)
+ FABRIC_AGENT_STATUS = FABRIC_AGENT_STATUS;
+}
+
+DECLARE_IRQ(ISH_FABRIC_IRQ, fabric_isr);
diff --git a/core/minute-ia/interrupts.c b/core/minute-ia/interrupts.c
index d41ae836c9..87926a9736 100644
--- a/core/minute-ia/interrupts.c
+++ b/core/minute-ia/interrupts.c
@@ -143,6 +143,7 @@ static const irq_desc_t system_irqs[] = {
LEVEL_INTR(ISH_HPET_TIMER0_IRQ, ISH_HPET_TIMER0_VEC),
LEVEL_INTR(ISH_HPET_TIMER1_IRQ, ISH_HPET_TIMER1_VEC),
LEVEL_INTR(ISH_DEBUG_UART_IRQ, ISH_DEBUG_UART_VEC),
+ LEVEL_INTR(ISH_FABRIC_IRQ, ISH_FABRIC_VEC),
#ifdef CONFIG_ISH_PM_RESET_PREP
LEVEL_INTR(ISH_RESET_PREP_IRQ, ISH_RESET_PREP_VEC),
#endif