kukui: Runtime configure GPIO settings between rev1 and rev2.

Considering we have more space on flash now, we would like to share
one image between two board revisions to ease the development.

This CL also removes unused powerrails in P1.

TEST=flash image on P1 and P2, and check both boards boots.
BUG=b:126315091
BRANCH=None

Change-Id: Ifd0242396013e18e7e1cbc29048a5fc508626e5b
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1505214
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>

5 files changed, 31 insertions, 67 deletions

diff --git a/board/kukui/board.c b/board/kukui/board.c
index dd6e3d9337..df533631cf 100644
--- a/board/kukui/board.c
+++ b/board/kukui/board.c
@@ -68,12 +68,10 @@ static void gauge_interrupt(enum gpio_signal signal)
 /* ADC channels. Must be in the exactly same order as in enum adc_channel. */
 const struct adc_t adc_channels[] = {
 	[ADC_BOARD_ID] = {"BOARD_ID", 3300, 4096, 0, STM32_AIN(10)},
-#if BOARD_REV >= 2
 	[ADC_EC_SKU_ID] = {"EC_SKU_ID", 3300, 4096, 0, STM32_AIN(8)},
 	[ADC_BATT_ID] = {"BATT_ID", 3300, 4096, 0, STM32_AIN(7)},
 	[ADC_USBC_THERM] = {"USBC_THERM", 3300, 4096, 0, STM32_AIN(14)},
 	[ADC_POGO_ADC_INT_L] = {"POGO_ADC_INT_L", 3300, 4096, 0, STM32_AIN(6)},
-#endif
 };
 BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
 
@@ -230,6 +228,14 @@ static void board_init(void)
 }
 DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
 
+static void board_rev_init(void)
+{
+	/* Board revision specific configs. */
+	if (board_get_version() >= 2)
+		gpio_set_flags(GPIO_USBC_THERM, GPIO_ANALOG);
+}
+DECLARE_HOOK(HOOK_INIT, board_rev_init, HOOK_PRIO_INIT_ADC + 1);
+
 void board_config_pre_init(void)
 {
 	STM32_RCC_AHBENR |= STM32_RCC_HB_DMA1;
diff --git a/board/kukui/board.h b/board/kukui/board.h
index 6e1ef13b61..e6ccc69dfe 100644
--- a/board/kukui/board.h
+++ b/board/kukui/board.h
@@ -8,13 +8,6 @@
 #ifndef __CROS_EC_BOARD_H
 #define __CROS_EC_BOARD_H
 
-/* board revision */
-#define BOARD_REV 1
-
-#if BOARD_REV < 1 || BOARD_REV > 2
-#error "Board revision out of range"
-#endif
-
 /* Optional modules */
 #define CONFIG_ADC
 #undef  CONFIG_ADC_WATCHDOG
@@ -203,12 +196,10 @@
 enum adc_channel {
 	/* Real ADC channels begin here */
 	ADC_BOARD_ID = 0,
-#if BOARD_REV >= 2
 	ADC_EC_SKU_ID,
 	ADC_BATT_ID,
 	ADC_POGO_ADC_INT_L,
 	ADC_USBC_THERM,
-#endif
 	ADC_CH_COUNT
 };
 
diff --git a/board/kukui/gpio.inc b/board/kukui/gpio.inc
index 4986e878a2..04010dc714 100644
--- a/board/kukui/gpio.inc
+++ b/board/kukui/gpio.inc
@@ -45,19 +45,8 @@ GPIO_INT(GAUGE_INT_ODL,     PIN(C, 9),  GPIO_INT_FALLING | GPIO_PULL_UP,
          gauge_interrupt)
 
 /* Interrupts not implemented yet */
-#if BOARD_REV < 2
-GPIO(ALS_INT_ODL,           PIN(A, 6), GPIO_INPUT)
-#elif BOARD_REV >= 2
 /* TODO(b:122993147): It's also an analog input. */
 GPIO(POGO_ADC_INT_L,        PIN(A, 6), GPIO_INPUT)
-#endif
-
-/* Voltage rails control pins */
-#if BOARD_REV < 2
-GPIO(PP3300_S0_EN,         PIN(B, 6),  GPIO_OUT_LOW)
-GPIO(PP1800_S3_EN,         PIN(C, 7),  GPIO_OUT_LOW)
-GPIO(PP3300_S3_EN,         PIN(D, 2),  GPIO_OUT_LOW)
-#endif
 
 /* Reset pins */
 GPIO(AP_SYS_RST_L,         PIN(C, 11), GPIO_OUT_LOW)
@@ -78,18 +67,13 @@ GPIO(I2C2_SDA,             PIN(A, 12), GPIO_INPUT)
 /* Analog pins */
 GPIO(BATT_ID,              PIN(A, 7),  GPIO_ANALOG)
 GPIO(BOARD_ID,             PIN(C, 0),  GPIO_ANALOG)
-#if BOARD_REV >= 2
 GPIO(EC_SKU_ID,            PIN(B, 0),  GPIO_ANALOG)
-GPIO(USBC_THERM,           PIN(C, 4),  GPIO_ANALOG)
-#endif
 
 /* Other input pins */
 GPIO(WP_L,                 PIN(C, 8),  GPIO_INPUT) /* EC_FLASH_WP_ODL */
 GPIO(BOOT0,                PIN(F, 11), GPIO_INPUT)
 GPIO(CCD_MODE_ODL,         PIN(A, 1),  GPIO_INPUT)
-#if BOARD_REV >= 2
 GPIO(POGO_VBUS_PRESENT,    PIN(A, 14), GPIO_INPUT)
-#endif
 
 /* Other output pins */
 GPIO(ENTERING_RW,          PIN(C, 6),  GPIO_ODR_HIGH) /* EC_ENTERING_RW_ODL */
@@ -99,17 +83,18 @@ GPIO(USB_C0_DP_POLARITY,   PIN(C, 14), GPIO_OUT_LOW)
 GPIO(USB_C0_HPD_OD,        PIN(F, 1),  GPIO_ODR_LOW)
 GPIO(BOOTBLOCK_EN_L,       PIN(C, 1),  GPIO_ODR_HIGH)
 GPIO(USB_C0_DP_OE_L,       PIN(A, 5),  GPIO_OUT_HIGH)
-#if BOARD_REV < 2
-GPIO(USB_C0_DISCHARGE,     PIN(B, 0),  GPIO_OUT_LOW)
-GPIO(BOOTBLOCK_MUX_OE,     PIN(C, 4),  GPIO_ODR_HIGH)
-GPIO(USB_ID,               PIN(A, 13), GPIO_ODR_HIGH)
-#elif BOARD_REV >= 2
 GPIO(EN_PP3300_POGO,     PIN(A, 13), GPIO_OUT_LOW)
 GPIO(EN_POGO_CHARGE_L,   PIN(B, 6),  GPIO_OUT_HIGH)
 GPIO(EN_USBC_CHARGE_L,   PIN(C, 7),  GPIO_OUT_LOW)
 GPIO(EN_PP5000_USBC,     PIN(D, 2),  GPIO_OUT_LOW)
-#endif
 
+/*
+ * It's a P1 pin BOOTBLOCK_MUX_OE, also a P2 pin USBC_THERM (test poin).
+ * Keep this pin defaults to P1 setting since that eMMC enabled with
+ * High-Z stat.
+ * TODO(b:122866184): Rename this pin as BC12_DET_EN.
+ */
+GPIO(USBC_THERM,     PIN(C, 4),  GPIO_ODR_HIGH)
 
 /* USART1: PA9/PA10 */
 ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART,       0)
diff --git a/board/kukui/usb_pd_policy.c b/board/kukui/usb_pd_policy.c
index c354581d9d..4b80de9f15 100644
--- a/board/kukui/usb_pd_policy.c
+++ b/board/kukui/usb_pd_policy.c
@@ -67,11 +67,11 @@ int pd_set_power_supply_ready(int port)
 	vbus_en = 1;
 	charger_enable_otg_power(1);
 
-#if BOARD_REV >= 2
-	/* TODO(b:123268580): Implement POGO discharge logic. */
-	gpio_set_level(GPIO_EN_USBC_CHARGE_L, 1);
-	gpio_set_level(GPIO_EN_PP5000_USBC, 1);
-#endif
+	if (board_get_version() >= 2) {
+		/* TODO(b:123268580): Implement POGO discharge logic. */
+		gpio_set_level(GPIO_EN_USBC_CHARGE_L, 1);
+		gpio_set_level(GPIO_EN_PP5000_USBC, 1);
+	}
 
 	/* notify host of power info change */
 	pd_send_host_event(PD_EVENT_POWER_CHANGE);
@@ -91,17 +91,17 @@ void pd_power_supply_reset(int port)
 	if (prev_en)
 		pd_set_vbus_discharge(port, 1);
 
-#if BOARD_REV >= 2
-	/*
-	 * TODO(b:123268580): Implement POGO discharge logic.
-	 *
-	 * Turn off source path and POGO path before asserting
-	 * EN_USB_CHARGE_L.
-	 */
-	gpio_set_level(GPIO_EN_PP5000_USBC, 0);
-	gpio_set_level(GPIO_EN_POGO_CHARGE_L, 1);
-	gpio_set_level(GPIO_EN_USBC_CHARGE_L, 0);
-#endif
+	if (board_get_version() >= 2) {
+		/*
+		 * TODO(b:123268580): Implement POGO discharge logic.
+		 *
+		 * Turn off source path and POGO path before asserting
+		 * EN_USB_CHARGE_L.
+		 */
+		gpio_set_level(GPIO_EN_PP5000_USBC, 0);
+		gpio_set_level(GPIO_EN_POGO_CHARGE_L, 1);
+		gpio_set_level(GPIO_EN_USBC_CHARGE_L, 0);
+	}
 
 	/* notify host of power info change */
 	pd_send_host_event(PD_EVENT_POWER_CHANGE);
diff --git a/power/mt8183.c b/power/mt8183.c
index 4904da3fb9..b4795a3e34 100644
--- a/power/mt8183.c
+++ b/power/mt8183.c
@@ -52,10 +52,6 @@
  */
 #define PMIC_FORCE_RESET_TIME (10 * SECOND)
 
-#if defined(BOARD_KUKUI) && BOARD_REV < 2
-#define BOARD_KUKUI_REV_LT_2
-#endif
-
 /* Data structure for a GPIO operation for power sequencing */
 struct power_seq_op {
 	/* enum gpio_signal in 8 bits */
@@ -75,36 +71,22 @@ BUILD_ASSERT(GPIO_COUNT < 256);
 static const struct power_seq_op s5s3_power_seq[] = {
 	/* Release PMIC watchdog. */
 	{ GPIO_PMIC_WATCHDOG_L, 1, 0 },
-#ifdef BOARD_KUKUI_REV_LT_2
-	{ GPIO_PP3300_S3_EN, 1, 2 },
-	{ GPIO_PP1800_S3_EN, 1, 2 },
-#endif
 	/* Turn on AP. */
 	{ GPIO_AP_SYS_RST_L, 1, 2 },
 };
 
 /* The power sequence for POWER_S3S0 */
 static const struct power_seq_op s3s0_power_seq[] = {
-#ifdef BOARD_KUKUI_REV_LT_2
-	{ GPIO_PP3300_S0_EN, 1, 0 },
-#endif
 };
 
 /* The power sequence for POWER_S0S3 */
 static const struct power_seq_op s0s3_power_seq[] = {
-#ifdef BOARD_KUKUI_REV_LT_2
-	{ GPIO_PP3300_S0_EN, 0, 0 },
-#endif
 };
 
 /* The power sequence for POWER_S3S5 */
 static const struct power_seq_op s3s5_power_seq[] = {
 	/* Turn off AP. */
 	{ GPIO_AP_SYS_RST_L, 0, 0 },
-#ifdef BOARD_KUKUI_REV_LT_2
-	{ GPIO_PP1800_S3_EN, 0, 2 },
-	{ GPIO_PP3300_S3_EN, 0, 2 },
-#endif
 	/* Assert watchdog to PMIC (there may be a 1.6ms debounce) */
 	{ GPIO_PMIC_WATCHDOG_L, 0, 3 },
 };