hatch: Add support for power sequencing

This CL adds config options, board specific functions and GPIO signals
required to add power sequencing support.

BRANCH=none
BUG=b:122251649
TEST=make buildall, verified at factory that AP reaches S0

Change-Id: I5c7e8331b0f46a830b6e0f6722e7b05ba05212cb
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1377571
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>

6 files changed, 140 insertions, 2 deletions

diff --git a/baseboard/hatch/baseboard.c b/baseboard/hatch/baseboard.c
index 19de9d6cf5..035efa4395 100644
--- a/baseboard/hatch/baseboard.c
+++ b/baseboard/hatch/baseboard.c
@@ -4,9 +4,20 @@
  */
 
 /* Hatch family-specific configuration */
-
+#include "chipset.h"
+#include "console.h"
+#include "espi.h"
 #include "gpio.h"
+#include "hooks.h"
 #include "i2c.h"
+#include "power.h"
+#include "tcpci.h"
+#include "timer.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args)
+
 
 /******************************************************************************/
 /* I2C port map configuration */
@@ -19,3 +30,63 @@ const struct i2c_port_t i2c_ports[] = {
 	{"eeprom",  I2C_PORT_EEPROM,  100, GPIO_I2C7_SCL, GPIO_I2C7_SDA},
 };
 const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+
+/* power signal list. */
+const struct power_signal_info power_signal_list[] = {
+
+	[X86_SLP_S0_DEASSERTED] = {GPIO_SLP_S0_L,
+		POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT,
+		"SLP_S0_DEASSERTED"},
+#ifdef CONFIG_HOSTCMD_ESPI_VW_SIGNALS
+	[X86_SLP_S3_DEASSERTED] = {VW_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH,
+				   "SLP_S3_DEASSERTED"},
+	[X86_SLP_S4_DEASSERTED] = {VW_SLP_S4_L, POWER_SIGNAL_ACTIVE_HIGH,
+				   "SLP_S4_DEASSERTED"},
+#else
+	[X86_SLP_S3_DEASSERTED] = {GPIO_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH,
+				   "SLP_S3_DEASSERTED"},
+	[X86_SLP_S4_DEASSERTED] = {GPIO_SLP_S4_L, POWER_SIGNAL_ACTIVE_HIGH,
+				   "SLP_S4_DEASSERTED"},
+#endif
+	[X86_RSMRST_L_PGOOD] = {GPIO_PG_EC_RSMRST_L, POWER_SIGNAL_ACTIVE_HIGH,
+				"RSMRST_L_PGOOD"},
+	[PP5000_A_PGOOD] = {GPIO_PP5000_A_PG_OD, POWER_SIGNAL_ACTIVE_HIGH,
+			    "PP5000_A_PGOOD"},
+	[ALL_SYS_PGOOD] = {GPIO_PG_EC_ALL_SYS_PWRGD, POWER_SIGNAL_ACTIVE_HIGH,
+			   "ALL_SYS_PWRGD"}
+};
+BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
+
+/******************************************************************************/
+/* Chipset callbacks/hooks */
+
+/* Called on AP S5 -> S3 transition */
+static void baseboard_chipset_startup(void)
+{
+	/* TODD(b/122266850): Need to fill out this hook */
+}
+DECLARE_HOOK(HOOK_CHIPSET_STARTUP, baseboard_chipset_startup,
+	     HOOK_PRIO_DEFAULT);
+
+/* Called on AP S0iX -> S0 transition */
+static void baseboard_chipset_resume(void)
+{
+	/* TODD(b/122266850): Need to fill out this hook */
+}
+DECLARE_HOOK(HOOK_CHIPSET_RESUME, baseboard_chipset_resume, HOOK_PRIO_DEFAULT);
+
+/* Called on AP S0 -> S0iX transition */
+static void baseboard_chipset_suspend(void)
+{
+	/* TODD(b/122266850): Need to fill out this hook */
+}
+DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, baseboard_chipset_suspend,
+	     HOOK_PRIO_DEFAULT);
+
+/* Called on AP S3 -> S5 transition */
+static void baseboard_chipset_shutdown(void)
+{
+	/* TODD(b/122266850): Need to fill out this hook */
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, baseboard_chipset_shutdown,
+	     HOOK_PRIO_DEFAULT);
diff --git a/baseboard/hatch/baseboard.h b/baseboard/hatch/baseboard.h
index 9fa7b54f62..a840911e8c 100644
--- a/baseboard/hatch/baseboard.h
+++ b/baseboard/hatch/baseboard.h
@@ -16,6 +16,19 @@
 #define CONFIG_SPI_FLASH_REGS
 #define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */
 
+/* Chipset config */
+#define CONFIG_CHIPSET_COMETLAKE
+#define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK
+#define CONFIG_CHIPSET_RESET_HOOK
+#define CONFIG_EXTPOWER_GPIO
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_BUTTON_X86
+#define CONFIG_POWER_COMMON
+/* TODO(b/111155507): Don't enable SOiX for now */
+/* #define CONFIG_POWER_S0IX */
+/* #define CONFIG_POWER_TRACK_HOST_SLEEP_STATE */
+
+
 /* I2C Bus Configuration */
 #define CONFIG_I2C
 #define CONFIG_I2C_MASTER
@@ -27,4 +40,22 @@
 #define I2C_PORT_EEPROM		NPCX_I2C_PORT7_0
 #define I2C_ADDR_EEPROM		0xA0
 
+#define PP5000_PGOOD_POWER_SIGNAL_MASK POWER_SIGNAL_MASK(PP5000_A_PGOOD)
+
+#ifndef __ASSEMBLER__
+
+enum power_signal {
+	X86_SLP_S0_DEASSERTED,
+	X86_SLP_S3_DEASSERTED,
+	X86_SLP_S4_DEASSERTED,
+	X86_RSMRST_L_PGOOD,
+	PP5000_A_PGOOD,
+	ALL_SYS_PGOOD,
+	/* Number of X86 signals */
+	POWER_SIGNAL_COUNT
+};
+
+
+#endif /* !__ASSEMBLER__ */
+
 #endif /* __CROS_EC_BASEBOARD_H */
diff --git a/board/hatch/board.c b/board/hatch/board.c
index d1e6424067..0e25c7f739 100644
--- a/board/hatch/board.c
+++ b/board/hatch/board.c
@@ -9,6 +9,7 @@
 #include "extpower.h"
 #include "gpio.h"
 #include "lid_switch.h"
+#include "power.h"
 #include "power_button.h"
 #include "spi.h"
 #include "switch.h"
diff --git a/board/hatch/board.h b/board/hatch/board.h
index c30afa0c3a..34d47f4b18 100644
--- a/board/hatch/board.h
+++ b/board/hatch/board.h
@@ -20,11 +20,25 @@
 #define CONFIG_LOW_POWER_IDLE
 
 #define CONFIG_HOSTCMD_ESPI
-#define CONFIG_HOSTCMD_ESPI_VW_SIGNALS
+/* #define CONFIG_HOSTCMD_ESPI_VW_SIGNALS */
 
 #undef CONFIG_UART_TX_BUF_SIZE
 #define CONFIG_UART_TX_BUF_SIZE 4096
 
+/*
+ * Macros for GPIO signals used in common code that don't match the
+ * schematic names. Signal names in gpio.inc match the schematic and are
+ * then redefined here to so it's more clear which signal is being used for
+ * which purpose.
+ */
+#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L
+#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L
+#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL
+#define GPIO_AC_PRESENT GPIO_ACOK_OD
+#define GPIO_RSMRST_L_PGOOD GPIO_PG_EC_RSMRST_L
+#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L
+#define GPIO_PCH_SLP_S4_L GPIO_SLP_S4_L
+
 #ifndef __ASSEMBLER__
 
 #include "gpio_signal.h"
diff --git a/board/hatch/ec.tasklist b/board/hatch/ec.tasklist
index f3453d6398..87742e79b8 100644
--- a/board/hatch/ec.tasklist
+++ b/board/hatch/ec.tasklist
@@ -22,7 +22,9 @@
 
 #define CONFIG_TASK_LIST \
 	TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
 	TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
 	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \
 	TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \
 
diff --git a/board/hatch/gpio.inc b/board/hatch/gpio.inc
index 4f4f70fc5b..1677ee0364 100644
--- a/board/hatch/gpio.inc
+++ b/board/hatch/gpio.inc
@@ -12,13 +12,32 @@
 GPIO_INT(LID_OPEN,             PIN(D, 2), GPIO_INT_BOTH, lid_interrupt)
 GPIO_INT(WP_L,                 PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)              /* EC_WP_ODL */
 GPIO_INT(POWER_BUTTON_L,       PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt)        /* MECH_PWR_BTN_ODL */
+GPIO_INT(ACOK_OD,              PIN(0, 0), GPIO_INT_BOTH, extpower_interrupt)
 
 
+/* Power sequencing interrupts */
+GPIO_INT(SLP_S0_L,             PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
+#ifndef CONFIG_HOSTCMD_ESPI_VW_SIGNALS
+GPIO_INT(SLP_S3_L,             PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_S4_L,             PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt)
+#endif
+GPIO_INT(PG_EC_RSMRST_L,       PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PG_EC_ALL_SYS_PWRGD,  PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt)
+
 GPIO(SYS_RESET_L,              PIN(0, 2), GPIO_ODR_HIGH)        /* SYS_RST_ODL */
 GPIO(ENTERING_RW,              PIN(E, 3), GPIO_OUT_LOW)         /* EC_ENTERING_RW */
 GPIO(PCH_WAKE_L,               PIN(7, 4), GPIO_ODR_HIGH)        /* EC_PCH_WAKE_ODL */
 GPIO(PCH_PWRBTN_L,             PIN(C, 1), GPIO_ODR_HIGH)        /* EC_PCH_PWR_BTN_ODL */
 
+/* Power Sequencing Signals */
+GPIO(EN_PP5000_A,              PIN(7, 3), GPIO_OUT_LOW)
+GPIO(EN_A_RAILS,               PIN(A, 3), GPIO_OUT_LOW)
+GPIO(EC_PCH_RSMRST_L,          PIN(A, 6), GPIO_OUT_LOW)
+GPIO(EC_PROCHOT_ODL,           PIN(6, 3), GPIO_ODR_HIGH)
+GPIO(PP5000_A_PG_OD,           PIN(D, 7), GPIO_INPUT)
+GPIO(EC_PCH_SYS_PWROK,         PIN(3, 7), GPIO_OUT_LOW)
+GPIO(CPU_C10_GATE_L,           PIN(6, 7), GPIO_INPUT)
+
 /* I2C pins - Alternate function below configures I2C module on these pins */
 GPIO(I2C0_SCL,                 PIN(B, 5), GPIO_INPUT |
                                           GPIO_SEL_1P8V)        /* EC_I2C_SENSOR_1V8_SCL */