diff options
| author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2018-11-14 15:46:45 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-11-29 04:31:51 -0800 |
| commit | d10bf58755007b01e3c6eb8be2c01f16ef1d11eb (patch) | |
| tree | 6217012ec5bb845f24d67b620ca7393878d9f65c | |
| parent | 28256095e5d71c56db48c79f4d66935f14e98fe0 (diff) | |
| download | chrome-ec-d10bf58755007b01e3c6eb8be2c01f16ef1d11eb.tar.gz | |
board/phaser/gpio: Add missing GPIO configuration for Board Id 2
Set the unused pins as input with an internal pull-up if there is no
external pull-up/pull-down. This helps save some power. Update the
name for CCD_MODE_EC_L pin. Add configuration for TRACKPAD_INT_1V8_ODL
pin.
BRANCH=None
BUG=b:110192175
TEST=make -j buildall && Bootup to chromeos. Also verified that power
stayed the same or slightly lower(6.63mW on PP3300_ec_mw to 6.57 mW over
10 sec average on Phaser360).
Change-Id: I181bd718eb1d7915593e2185813590395fbea048
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1336732
Reviewed-by: Jett Rink <jettrink@chromium.org>
| -rw-r--r-- | board/phaser/gpio.inc | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/board/phaser/gpio.inc b/board/phaser/gpio.inc index db42d6c259..9a65594c4b 100644 --- a/board/phaser/gpio.inc +++ b/board/phaser/gpio.inc @@ -150,13 +150,24 @@ GPIO(EC_INT_L, PIN(9, 4), GPIO_INPUT) /* EC_AP_INT_ODL - Unused GPIO_ODR_HIGH /* Misc. */ GPIO(CCD_MODE_EC_L, PIN(E, 3), GPIO_INPUT) +GPIO(TRACKPAD_INT_1V8_ODL, PIN(9, 3), GPIO_INPUT | GPIO_SEL_1P8V) + +/* Unused pins */ +GPIO(CHARGER_PMON, PIN(4, 2), GPIO_INPUT) +GPIO(CHARGER_IADP, PIN(4, 3), GPIO_INPUT) +GPIO(EC_GPIO57, PIN(5, 7), GPIO_INPUT | GPIO_PULL_UP) /* TP Only */ +GPIO(EC_GPIO97, PIN(9, 7), GPIO_INPUT | GPIO_PULL_UP) /* TP Only */ +GPIO(EC_I2S_SFRM, PIN(A, 5), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2S_SCLK, PIN(A, 7), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2S_TX_PCH_RX, PIN(B, 0), GPIO_INPUT | GPIO_SEL_1P8V) /* Keyboard pins */ ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_INPUT) /* KSI_00-01 */ ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_INPUT) /* KSI_02-07 */ ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_00-01 */ ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_03-09 */ -ALTERNATE(PIN_MASK(0, 0xE0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-12 */ +ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-13 */ +ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_14 */ GPIO(KBD_KSO2, PIN(1, 7), GPIO_OUT_LOW) /* KSO_02 inverted */ /* Alternate functions GPIO definitions */ |