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author | Jett Rink <jettrink@chromium.org> | 2018-05-21 10:22:55 -0600 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-22 21:56:37 -0700 |
commit | dbfa3cf2dc3950fc5ee1fc81a2d2cdfe5150e9c4 (patch) | |
tree | 31b145c022e96dfe43c496b9c09c708695b801f9 | |
parent | 359f1b582a080511179c26b6dd25e2db58587d23 (diff) | |
download | chrome-ec-dbfa3cf2dc3950fc5ee1fc81a2d2cdfe5150e9c4.tar.gz |
lpc/espi: define new targeted config options
Introduce CONFIG_HOSTCMD_LPC and CONFIG_HOSTCMD_ESPI which will replace
CONFIG_LPC and CONFIG_ESPI. Today the CONFIG_LPC option guards both
common code to eSPI and LPC and LPC-only code. Going forward
CONFIG_HOSTCMD_LPC will guard only LPC code, and a new option
CONFIG_HOSTCMD_X86 will guard common code to both LPC and eSPI.
I am leaving the CONFIG_LPC and CONFIG_ESPI defines in this CL so each
CL in the stack compiles.
BRANCH=none
BUG=chromium:818804
TEST=Full stack builds and works on yorp (espi) and grunt (lpc)
Change-Id: I6ae3a805167a3404701d8a53c14dc83299afb376
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067498
Reviewed-by: Randall Spangler <rspangler@chromium.org>
-rw-r--r-- | include/config.h | 44 |
1 files changed, 39 insertions, 5 deletions
diff --git a/include/config.h b/include/config.h index 3264ffa195..bad67c6abf 100644 --- a/include/config.h +++ b/include/config.h @@ -1172,9 +1172,6 @@ */ #undef CONFIG_EMULATED_SYSRQ -/* Support for eSPI for host communication */ -#undef CONFIG_ESPI - /* Use Virtual Wire signals instead of GPIO with eSPI interface */ #undef CONFIG_ESPI_VW_SIGNALS @@ -2074,8 +2071,17 @@ */ #undef CONFIG_LOW_POWER_S0 -/* Support LPC interface */ -#undef CONFIG_LPC +/* + * EC supports x86 host communication with AP. This can either be through LPC + * or eSPI. The CONFIG_HOSTCMD_X86 will get automatically defined if either + * CONFIG_HOSTCMD_LPC or CONFIG_HOSTCMD_ESPI are defined. LPC and eSPI are + * mutually exclusive. + */ +#undef CONFIG_HOSTCMD_X86 +/* Support host command interface over LPC bus. */ +#undef CONFIG_HOSTCMD_LPC +/* Support host command interface over eSPI bus. */ +#undef CONFIG_HOSTCMD_ESPI /* Base address of low power RAM. */ #undef CONFIG_LPRAM_BASE @@ -3378,6 +3384,34 @@ /******************************************************************************/ /* + * Automatically define CONFIG_HOSTCMD_X86 if either child option is defined. + * Ensure LPC and eSPI are mutually exclusive + */ +#if defined(CONFIG_HOSTCMD_LPC) || defined(CONFIG_HOSTCMD_ESPI) +#define CONFIG_HOSTCMD_X86 +#endif + +#if defined(CONFIG_HOSTCMD_LPC) && defined(CONFIG_HOSTCMD_ESPI) +#error Must select only one type of host communication bus. +#endif + +#if defined(CONFIG_HOSTCMD_X86) && \ + !defined(CONFIG_HOSTCMD_LPC) && \ + !defined(CONFIG_HOSTCMD_ESPI) +#error Must select one type of host communication bus. +#endif + +/* TODO(chromium:818804): Remove temp transition code below once finished */ +#ifdef CONFIG_HOSTCMD_ESPI +#define CONFIG_LPC +#define CONFIG_ESPI +#endif + +#ifdef CONFIG_HOSTCMD_LPC +#define CONFIG_LPC +#endif +/******************************************************************************/ +/* * Set default data ram size unless it's customized by the chip. */ #ifndef CONFIG_DATA_RAM_SIZE |