diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2018-02-14 15:22:14 +0100 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-02-16 18:47:48 -0800 |
| commit | f29bf0fbbd0e83fcae6dd71cb2bc23647c80b8be (patch) | |
| tree | 4c3a30c95e792d6bb2d9d4c642c4a16ead5583c2 | |
| parent | 59c68a1d4bf82362062f5185214f7604c55b7efa (diff) | |
| download | chrome-ec-f29bf0fbbd0e83fcae6dd71cb2bc23647c80b8be.tar.gz | |
meowth_fp: update pins configuration
Disable the system lock (ie ignore Write-protect) until we have fully
defined our secure update scheme.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:73337313
TEST=On Meowth, run 'ectool --name=cros_fp gpioget WP'
Change-Id: I3323f5d1e48debae9e2ca6e18f4439e2849a3683
Reviewed-on: https://chromium-review.googlesource.com/924125
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
| -rw-r--r-- | board/meowth_fp/board.h | 8 | ||||
| -rw-r--r-- | board/meowth_fp/gpio.inc | 9 |
2 files changed, 15 insertions, 2 deletions
diff --git a/board/meowth_fp/board.h b/board/meowth_fp/board.h index 01feeecaf1..f7fb706eb6 100644 --- a/board/meowth_fp/board.h +++ b/board/meowth_fp/board.h @@ -8,6 +8,12 @@ #ifndef __BOARD_H #define __BOARD_H +/* + * TODO(b/73337313) remove this config, + * once the write-protection scheme is decided and validated. + */ +#define CONFIG_SYSTEM_UNLOCKED + /* the UART console is on USART1 */ #undef CONFIG_UART_CONSOLE #define CONFIG_UART_CONSOLE 1 @@ -31,7 +37,7 @@ #define CONFIG_STM_HWTIMER32 #undef CONFIG_TASK_PROFILING #define CONFIG_WATCHDOG_HELP -#define CONFIG_WP_ALWAYS +#define CONFIG_WP_ACTIVE_HIGH /* SPI configuration for the fingerprint sensor */ #define CONFIG_SPI_MASTER diff --git a/board/meowth_fp/gpio.inc b/board/meowth_fp/gpio.inc index 2ff4fbbf5e..577057f3c8 100644 --- a/board/meowth_fp/gpio.inc +++ b/board/meowth_fp/gpio.inc @@ -8,13 +8,20 @@ GPIO_INT(FPS_INT, PIN(A, 0), GPIO_INT_RISING, fps_event) GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INPUT, spi_event) +GPIO(PCH_SLP_S0_L, PIN(D,13), GPIO_INPUT) +GPIO(PCH_SLP_S3_L, PIN(A,11), GPIO_INPUT) +GPIO(PCH_SLP_S4_L, PIN(D, 8), GPIO_INPUT) +GPIO(PCH_SLP_SUS_L, PIN(D, 3), GPIO_INPUT) + +GPIO(WP, PIN(B, 7), GPIO_INPUT) + /* Outputs */ GPIO(EC_INT_L, PIN(A, 1), GPIO_INPUT) /* Enabled when PCH is up */ GPIO(FP_RST_ODL, PIN(E, 0), GPIO_ODR_HIGH) GPIO(SPI4_NSS, PIN(E, 4), GPIO_OUT_HIGH) +GPIO(USER_PRES_L, PIN(C, 5), GPIO_ODR_HIGH) UNIMPLEMENTED(ENTERING_RW) -UNIMPLEMENTED(WP_L) /* USART1: PA9/PA10 */ ALTERNATE(PIN_MASK(A, 0x0600), GPIO_ALT_USART, MODULE_UART, GPIO_PULL_UP) |