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authorCHLin <CHLIN56@nuvoton.com>2018-01-10 14:28:07 +0800
committerchrome-bot <chrome-bot@chromium.org>2018-01-18 10:11:50 -0800
commit97c819c6282ec04de3705614e9ef60b25b7d3908 (patch)
tree6c53f7f276b4cafb8695bd66ab6b821ac3cc5855
parent9ef3e91bdd12f3cac92cd4204bbb81f1e86f2445 (diff)
downloadchrome-ec-97c819c6282ec04de3705614e9ef60b25b7d3908.tar.gz
util: flash_ec: Add support to flash npcx7_evb with npcx7m7x chip
This CL modified the flash_ec and openocd script to support flashing npcx7m7x chip on npcx7_evb. BRANCH=none BUG=none TEST=Change CHIP_VARIANT to npcx7m7w in board/npcx7_evb/build.mk; "BOARD=npcx7_evb make"; Move npcx7_evb from array BOARDS_NPCX_7M6X_JTAG to BOARDS_NPCX_7M7X_JTAG in util/flash_ec; Connect servo JTAG to npcx7 EVB; "./util/flash_ec --board=npcx7_evb"; Make sure the programing succeed and EVB bootup. Change-Id: I9d448f55321330cbe9a7103d2b617617963ea307 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/858989 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
-rwxr-xr-xutil/flash_ec9
-rw-r--r--util/openocd/npcx_cmds.tcl25
2 files changed, 32 insertions, 2 deletions
diff --git a/util/flash_ec b/util/flash_ec
index e7136e33b1..b59d8fdc0f 100755
--- a/util/flash_ec
+++ b/util/flash_ec
@@ -109,6 +109,9 @@ BOARDS_NPCX_7M6X_JTAG=(
npcx7_evb
)
+BOARDS_NPCX_7M7X_JTAG=(
+)
+
BOARDS_NPCX_SPI=(
coral
eve
@@ -241,6 +244,8 @@ elif $(in_array "${BOARDS_NPCX_5M6G_JTAG[@]}" "${BOARD}"); then
CHIP="npcx_5m6g_jtag"
elif $(in_array "${BOARDS_NPCX_7M6X_JTAG[@]}" "${BOARD}"); then
CHIP="npcx_7m6x_jtag"
+elif $(in_array "${BOARDS_NPCX_7M7X_JTAG[@]}" "${BOARD}"); then
+ CHIP="npcx_7m7x_jtag"
elif $(in_array "${BOARDS_NPCX_SPI[@]}" "${BOARD}"); then
CHIP="npcx_spi"
elif $(in_array "${BOARDS_NPCX_INT_SPI[@]}" "${BOARD}"); then
@@ -938,6 +943,10 @@ function flash_npcx_7m6x_jtag() {
flash_npcx_jtag
}
+function flash_npcx_7m7x_jtag() {
+ flash_npcx_jtag
+}
+
function flash_npcx_spi() {
flash_flashrom
}
diff --git a/util/openocd/npcx_cmds.tcl b/util/openocd/npcx_cmds.tcl
index 5edc88e5f2..4fd0320433 100644
--- a/util/openocd/npcx_cmds.tcl
+++ b/util/openocd/npcx_cmds.tcl
@@ -81,9 +81,20 @@ proc flash_npcx7m6x {image_path image_offset spifw_image} {
# Code RAM start address
set cram_addr 0x10090000
- echo "*** Start to program npcx7m6f/g/k with $image_path ***"
+ echo "*** Start to program npcx7m6f/g/w with $image_path ***"
flash_npcx $image_path $cram_addr $image_offset $fw_size $spifw_image
- echo "*** Finish program npcx7m6f/g/k ***\r\n"
+ echo "*** Finish program npcx7m6f/g/w ***\r\n"
+}
+
+proc flash_npcx7m7x {image_path image_offset spifw_image} {
+ # 320 KB for RO & RW regions
+ set fw_size 0x50000
+ # Code RAM start address
+ set cram_addr 0x10070000
+
+ echo "*** Start to program npcx7m7f/g/w with $image_path ***"
+ flash_npcx $image_path $cram_addr $image_offset $fw_size $spifw_image
+ echo "*** Finish program npcx7m7f/g/w ***\r\n"
}
proc flash_npcx_ro {chip_name image_dir image_offset} {
@@ -110,6 +121,9 @@ proc flash_npcx_ro {chip_name image_dir image_offset} {
} elseif {$chip_name == "npcx_7m6x_jtag"} {
# program RO region
flash_npcx7m6x $ro_image_path $image_offset $spifw_image
+ } elseif {$chip_name == "npcx_7m7x_jtag"} {
+ # program RO region
+ flash_npcx7m7x $ro_image_path $image_offset $spifw_image
} else {
echo $chip_name "no supported."
}
@@ -152,6 +166,13 @@ proc flash_npcx_all {chip_name image_dir image_offset} {
flash_npcx7m6x $ro_image_path $image_offset $spifw_image
# program RW region
flash_npcx7m6x $rw_image_path $rw_image_offset $spifw_image
+ } elseif {$chip_name == "npcx_7m7x_jtag"} {
+ # RW images offset - 512 KB
+ set rw_image_offset [expr ($image_offset + 0x80000)]
+ # program RO region
+ flash_npcx7m7x $ro_image_path $image_offset $spifw_image
+ # program RW region
+ flash_npcx7m7x $rw_image_path $rw_image_offset $spifw_image
} else {
echo $chip_name "no supported."
}