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authorNick Sanders <nsanders@chromium.org>2017-05-18 17:12:26 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-11-16 21:07:39 -0800
commit80ef3f073e87cfba80666c922111b4c922769279 (patch)
tree472e8fdce7bfd2781bded9e84df47b8d07d13e46
parent20f85990c460f1d442e29e13a4a9df812ab81367 (diff)
downloadchrome-ec-80ef3f073e87cfba80666c922111b4c922769279.tar.gz
servo_v4: disable USB3 interface
This change switches the SS lines off in the main USB mux. There has been some general flakyness regarding USB3 peripherals and this change might address it. BUG=chromium:718075 BRANCH=None TEST=lsusb -t indicates 5000M before, 480M after. Change-Id: Id201fb20dc6489c4a071cb1c9c0624d7aa54652d Reviewed-on: https://chromium-review.googlesource.com/509130 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r--board/servo_v4/board.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/board/servo_v4/board.c b/board/servo_v4/board.c
index eaf0a58b28..e12f60f448 100644
--- a/board/servo_v4/board.c
+++ b/board/servo_v4/board.c
@@ -424,8 +424,11 @@ static void board_init(void)
usleep(1000);
gpio_set_flags(GPIO_DUT_HUB_USB_RESET_L, GPIO_OUT_HIGH);
- /* Write USB3 Mode Enable to PS8742 USB/DP Mux. */
- i2c_write8(1, 0x20, 0x0, 0x20);
+ /*
+ * Write USB3 Mode to PS8742 USB/DP Mux.
+ * 0x0:disable 0x20:enable.
+ */
+ i2c_write8(1, 0x20, 0x0, 0x0);
/* Enable uservo USB by default. */
init_ioexpander();