diff options
| author | Dino Li <Dino.Li@ite.com.tw> | 2017-09-27 16:07:46 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-09-28 23:26:24 -0700 |
| commit | f99b4ba8e66fb3887211e20b4a835337b6e73dcd (patch) | |
| tree | 867b7ac40109490998f603bda0c663558f6177f1 | |
| parent | 317d06b1008b019d79a1ce02be550db5d15ebff4 (diff) | |
| download | chrome-ec-f99b4ba8e66fb3887211e20b4a835337b6e73dcd.tar.gz | |
it83xx: gpio: remove 5.1K resistor connected to GND of CC pins
If we don't use IT8320's PD module, we should dis-connect resistor
to GND and disable CC related function to make sure these pins can
work as other function.
BRANCH=none
BUG=none
TEST=CCCSR register setting is 0xff after initialization if
we don't enable CONFIG_USB_PD_TCPM_ITE83XX.
Change-Id: I97e019ec1c9c852cd758b364a5e7913de1fc84f4
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/689435
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | chip/it83xx/gpio.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/chip/it83xx/gpio.c b/chip/it83xx/gpio.c index 1d9cfc5e22..ecfc9caf8a 100644 --- a/chip/it83xx/gpio.c +++ b/chip/it83xx/gpio.c @@ -434,6 +434,13 @@ void gpio_pre_init(void) /* To prevent cc pins leakage if we don't use pd module */ for (i = 0; i < USBPD_PORT_COUNT; i++) { IT83XX_USBPD_CCGCR(i) = 0x1f; + /* + * bit7 and bit3: Dis-connect CC with UP/RD/DET/TX/RX. + * bit6 and bit2: Dis-connect CC with 5.1K resister to GND. + * bit5 and bit1: Disable CC voltage detector. + * bit4 and bit0: Disable CC. + */ + IT83XX_USBPD_CCCSR(i) = 0xff; IT83XX_USBPD_CCPSR(i) = 0x66; } #endif |