docs: replace "master" with "HEAD" in URLs

find .  -name '*.md' | xargs sed -i 's#refs/heads/master#HEAD#g'
find .  -name '*.md' | xargs sed -i 's#+/master#+/HEAD#g'

BRANCH=none
BUG=none
TEST=view in gitiles

Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Iaac99ddc3463c8c7bb08038214e3eb22951db6a2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3188552
Reviewed-by: Diana Z <dzigterman@chromium.org>

14 files changed, 24 insertions, 24 deletions

diff --git a/board/servo_micro/ccd.md b/board/servo_micro/ccd.md
index d05fa726fd..267da66776 100644
--- a/board/servo_micro/ccd.md
+++ b/board/servo_micro/ccd.md
@@ -129,17 +129,17 @@ standard Linux `drivers/usb/serial/usb-serial-simple.c`
 The SPI endpoint is described in
 [`chip/stm32/usb_spi.h`](../../chip/stm32/usb_spi.h) and provides a simple
 connection to the SPI port. The host support is provided as a
-[driver in flashrom](https://chromium.googlesource.com/chromiumos/third_party/flashrom/+/master/raiden_debug_spi.c).
+[driver in flashrom](https://chromium.googlesource.com/chromiumos/third_party/flashrom/+/HEAD/raiden_debug_spi.c).
 
 The I2C endpoint is described in [`include/usb_i2c.h`](../../include/usb_i2c.h)
 and provides a simple connection to the I2C bus. The host support is provided in
 the
-[hdctools servo support](https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/master/servo/stm32i2c.py).
+[hdctools servo support](https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/servo/stm32i2c.py).
 
 The GPIO endpoint is cryptically described in
 [`chip/stm32/usb_gpio.h`](../../chip/stm32/usb_gpio.h) and provides simple
 access to set/clear and read the GPIO pins. The host support is provided in the
-[hdctools servo support](https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/master/servo/stm32gpio.py).
+[hdctools servo support](https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/servo/stm32gpio.py).
 
 The UPDATE endpoint is not part of CCD. It provides a method for updating the
 STM32 without needing the special boot modes. This uses the
diff --git a/docs/ap-ec-comm.md b/docs/ap-ec-comm.md
index 2fb72da67b..5cd6fd82d9 100644
--- a/docs/ap-ec-comm.md
+++ b/docs/ap-ec-comm.md
@@ -148,5 +148,5 @@ after receiving a host packet and before it has a response ready.
 
 [`cros-ec` Kernel driver]: https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/heads/chromeos-4.19/drivers/mfd/cros_ec_dev.c
 [Industrial I/O]: https://www.kernel.org/doc/html/v4.14/driver-api/iio/index.html
-[host command task]: https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/common/host_command.c
+[host command task]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/common/host_command.c
 [Transport-specific details]: #Transport_specific-details
diff --git a/docs/code_reviews.md b/docs/code_reviews.md
index 5a616ffdf0..a8e77c3fd8 100644
--- a/docs/code_reviews.md
+++ b/docs/code_reviews.md
@@ -49,6 +49,6 @@ Add your name to the [list of reviewers][1].
 *   [Google small CL guidelines][5]
 
 [1]: http://google3/chrome/crosinfra/gwsq/ec_reviewers
-[2]: http://chromium.googlesource.com/chromiumos/docs/+/master/firmware_code_reviews.md
+[2]: http://chromium.googlesource.com/chromiumos/docs/+/HEAD/firmware_code_reviews.md
 [3]: https://doc.coreboot.org/getting_started/gerrit_guidelines.html
 [5]: https://google.github.io/eng-practices/review/developer/small-cls.html
diff --git a/docs/configuration/cbi.md b/docs/configuration/cbi.md
index 47d569a041..f89ee78454 100644
--- a/docs/configuration/cbi.md
+++ b/docs/configuration/cbi.md
@@ -34,6 +34,6 @@ None required by this feature.
 Refer to the [I2C debugging information] to verify communication with the CBI
 EEPROM.
 
-[CBI]: https://chromium.googlesource.com/chromiumos/docs/+/master/design_docs/cros_board_info.md
+[CBI]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md
 [I2C buses]: ./i2c.md
 [I2C debugging information]: ./i2c.md#
diff --git a/docs/configuration/i2c.md b/docs/configuration/i2c.md
index 23406ad1e1..36464bb371 100644
--- a/docs/configuration/i2c.md
+++ b/docs/configuration/i2c.md
@@ -200,4 +200,4 @@ DECLARE_HOOK(HOOK_INIT, board_i2c_init, HOOK_PRIO_INIT_I2C);
 [./chip/npcx/registers.h]: ../../chip/npcx/registers.h
 [./include/i2c.h]: ../../include/i2c.h
 [I2C Example]: ../images/i2c_example.png
-[CBI]: https://chromium.googlesource.com/chromiumos/docs/+/master/design_docs/cros_board_info.md
+[CBI]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md
diff --git a/docs/ec-3po-design.md b/docs/ec-3po-design.md
index 9a7b3c4742..79ec3ecf0f 100644
--- a/docs/ec-3po-design.md
+++ b/docs/ec-3po-design.md
@@ -133,7 +133,7 @@ UART.](./images/ec-3po-high-level-design.png)
 
 Each host command is a 16-bit command value. Commands which take parameters or
 return response data specify `struct`s for that data. See
-[`include/ec_commands.h`](https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/include/ec_commands.h)
+[`include/ec_commands.h`](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/include/ec_commands.h)
 for the current format of request and replies. Currently, there are no changes
 made to the format of the host request and response structures.
 
diff --git a/docs/ec_terms.md b/docs/ec_terms.md
index 770278eaf6..3b9f88416e 100644
--- a/docs/ec_terms.md
+++ b/docs/ec_terms.md
@@ -237,12 +237,12 @@
     See the [USB-C documentation](./usb-c.md#vconn) for more details.
 
 [BC 1.2 Specification]: <https://www.usb.org/document-library/battery-charging-v12-spec-and-adopters-agreement>
-[CrOS Board Info]: <https://chromium.googlesource.com/chromiumos/docs/+/master/design_docs/cros_board_info.md>
+[CrOS Board Info]: <https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md>
 [CEC Wikipedia page]: <https://en.wikipedia.org/wiki/Consumer_Electronics_Control>
 [DPTF Readme]: <https://github.com/intel/dptf/blob/master/README.txt>
 [eSPI Specification]: <https://www.intel.com/content/dam/support/us/en/documents/software/chipset-software/327432-004_espi_base_specification_rev1.0.pdf>
-[FAFT design doc]: <https://chromium.googlesource.com/chromiumos/third_party/autotest/+/refs/heads/master/docs/faft-design-doc.md>
+[FAFT design doc]: <https://chromium.googlesource.com/chromiumos/third_party/autotest/+/HEAD/docs/faft-design-doc.md>
 [I2C Specification]: <https://www.nxp.com/docs/en/user-guide/UM10204.pdf>
 [RS-232]: <https://en.wikipedia.org/wiki/RS-232>
-[EC MKBP driver]: <https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/common/keyboard_mkbp.c>
+[EC MKBP driver]: <https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/common/keyboard_mkbp.c>
 [Low Pin Count bus]: https://en.wikipedia.org/wiki/Low_Pin_Count
diff --git a/docs/getting_started_quickly.md b/docs/getting_started_quickly.md
index 21b21c4888..325bef39b0 100644
--- a/docs/getting_started_quickly.md
+++ b/docs/getting_started_quickly.md
@@ -3,7 +3,7 @@
 [TOC]
 
 The
-[Chromium OS Developer Guide](https://chromium.googlesource.com/chromiumos/docs/+/master/developer_guide.md)
+[Chromium OS Developer Guide](https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md)
 and [README](../README.md) walk through the steps needed to fetch and build
 Chromium OS source. These steps can be followed to retrieve and build EC source
 as well. On the other hand, if your sole interest is building an EC image, the
diff --git a/docs/new_board_checklist.md b/docs/new_board_checklist.md
index 69a9e78638..7fe89d4121 100644
--- a/docs/new_board_checklist.md
+++ b/docs/new_board_checklist.md
@@ -169,9 +169,9 @@ After finishing the changes required for all EC features, it is recommended that
 you make one final pass over all the GPIOs and pin assignments used on your
 board. Refer to the [GPIO](./configuration/gpio.md) documentation for details.
 
-[README.md]:https://chromium.googlesource.com/chromiumos/platform/dev-util/+/master/contrib/variant/README.md
-[new_variant.py]:https://chromium.googlesource.com/chromiumos/platform/dev-util/+/master/contrib/variant/new_variant.py
-[create_initial_ec_image.sh]:https://chromium.googlesource.com/chromiumos/platform/dev-util/+/master/contrib/variant/create_initial_ec_image.sh
+[README.md]:https://chromium.googlesource.com/chromiumos/platform/dev-util/+/HEAD/contrib/variant/README.md
+[new_variant.py]:https://chromium.googlesource.com/chromiumos/platform/dev-util/+/HEAD/contrib/variant/new_variant.py
+[create_initial_ec_image.sh]:https://chromium.googlesource.com/chromiumos/platform/dev-util/+/HEAD/contrib/variant/create_initial_ec_image.sh
 [Volteer EC skeleton build]:https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1758532
 [Hatch EC skeleton build]:https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1377569/
 [config.h]: ./new_board_checklist.md#config_h
diff --git a/docs/write_protection.md b/docs/write_protection.md
index cb08a003e2..0ce6253a04 100644
--- a/docs/write_protection.md
+++ b/docs/write_protection.md
@@ -299,7 +299,7 @@ etc.) return an error if `EC_FLASH_PROTECT_ALL_NOW` is set.
 
 ["CCD open"]: https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md#Open-CCD
 [Cr50 console]: https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md#Consoles
-[Servo]: https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/refs/heads/master/README.md
+[Servo]: https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/README.md
 [`OverrideWP`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md
 [`system_is_locked()`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/aaba1d5efd51082d143ce2ac64e6caf9cb14d5e5/common/system.c#195
 [wp_screw]: https://www.chromium.org/chromium-os/firmware-porting-guide/firmware-ec-write-protection
diff --git a/docs/zephyr_shim.md b/docs/zephyr_shim.md
index def71d1d87..fac0383aff 100644
--- a/docs/zephyr_shim.md
+++ b/docs/zephyr_shim.md
@@ -40,7 +40,7 @@ requires us to add some Zephyr specific code in a `zephyr` directory in the
 platform/ec for future development and work on migrating the platform/ec-module
 code out of the module directory and into a first-class Zephyr code format -- in
 the local
-[Chrome Zephyr repo](https://chromium.googlesource.com/chromiumos/platform/zephyr-chrome/+/refs/heads/master)
+[Chrome Zephyr repo](https://chromium.googlesource.com/chromiumos/platform/zephyr-chrome/+/HEAD)
 and ultimately [upstream](https://github.com/zephyrproject-rtos/zephyr).
 
 For platform/ec code that is stable and not under active development, the Zephyr
@@ -96,7 +96,7 @@ Add the `src/platform/ec/zephyr` folder with:
         expose from platform/ec code to the Zephyr build.
 *   Shim code to translate platform/ec code into Zephyr code
     *   For example, redefine platform/ec’s
-        [`DECLARE_HOST_COMMAND`](https://source.chromium.org/chromiumos/chromiumos/codesearch/+/master:src/platform/ec/include/host_command.h;l=256;drc=514923bc59f5a3435dbb7cbf348735ed41889ffe)
+        [`DECLARE_HOST_COMMAND`](https://source.chromium.org/chromiumos/chromiumos/codesearch/+/HEAD:src/platform/ec/include/host_command.h;l=256;drc=514923bc59f5a3435dbb7cbf348735ed41889ffe)
         to map to Zephyr's upstream
         [`EC_HOST_CMD_HANDLER`](https://github.com/zephyrproject-rtos/zephyr/blob/d7468bf836b75c29980441f294a61eae6bf4bc75/include/ec_host_cmd.h#L73)
         macro. This allows us to compile select platform/ec files in the Zephyr
diff --git a/docs/ztest.md b/docs/ztest.md
index 2b8af31581..021b3391bd 100644
--- a/docs/ztest.md
+++ b/docs/ztest.md
@@ -33,9 +33,9 @@ have multiple threads of execution, which is enabled by a `$TEST.tasklist` file
 associated with the unit test. The test runner task has a task ID of
 `TASK_ID_TEST_RUNNER`, which can be used as an argument to any of the task
 functions. See for example the
-[`charge_ramp` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/test/charge_ramp.c#81)
+[`charge_ramp` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/test/charge_ramp.c#81)
 and the
-[`host_command` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/test/host_command.c#32)
+[`host_command` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/test/host_command.c#32)
 
 When a unit test is ported to Ztest, `test_main` doesn't have a thread ID, so
 `TASK_ID_TEST_RUNNER` is undefined. `charge_ramp` and `host_command` cannot be
@@ -43,7 +43,7 @@ ported at this time. `test_main` also cannot call any of the task functions that
 must be called from a task, such as `task_wake`; these functions can pend the
 calling task, but since `test_main` doesn't have a thread ID, the pend will
 fail. See the
-[`mutex` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/master/test/mutex.c#116)
+[`mutex` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/test/mutex.c#116)
 for an example.
 
 ## Determine source files being tested
diff --git a/navbar.md b/navbar.md
index f0b6ee68a1..8df90c7cc8 100644
--- a/navbar.md
+++ b/navbar.md
@@ -7,5 +7,5 @@
 *   [Documentation](/docs/sitemap.md)
 *   [Getting Started Quickly](/docs/getting_started_quickly.md)
 *   [File a Bug](https://bugs.chromium.org/p/chromium/issues/entry?components=OS%3EFirmware%3EEC)
-*   [Report Security Issue](https://chromium.googlesource.com/chromiumos/docs/+/master/reporting_bugs.md#security)
-*   [Chromium OS Docs](https://chromium.googlesource.com/chromiumos/docs/+/master/README.md)
+*   [Report Security Issue](https://chromium.googlesource.com/chromiumos/docs/+/HEAD/reporting_bugs.md#security)
+*   [Chromium OS Docs](https://chromium.googlesource.com/chromiumos/docs/+/HEAD/README.md)
diff --git a/util/iteflash.md b/util/iteflash.md
index 4f4a7d2853..4d0db0fcc6 100644
--- a/util/iteflash.md
+++ b/util/iteflash.md
@@ -33,7 +33,7 @@ circuits on a Chrome OS device motherboard. As of this writing, the most common
 [Servo v4](https://www.chromium.org/chromium-os/servo/servov4) is **not** a
 Servo in this sense. It is a USB hub with a microcontroller that proxies Servo
 functionality from either CR50 or Servo Micro.) See also
-[Case-Closed Debug in Chromebooks and Servo Micro](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/board/servo_micro/ccd.md).
+[Case-Closed Debug in Chromebooks and Servo Micro](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/board/servo_micro/ccd.md).
 
 ### How ITE EC reflashing works