drivers: add NPCX7 cros_kb_raw driver

NPCX keyboard scanning module is supported by up to 18 open-drain
output signals and 8 input signals. Switch-based keyboard matrices are
supported by Schmitt trigger inputs that have internal pull-up
resistors. For power efficiency, the inputs include interrupt and
wake-up capability so that pressing/releasing keys can be identified
without scanning the keyboard matrix in either Active, Sleep or Deep
Sleep power state.

The CL also includes:
— Add npcx cros_kb_raw device tree declarations.
— cros_kb_raw api implementations
- Enable Volteer keyboard scan task

BRANCH=none
BUG=b:167405015, b:172676906
TEST=build pass by zmake configure -B ./build projects/experimental/volteer.
TEST=check all the keys on volteer platform by "ksstate".

Change-Id: I1cbdaa0e81cbb4447daede82774711f4d50f613d
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/zephyr-chrome/+/2523940
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2630148
Tested-by: Jack Rosenthal <jrosenth@chromium.org>

15 files changed, 598 insertions, 1 deletions

diff --git a/zephyr/drivers/CMakeLists.txt b/zephyr/drivers/CMakeLists.txt
new file mode 100644
index 0000000000..7e4a6d94fb
--- /dev/null
+++ b/zephyr/drivers/CMakeLists.txt
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: Apache-2.0
+
+add_subdirectory(cros_kb_raw)
diff --git a/zephyr/drivers/Kconfig b/zephyr/drivers/Kconfig
new file mode 100644
index 0000000000..cfffcea226
--- /dev/null
+++ b/zephyr/drivers/Kconfig
@@ -0,0 +1,4 @@
+# Copyright 2020 Google LLC
+# SPDX-License-Identifier: Apache-2.0
+
+rsource "cros_kb_raw/Kconfig"
diff --git a/zephyr/drivers/cros_kb_raw/CMakeLists.txt b/zephyr/drivers/cros_kb_raw/CMakeLists.txt
new file mode 100644
index 0000000000..54b8c63b0f
--- /dev/null
+++ b/zephyr/drivers/cros_kb_raw/CMakeLists.txt
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library_sources_ifdef(CONFIG_CROS_KB_RAW_NPCX	cros_kb_raw_npcx.c)
diff --git a/zephyr/drivers/cros_kb_raw/Kconfig b/zephyr/drivers/cros_kb_raw/Kconfig
new file mode 100644
index 0000000000..fb525261c4
--- /dev/null
+++ b/zephyr/drivers/cros_kb_raw/Kconfig
@@ -0,0 +1,13 @@
+
+# Copyright 2020 Google LLC
+# SPDX-License-Identifier: Apache-2.0
+
+menuconfig CROS_KB_RAW_NPCX
+	bool "Nuvoton NPCX raw-keyboard-scan driver for the Zephyr shim"
+	depends on SOC_FAMILY_NPCX
+	default y
+	help
+	  This option enables a driver for providing raw access to the
+	  keyboard-scan peripheral in the chip. This is used instead of the
+	  kscan interface so we can continue to use most of the existing
+	  keyboard-scanning code in ECOS.
diff --git a/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c b/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c
new file mode 100644
index 0000000000..4858d5d251
--- /dev/null
+++ b/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright 2020 Google LLC
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define DT_DRV_COMPAT nuvoton_npcx_cros_kb_raw
+
+#include <assert.h>
+#include <dt-bindings/clock/npcx_clock.h>
+#include <drivers/cros_kb_raw.h>
+#include <drivers/clock_control.h>
+#include <drivers/gpio.h>
+#include <kernel.h>
+#include <soc.h>
+#include <soc/nuvoton_npcx/reg_def_cros.h>
+
+#include "ec_tasks.h"
+#include "keyboard_raw.h"
+#include "soc_miwu.h"
+#include "task.h"
+
+#include <logging/log.h>
+LOG_MODULE_REGISTER(cros_kb_raw, LOG_LEVEL_ERR);
+
+#define NPCX_MAX_KEY_COLS 18 /* Maximum rows of keyboard matrix */
+#define NPCX_MAX_KEY_ROWS 8 /* Maximum columns of keyboard matrix */
+#define NPCX_KB_ROW_MASK (BIT(NPCX_MAX_KEY_ROWS) - 1)
+
+/* Device config */
+struct cros_kb_raw_npcx_config {
+	/* keyboard scan controller base address */
+	uintptr_t base;
+	/* clock configuration */
+	struct npcx_clk_cfg clk_cfg;
+	/* pinmux configuration */
+	const uint8_t alts_size;
+	const struct npcx_alt *alts_list;
+	/* Keyboard scan input (KSI) wake-up irq */
+	int irq;
+	/* Size of keyboard inputs-wui mapping array */
+	int wui_size;
+	/* Mapping table between keyboard inputs and wui */
+	struct npcx_wui wui_maps[];
+};
+
+/* Driver convenience defines */
+#define DRV_CONFIG(dev) ((const struct cros_kb_raw_npcx_config *)(dev)->config)
+#define HAL_INSTANCE(dev) (struct kbs_reg *)(DRV_CONFIG(dev)->base)
+
+/* Keyboard Scan local functions */
+static struct miwu_dev_callback ksi_callback[NPCX_MAX_KEY_ROWS];
+
+static void kb_raw_npcx_init_ksi_wui_callback(
+	const struct device *dev, struct miwu_dev_callback *callback,
+	const struct npcx_wui *wui, miwu_dev_callback_handler_t handler)
+{
+	/* KSI signal which has no wake-up input source */
+	if (wui->table == NPCX_MIWU_TABLE_NONE)
+		return;
+
+	/* Install callback function */
+	npcx_miwu_init_dev_callback(callback, wui, handler, dev);
+	npcx_miwu_manage_dev_callback(callback, 1);
+
+	/* Configure MIWU setting and enable its interrupt */
+	npcx_miwu_interrupt_configure(wui, NPCX_MIWU_MODE_EDGE,
+				      NPCX_MIWU_TRIG_BOTH);
+	npcx_miwu_irq_enable(wui);
+}
+
+static int kb_raw_npcx_init(const struct device *dev)
+{
+	const struct cros_kb_raw_npcx_config *const config = DRV_CONFIG(dev);
+	const struct device *const clk_dev =
+		device_get_binding(NPCX_CLK_CTRL_NAME);
+	int ret;
+
+	/* Turn on device clock first and get source clock freq. */
+	ret = clock_control_on(clk_dev,
+			       (clock_control_subsys_t *)&config->clk_cfg);
+	if (ret < 0) {
+		LOG_ERR("Turn on KSCAN clock fail %d", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+/* Cros ec keyboard raw api functions */
+static void cros_kb_raw_npcx_enable_interrupt(const struct device *dev,
+					      int enable)
+{
+	const struct cros_kb_raw_npcx_config *const config = DRV_CONFIG(dev);
+
+	if (enable)
+		irq_enable(config->irq);
+	else
+		irq_disable(config->irq);
+}
+
+static int cros_kb_raw_npcx_read_row(const struct device *dev)
+{
+	struct kbs_reg *const inst = HAL_INSTANCE(dev);
+	int val;
+
+	val = inst->KBSIN;
+	LOG_DBG("rows raw %02x", val);
+
+	/* 1 means key pressed, otherwise means key released. */
+	return (~val & NPCX_KB_ROW_MASK);
+}
+
+static int cros_kb_raw_npcx_drive_column(const struct device *dev, int col)
+{
+	struct kbs_reg *const inst = HAL_INSTANCE(dev);
+
+	/*
+	 * Nuvoton 'Keyboard Scan' module supports 18x8 matrix
+	 * It also support automatic scan functionality.
+	 */
+	uint32_t mask, col_out;
+
+	/* Add support for CONFIG_KEYBOARD_KSO_BASE shifting */
+	col_out = col + CONFIG_KEYBOARD_KSO_BASE;
+
+	/* Drive all lines to high. ie. Key detection is disabled. */
+	if (col == KEYBOARD_COLUMN_NONE) {
+		mask = ~0;
+		if (IS_ENABLED(CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED)) {
+			gpio_set_level(GPIO_KBD_KSO2, 0);
+		}
+	}
+	/* Drive all lines to low for detection any key press */
+	else if (col == KEYBOARD_COLUMN_ALL) {
+		mask = ~(BIT(keyboard_cols) - 1);
+		if (IS_ENABLED(CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED)) {
+			gpio_set_level(GPIO_KBD_KSO2, 1);
+		}
+	}
+	/* Drive one line to low for determining which key's state changed. */
+	else {
+		if (IS_ENABLED(CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED)) {
+			if (col == 2)
+				gpio_set_level(GPIO_KBD_KSO2, 1);
+			else
+				gpio_set_level(GPIO_KBD_KSO2, 0);
+		}
+		mask = ~BIT(col_out);
+	}
+
+	/* Set KBSOUT */
+	inst->KBSOUT0 = (mask & 0xFFFF);
+	inst->KBSOUT1 = ((mask >> 16) & 0x03);
+
+	return 0;
+}
+
+static void cros_kb_raw_npcx_ksi_isr(const struct device *dev,
+				     struct npcx_wui *wui)
+{
+	ARG_UNUSED(dev);
+	ARG_UNUSED(wui);
+
+	LOG_DBG("%s: KSI%d is changed", __func__, wui->bit);
+	/* Wake-up keyboard scan task */
+	task_wake(TASK_ID_KEYSCAN);
+}
+
+static int cros_kb_raw_npcx_init(const struct device *dev)
+{
+	const struct cros_kb_raw_npcx_config *const config = DRV_CONFIG(dev);
+	struct kbs_reg *const inst = HAL_INSTANCE(dev);
+
+	/* Pull-up KBSIN0-7 internally */
+	inst->KBSINPU = 0xFF;
+
+	/*
+	 * Keyboard Scan Control Register
+	 *
+	 * [6:7] - KBHDRV KBSOUTn signals output buffers are open-drain.
+	 * [3] - KBSINC   Auto-increment of Buffer Data register is disabled
+	 * [2] - KBSIEN   Interrupt of Auto-Scan is disabled
+	 * [1] - KBSMODE  Key detection mechanism is implemented by firmware
+	 * [0] - START    Write 0 to this field is not affected
+	 */
+	inst->KBSCTL = 0x00;
+
+	/*
+	 * Select quasi-bidirectional buffers for KSO pins. It reduces the
+	 * low-to-high transition time. This feature only supports in npcx7.
+	 */
+	if (IS_ENABLED(CONFIG_KEYBOARD_KSO_HIGH_DRIVE)) {
+		SET_FIELD(inst->KBSCTL, NPCX_KBSCTL_KBHDRV_FIELD, 0x01);
+	}
+
+	/* Configure pin-mux for kscan device */
+	npcx_pinctrl_mux_configure(config->alts_list, config->alts_size, 1);
+
+	/* Drive all column lines to low for detection any key press */
+	cros_kb_raw_npcx_drive_column(dev, KEYBOARD_COLUMN_ALL);
+
+	/* Configure wake-up input and callback for keyboard input signal */
+	for (int i = 0; i < ARRAY_SIZE(ksi_callback); i++)
+		kb_raw_npcx_init_ksi_wui_callback(dev, &ksi_callback[i],
+						  &config->wui_maps[i],
+						  cros_kb_raw_npcx_ksi_isr);
+
+	return 0;
+}
+
+static const struct cros_kb_raw_driver_api cros_kb_raw_npcx_driver_api = {
+	.init = cros_kb_raw_npcx_init,
+	.drive_colum = cros_kb_raw_npcx_drive_column,
+	.read_rows = cros_kb_raw_npcx_read_row,
+};
+
+static const struct npcx_alt cros_kb_raw_alts[] = DT_NPCX_ALT_ITEMS_LIST(0);
+
+static const struct cros_kb_raw_npcx_config cros_kb_raw_cfg = {
+	.base = DT_INST_REG_ADDR(0),
+	.alts_size = ARRAY_SIZE(cros_kb_raw_alts),
+	.alts_list = cros_kb_raw_alts,
+	.clk_cfg = DT_NPCX_CLK_CFG_ITEM(0),
+	.irq = DT_INST_IRQN(0),
+	.wui_size = DT_NPCX_WUI_ITEMS_LEN(0),
+	.wui_maps = DT_NPCX_WUI_ITEMS_LIST(0),
+};
+
+DEVICE_AND_API_INIT(cros_kb_raw_npcx_0, DT_INST_LABEL(0), kb_raw_npcx_init,
+		    NULL, &cros_kb_raw_cfg, PRE_KERNEL_1,
+		    CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
+		    &cros_kb_raw_npcx_driver_api);
+
+/* KBS register structure check */
+NPCX_REG_SIZE_CHECK(kbs_reg, 0x010);
+NPCX_REG_OFFSET_CHECK(kbs_reg, KBSIN, 0x004);
+NPCX_REG_OFFSET_CHECK(kbs_reg, KBSOUT0, 0x006);
+NPCX_REG_OFFSET_CHECK(kbs_reg, KBS_BUF_INDX, 0x00a);
diff --git a/zephyr/dts/bindings/cros_kb_raw/cros-kb-raw-controller.yaml b/zephyr/dts/bindings/cros_kb_raw/cros-kb-raw-controller.yaml
new file mode 100644
index 0000000000..e8c95419e1
--- /dev/null
+++ b/zephyr/dts/bindings/cros_kb_raw/cros-kb-raw-controller.yaml
@@ -0,0 +1,12 @@
+# Copyright 2020 Google LLC
+# SPDX-License-Identifier: Apache-2.0
+
+# Common fields for Chrome OS raw keyboard devices
+
+include: base.yaml
+
+bus: croskb
+
+properties:
+    label:
+      required: true
diff --git a/zephyr/dts/bindings/cros_kb_raw/nuvoton,npcx-cros-kb-raw.yaml b/zephyr/dts/bindings/cros_kb_raw/nuvoton,npcx-cros-kb-raw.yaml
new file mode 100644
index 0000000000..7544039ffc
--- /dev/null
+++ b/zephyr/dts/bindings/cros_kb_raw/nuvoton,npcx-cros-kb-raw.yaml
@@ -0,0 +1,32 @@
+# Copyright 2020 Google LLC
+# SPDX-License-Identifier: Apache-2.0
+
+description: Nuvoton, NPCX-cros-kb-raw node
+
+compatible: "nuvoton,npcx-cros-kb-raw"
+
+include: cros-kb-raw-controller.yaml
+
+properties:
+    reg:
+        required: true
+
+    clocks:
+        required: true
+
+    pinctrl-0:
+        type: phandles
+        required: true
+        description: configurations of pinmux controllers
+
+    wui_maps:
+        type: phandles
+        required: true
+        description: |
+            Mapping table between Wake-Up Input (WUI) and 8 IOs belong to this device.
+            Please notice not all IOs connect to WUIs.
+
+            In this case, it will be presented by wui_none.
+            For example the WUI mapping on NPCX7 KSI pads would be
+               wui_maps = <&wui_io30 &wui_io31 &wui_io27 &wui_io26
+                           &wui_io25 &wui_io24 &wui_io23 &wui_io22>;
diff --git a/zephyr/include/drivers/cros_kb_raw.h b/zephyr/include/drivers/cros_kb_raw.h
new file mode 100644
index 0000000000..1724f59d95
--- /dev/null
+++ b/zephyr/include/drivers/cros_kb_raw.h
@@ -0,0 +1,169 @@
+/*
+ * Copyright 2020 Google LLC
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Chrome OS-specific API for raw keyboard access
+ * This exists only support the interface expected by the Chrome OS EC. It seems
+ * better to implement this so we can make use of most of the existing code in
+ * its keyboard_scan.c file and thus make sure we operate the same way.
+ *
+ * It provides raw access to keyboard GPIOs.
+ *
+ * The keyboard matrix is read (by the caller, keyboard_scan.c in ECOS) by
+ * driving output signals on the column lines and reading the row lines.
+ *
+ * This API and any drivers should be removed once we can safely move to using
+ * the Zephyr kscan API.
+ */
+
+#ifndef ZEPHYR_INCLUDE_DRIVERS_CROS_KB_RAW_H_
+#define ZEPHYR_INCLUDE_DRIVERS_CROS_KB_RAW_H_
+
+#include <kernel.h>
+#include <device.h>
+
+/**
+ * @brief CROS Keyboard Raw Driver APIs
+ * @defgroup cros_kb_raw_interface CROS Keyboard Raw Driver APIs
+ * @ingroup io_interfaces
+ * @{
+ */
+
+/**
+ * @cond INTERNAL_HIDDEN
+ *
+ * cros keyboard raw driver API definition and system call entry points
+ *
+ * (Internal use only.)
+ */
+typedef int (*cros_kb_raw_api_init)(const struct device *dev);
+
+typedef int (*cros_kb_raw_api_drive_column)(const struct device *dev, int col);
+
+typedef int (*cros_kb_raw_api_read_rows)(const struct device *dev);
+
+typedef int (*cros_kb_raw_api_enable_interrupt)(const struct device *dev,
+						int enable);
+
+__subsystem struct cros_kb_raw_driver_api {
+	cros_kb_raw_api_init init;
+	cros_kb_raw_api_drive_column drive_colum;
+	cros_kb_raw_api_read_rows read_rows;
+	cros_kb_raw_api_enable_interrupt enable_interrupt;
+};
+
+/**
+ * @endcond
+ */
+
+/**
+ * @brief Initialize the raw keyboard interface.
+ *
+ * Must be called before any other functions in this interface.
+ *
+ * @param dev Pointer to the device structure for the keyboard driver instance.
+ *
+ * @return 0 If successful.
+ * @retval -ENOTSUP Not supported api function.
+ */
+__syscall int cros_kb_raw_init(const struct device *dev);
+
+static inline int z_impl_cros_kb_raw_init(const struct device *dev)
+{
+	const struct cros_kb_raw_driver_api *api =
+		(const struct cros_kb_raw_driver_api *)dev->api;
+
+	if (!api->init) {
+		return -ENOTSUP;
+	}
+
+	return api->init(dev);
+}
+
+/**
+ * @brief Drive the specified column low.
+ *
+ * Other columns are tristated.  See enum keyboard_column_index for special
+ * values for <col>.
+ *
+ * @param dev Pointer to the device structure for the keyboard driver instance.
+ * @param col Specified column is driven to low.
+ *
+ * @return 0 If successful.
+ * @retval -ENOTSUP Not supported api function.
+ */
+__syscall int cros_kb_raw_drive_column(const struct device *dev, int col);
+static inline int z_impl_cros_kb_raw_drive_column(const struct device *dev,
+						  int col)
+{
+	const struct cros_kb_raw_driver_api *api =
+		(const struct cros_kb_raw_driver_api *)dev->api;
+
+	if (!api->drive_colum) {
+		return -ENOTSUP;
+	}
+
+	return api->drive_colum(dev, col);
+}
+
+/**
+ * @brief Read raw row state.
+ *
+ * Bits are 1 if signal is present, 0 if not present.
+ *
+ * @param dev Pointer to the device structure for the keyboard driver instance.
+ *
+ * @return current raw row state value.
+ */
+__syscall int cros_kb_raw_read_rows(const struct device *dev);
+static inline int z_impl_cros_kb_raw_read_rows(const struct device *dev)
+{
+	const struct cros_kb_raw_driver_api *api =
+		(const struct cros_kb_raw_driver_api *)dev->api;
+
+	if (!api->read_rows) {
+		return 0;
+	}
+
+	return api->read_rows(dev);
+}
+
+/**
+ * @brief Enable or disable keyboard interrupts.
+ *
+ * Enabling interrupts will clear any pending interrupt bits.  To avoid missing
+ * any interrupts that occur between the end of scanning and then, you should
+ * call cros_kb_raw_read_rows() after this.  If it returns non-zero, disable
+ * interrupts and go back to polling mode instead of waiting for an interrupt.
+ *
+ * @param dev Pointer to the device structure for the keyboard driver instance.
+ * @param enable If 1, enable keyboard interrupt. Otherwise, disable it.
+ *
+ * @return 0 If successful.
+ * @retval -ENOTSUP Not supported api function.
+ */
+__syscall int cros_kb_raw_enable_interrupt(const struct device *dev,
+					   int enable);
+
+static inline int z_impl_cros_kb_raw_enable_interrupt(const struct device *dev,
+						      int enable)
+{
+	const struct cros_kb_raw_driver_api *api =
+		(const struct cros_kb_raw_driver_api *)dev->api;
+
+	if (!api->enable_interrupt) {
+		return -ENOTSUP;
+	}
+
+	return api->enable_interrupt(dev, enable);
+}
+
+/**
+ * @}
+ */
+#include <syscalls/cros_kb_raw.h>
+#endif /* ZEPHYR_INCLUDE_DRIVERS_CROS_KB_RAW_H_ */
diff --git a/zephyr/include/dt-bindings/cros-kb-raw/npcx_cros_kb_raw.h b/zephyr/include/dt-bindings/cros-kb-raw/npcx_cros_kb_raw.h
new file mode 100644
index 0000000000..f979ae8481
--- /dev/null
+++ b/zephyr/include/dt-bindings/cros-kb-raw/npcx_cros_kb_raw.h
@@ -0,0 +1,9 @@
+/*
+ * Copyright 2020 Google LLC
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CROS_KB_RAW_NPCX_CROS_KB_RAW_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_CROS_KB_RAW_NPCX_CROS_KB_RAW_H_
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CROS_KB_RAW_NPCX_CROS_KB_RAW_H_ */
diff --git a/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h
new file mode 100644
index 0000000000..022c58fc24
--- /dev/null
+++ b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2020 Nuvoton Technology Corporation.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * @file
+ * @brief Nuvoton NPCX register structure definitions used by the Chrome OS EC.
+ */
+
+#ifndef _NUVOTON_NPCX_REG_DEF_CROS_H
+#define _NUVOTON_NPCX_REG_DEF_CROS_H
+
+/*
+ * KBS (Keyboard Scan) device registers
+ */
+struct kbs_reg {
+	volatile uint8_t reserved1[4];
+	/* 0x004: Keyboard Scan In */
+	volatile uint8_t KBSIN;
+	/* 0x005: Keyboard Scan In Pull-Up Enable */
+	volatile uint8_t KBSINPU;
+	/* 0x006: Keyboard Scan Out 0 */
+	volatile uint16_t KBSOUT0;
+	/* 0x008: Keyboard Scan Out 1 */
+	volatile uint16_t KBSOUT1;
+	/* 0x00A: Keyboard Scan Buffer Index */
+	volatile uint8_t KBS_BUF_INDX;
+	/* 0x00B: Keyboard Scan Buffer Data */
+	volatile uint8_t KBS_BUF_DATA;
+	/* 0x00C: Keyboard Scan Event */
+	volatile uint8_t KBSEVT;
+	/* 0x00D: Keyboard Scan Control */
+	volatile uint8_t KBSCTL;
+	/* 0x00E: Keyboard Scan Configuration Index */
+	volatile uint8_t KBS_CFG_INDX;
+	/* 0x00F: Keyboard Scan Configuration Data */
+	volatile uint8_t KBS_CFG_DATA;
+};
+
+/* KBS register fields */
+#define NPCX_KBSBUFINDX                  0
+#define NPCX_KBSEVT_KBSDONE              0
+#define NPCX_KBSEVT_KBSERR               1
+#define NPCX_KBSCTL_START                0
+#define NPCX_KBSCTL_KBSMODE              1
+#define NPCX_KBSCTL_KBSIEN               2
+#define NPCX_KBSCTL_KBSINC               3
+#define NPCX_KBSCTL_KBHDRV_FIELD         FIELD(6, 2)
+#define NPCX_KBSCFGINDX                  0
+/* Index of 'Automatic Scan' configuration register */
+#define KBS_CFG_INDX_DLY1                0 /* Keyboard Scan Delay T1 Byte */
+#define KBS_CFG_INDX_DLY2                1 /* Keyboard Scan Delay T2 Byte */
+#define KBS_CFG_INDX_RTYTO               2 /* Keyboard Scan Retry Timeout */
+#define KBS_CFG_INDX_CNUM                3 /* Keyboard Scan Columns Number */
+#define KBS_CFG_INDX_CDIV                4 /* Keyboard Scan Clock Divisor */
+
+#endif /* _NUVOTON_NPCX_REG_DEF_CROS_H */
diff --git a/zephyr/projects/volteer/CMakeLists.txt b/zephyr/projects/volteer/CMakeLists.txt
index 45b1e5300f..e73a98bb37 100644
--- a/zephyr/projects/volteer/CMakeLists.txt
+++ b/zephyr/projects/volteer/CMakeLists.txt
@@ -7,6 +7,15 @@ cmake_minimum_required(VERSION 3.13.1)
 set(BOARD_ROOT ${CMAKE_CURRENT_LIST_DIR})
 set(BOARD volteer)
 
+
+# Append {ZEPHYR_CHROME}/include/drivers to SYSCALL_INCLUDE_DIRS variable for
+# generating __syscall api functions by the `gen_syscalls.py` script.
+# TODO: remove this when zmake support
+list(APPEND
+    SYSCALL_INCLUDE_DIRS
+    ${CMAKE_CURRENT_LIST_DIR}/../../../include/drivers
+)
+
 find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
 project(volteer)
 
diff --git a/zephyr/projects/volteer/boards/arm/volteer/volteer.dts b/zephyr/projects/volteer/boards/arm/volteer/volteer.dts
index 0d8b3d9af8..1c087afbc8 100644
--- a/zephyr/projects/volteer/boards/arm/volteer/volteer.dts
+++ b/zephyr/projects/volteer/boards/arm/volteer/volteer.dts
@@ -345,6 +345,43 @@
 			label = "EC_KSO_02_INV";
 		};
 	};
+
+	soc {
+		cros_kb_raw: cros-kb-raw@400a3000 {
+			compatible = "nuvoton,npcx-cros-kb-raw";
+			reg = <0x400a3000 0x2000>;
+			label = "CROS_KB_RAW_0";
+			interrupts = <49 0>;
+			clocks = <&pcc NPCX_CLOCK_BUS_APB1 NPCX_PWDWN_CTL1 0>;
+			/* No KSO2 (it's inverted and implemented by GPIO.) */
+			pinctrl-0 = <&alt7_no_ksi0_sl /* KSI0 PIN31 */
+				     &alt7_no_ksi1_sl /* KSI1 PIN30 */
+				     &alt7_no_ksi2_sl /* KSI2 PIN27 */
+				     &alt7_no_ksi3_sl /* KSI3 PIN26 */
+				     &alt7_no_ksi4_sl /* KSI4 PIN25 */
+				     &alt7_no_ksi5_sl /* KSI5 PIN24 */
+				     &alt7_no_ksi6_sl /* KSI6 PIN23 */
+				     &alt7_no_ksi7_sl /* KSI7 PIN22 */
+				     &alt8_no_kso00_sl /* KSO00 PIN21 */
+				     &alt8_no_kso01_sl /* KSO01 PIN20 */
+				     &alt8_no_kso03_sl /* KSO03 PIN16 */
+				     &alt8_no_kso04_sl /* KSO04 PIN15 */
+				     &alt8_no_kso05_sl /* KSO05 PIN14 */
+				     &alt8_no_kso06_sl /* KSO06 PIN13 */
+				     &alt8_no_kso07_sl /* KSO07 PIN12 */
+				     &alt9_no_kso08_sl /* KSO08 PIN11 */
+				     &alt9_no_kso09_sl /* KSO09 PIN10 */
+				     &alt9_no_kso10_sl /* KSO10 PIN07 */
+				     &alt9_no_kso11_sl /* KSO11 PIN06 */
+				     &alt9_no_kso12_sl /* KSO12 PIN05 */
+				     &alt9_no_kso13_sl /* KSO13 PIN04 */
+				     &alt9_no_kso14_sl /* KSO14 PIN82 */
+				     >;
+			wui_maps = <&wui_io31 &wui_io30 &wui_io27 &wui_io26
+				    &wui_io25 &wui_io24 &wui_io23 &wui_io22>;
+			status = "disabled";
+		};
+	};
 };
 
 /* Update flash size to 512KB from 196KB since we are using C variant */
@@ -381,3 +418,7 @@
 &i2c7_0 {
 	status = "okay";
 };
+
+&cros_kb_raw {
+	status = "okay";
+};
diff --git a/zephyr/projects/volteer/include/gpio_map.h b/zephyr/projects/volteer/include/gpio_map.h
index cab599a7ef..01f5c30206 100644
--- a/zephyr/projects/volteer/include/gpio_map.h
+++ b/zephyr/projects/volteer/include/gpio_map.h
@@ -28,6 +28,7 @@
 #define GPIO_EN_PP5000             NAMED_GPIO(en_pp5000_a)
 #define GPIO_EN_PP5000_A           NAMED_GPIO(en_pp5000_a)
 #define GPIO_EN_PPVAR_VCCIN        NAMED_GPIO(en_ppvar_vccin)
+#define GPIO_KBD_KSO2              NAMED_GPIO(ec_kso_02_inv)
 #define GPIO_LID_OPEN              NAMED_GPIO(ec_lid_open)
 #define GPIO_PCH_DSW_PWROK         NAMED_GPIO(ec_pch_dsw_pwrok)
 #define GPIO_PCH_PWRBTN_L          NAMED_GPIO(ec_pch_pwr_btn_odl)
diff --git a/zephyr/projects/volteer/include/shimmed_tasks.h b/zephyr/projects/volteer/include/shimmed_tasks.h
index 4011dae64c..eb1cedffcf 100644
--- a/zephyr/projects/volteer/include/shimmed_tasks.h
+++ b/zephyr/projects/volteer/include/shimmed_tasks.h
@@ -13,6 +13,7 @@
 #define HAS_TASK_CHIPSET 1
 #define HAS_TASK_HOSTCMD 1
 #define HAS_TASK_KEYPROTO 1
+#define HAS_TASK_KEYSCAN 1
 #define HAS_TASK_POWERBTN 1
 
 /*
@@ -23,6 +24,7 @@
 	CROS_EC_TASK(CHIPSET, chipset_task, 0, 512)            \
 	CROS_EC_TASK(HOSTCMD, host_command_task, 0, 512)       \
 	CROS_EC_TASK(KEYPROTO, keyboard_protocol_task, 0, 512) \
-	CROS_EC_TASK(POWERBTN, power_button_task, 0, 512)
+	CROS_EC_TASK(POWERBTN, power_button_task, 0, 512)      \
+	CROS_EC_TASK(KEYSCAN, keyboard_scan_task, 0, 512)
 
 #endif /* __CROS_EC_SHIMMED_TASKS_H */
diff --git a/zephyr/projects/volteer/prj.conf b/zephyr/projects/volteer/prj.conf
index 6d67a06c7c..42bd5af499 100644
--- a/zephyr/projects/volteer/prj.conf
+++ b/zephyr/projects/volteer/prj.conf
@@ -14,6 +14,7 @@ CONFIG_PLATFORM_EC=y
 CONFIG_I2C=y
 CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y
 CONFIG_PLATFORM_EC_KEYBOARD=y
+CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y
 CONFIG_PLATFORM_EC_LID_SWITCH=y
 CONFIG_PLATFORM_EC_POWER_BUTTON=y