diff options
| author | dnojiri <dnojiri@chromium.org> | 2020-01-22 19:06:05 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-04-02 06:03:33 +0000 |
| commit | 1ab1ad2dfbcc0534fad19410d3897f66f69b4d11 (patch) | |
| tree | 947a9c79fc84cb09329600ee74085ca0d8fd135d | |
| parent | 6c151316e396a78156371be972c4997bb1266524 (diff) | |
| download | chrome-ec-1ab1ad2dfbcc0534fad19410d3897f66f69b4d11.tar.gz | |
EFS2: Enable Early Firmware Selection V2 for Puff
Puff currently uses EFS1. This patch upgrades EFS to V2.
Signed-off-by: dnojiri <dnojiri@chromium.org>
BUG=b/147298634
BRANCH=none
TEST=Verify software sync on Puff.
Cq-Depend: chromium:2132693
Change-Id: I23de5b46c6e82577569246bd9cd8952e82a6b2f2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2132870
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Tested-by: Peter Marheine <pmarheine@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
| -rw-r--r-- | board/puff/board.h | 39 | ||||
| -rw-r--r-- | board/puff/gpio.inc | 2 |
2 files changed, 2 insertions, 39 deletions
diff --git a/board/puff/board.h b/board/puff/board.h index 8f8bd0314c..1f605f43db 100644 --- a/board/puff/board.h +++ b/board/puff/board.h @@ -44,48 +44,11 @@ #undef CONFIG_LID_SWITCH #define CONFIG_LTO #define CONFIG_PWM -#define CONFIG_VBOOT_EFS +#define CONFIG_VBOOT_EFS2 #define CONFIG_VBOOT_HASH #define CONFIG_VSTORE #define CONFIG_VSTORE_SLOT_COUNT 1 - -/* - * Override Flash layout for EFS. - * - * 3 images are stored: RO, RW-A and RW-B. RO must be one of 64k, 128k or 256k - * in size to be correctly protected by the hardware block protection. RW must - * be the same size as RO, so divide the flash into four equal-size blocks. - * - * A public key is stored at the end of RO. Signatures are stored at the - * end of RW_A and RW_B, respectively. - */ -#define CONFIG_RW_B -#define CONFIG_RW_B_MEM_OFF CONFIG_RO_MEM_OFF -#undef CONFIG_RO_SIZE -#define CONFIG_RO_SIZE (CONFIG_FLASH_SIZE / 4) -#undef CONFIG_RW_SIZE -#define CONFIG_RW_SIZE CONFIG_RO_SIZE -#define CONFIG_RW_A_STORAGE_OFF CONFIG_RW_STORAGE_OFF -#define CONFIG_RW_B_STORAGE_OFF (CONFIG_RW_A_STORAGE_OFF + \ - CONFIG_RW_SIZE) -#define CONFIG_RW_A_SIGN_STORAGE_OFF (CONFIG_RW_A_STORAGE_OFF + \ - CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE) -#define CONFIG_RW_B_SIGN_STORAGE_OFF (CONFIG_RW_B_STORAGE_OFF + \ - CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE) - -#define CONFIG_RWSIG -#define CONFIG_RWSIG_TYPE_RWSIG -#define CONFIG_RSA -#ifdef SECTION_IS_RO -#define CONFIG_RSA_OPTIMIZED -#endif #define CONFIG_SHA256 -#ifdef SECTION_IS_RO -#define CONFIG_SHA256_UNROLLED -#endif -#define CONFIG_RSA_KEY_SIZE 3072 -#define CONFIG_RSA_EXPONENT_3 - #define CONFIG_SUPPRESSED_HOST_COMMANDS \ EC_CMD_CONSOLE_SNAPSHOT, EC_CMD_CONSOLE_READ, EC_CMD_PD_GET_LOG_ENTRY diff --git a/board/puff/gpio.inc b/board/puff/gpio.inc index 82f53aa48b..daf302d8d7 100644 --- a/board/puff/gpio.inc +++ b/board/puff/gpio.inc @@ -84,6 +84,7 @@ GPIO(M2_SSD_PLN, PIN(A, 0), GPIO_INPUT) GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_ODR_HIGH) GPIO(EN_PP_MST_OD, PIN(9, 6), GPIO_ODR_HIGH) +GPIO(PACKET_MODE_EN, PIN(7, 5), GPIO_OUT_LOW) /* HDMI/CEC */ GPIO(EN_PP5000_HDMI, PIN(5, 0), GPIO_OUT_LOW) @@ -152,7 +153,6 @@ UNUSED(PIN(5, 6)) /* M2 NC */ UNUSED(PIN(D, 2)) /* C11 NC */ UNUSED(PIN(D, 3)) /* E9 NC */ UNUSED(PIN(8, 6)) /* J8 NC */ -UNUSED(PIN(7, 5)) /* J6 NC */ UNUSED(PIN(9, 3)) /* M11 NC */ UNUSED(PIN(7, 2)) /* H6 NC */ UNUSED(PIN(F, 1)) /* G3 NC */ |