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authorRandall Spangler <rspangler@chromium.org>2017-08-29 12:41:46 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-08-29 19:37:05 -0700
commit63deaa4f59e7a769ea5ea24a6528a1b5adda5211 (patch)
tree7a704230d98cdf2030131de10cbdfbbb5c47a60d
parent3dc0eae365305c84947fff5d1976e74d950b04e3 (diff)
downloadchrome-ec-63deaa4f59e7a769ea5ea24a6528a1b5adda5211.tar.gz
cr50: Configure AP detect GPIO based on correct config
Now that there are separate board config functions, use !board_detect_ap_with_tpm_rst() to decide whether to configure DETECT_AP on DIOA3, not board_use_plt_rst(). BUG=none BRANCH=cr50 TEST=Boot cr50 strapped to use platform reset. See that 'gpioget' shows DETECT_AP does not respond to changes on the DIOA3 pin. Boot cr50 strapped not to use platform reset. See that 'gpioget' shows DETECT_AP responds to changes on DIOA3. Change-Id: Ieb05015c948b2bbafa744f00a11e6b3da143ca5b Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/642120 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
-rw-r--r--board/cr50/board.c37
1 files changed, 21 insertions, 16 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c
index 7fc590ec76..96a6f41810 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -494,15 +494,6 @@ void board_configure_deep_sleep_wakepins(void)
/* enable powerdown exit */
GWRITE_FIELD(PINMUX, EXITEN0, DIOM3, 1);
} else {
- /*
- * DIOA3 is GPIO_DETECT_AP which is used to detect if the AP
- * is in S0. If the AP is in s0, cr50 should not be in deep
- * sleep so wake up.
- */
- GWRITE_FIELD(PINMUX, EXITEDGE0, DIOA3, 0); /* level sensitive */
- GWRITE_FIELD(PINMUX, EXITINV0, DIOA3, 0); /* wake on high */
- GWRITE_FIELD(PINMUX, EXITEN0, DIOA3, 1);
-
/*
* Configure cr50 to wake when sys_rst_l is asserted. It is
* wake on low to make sure that Cr50 is awake to detect the
@@ -517,6 +508,17 @@ void board_configure_deep_sleep_wakepins(void)
/* enable powerdown exit */
GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 1);
}
+
+ if (!board_detect_ap_with_tpm_rst()) {
+ /*
+ * DIOA3 is GPIO_DETECT_AP which is used to detect if the AP
+ * is in S0. If the AP is in s0, cr50 should not be in deep
+ * sleep so wake up.
+ */
+ GWRITE_FIELD(PINMUX, EXITEDGE0, DIOA3, 0); /* level sensitive */
+ GWRITE_FIELD(PINMUX, EXITINV0, DIOA3, 0); /* wake on high */
+ GWRITE_FIELD(PINMUX, EXITEN0, DIOA3, 1);
+ }
}
static void deferred_tpm_rst_isr(void);
@@ -554,7 +556,7 @@ static void configure_board_specific_gpios(void)
/* No interrupts from AP UART TX state change are needed. */
gpio_disable_interrupt(GPIO_DETECT_AP);
- /* Enbale the input */
+ /* Enable the input */
GWRITE_FIELD(PINMUX, DIOM3_CTL, IE, 1);
/*
@@ -578,14 +580,9 @@ static void configure_board_specific_gpios(void)
/* Use sys_rst_l as the tpm reset signal. */
GWRITE(PINMUX, GPIO1_GPIO0_SEL, GC_PINMUX_DIOM0_SEL);
- /* Enbale the input */
+ /* Enable the input */
GWRITE_FIELD(PINMUX, DIOM0_CTL, IE, 1);
- /* Use AP UART TX as the DETECT AP signal. */
- GWRITE(PINMUX, GPIO1_GPIO1_SEL, GC_PINMUX_DIOA3_SEL);
- /* Enbale the input */
- GWRITE_FIELD(PINMUX, DIOA3_CTL, IE, 1);
-
/* Set to be level sensitive */
GWRITE_FIELD(PINMUX, EXITEDGE0, DIOM0, 0);
/* wake on low */
@@ -593,6 +590,7 @@ static void configure_board_specific_gpios(void)
/* Enable powerdown exit on DIOM0 */
GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 1);
}
+
/*
* If the TPM_RST_L signal is already high when cr50 wakes up or
* transitions to high before we are able to configure the gpio then
@@ -602,6 +600,13 @@ static void configure_board_specific_gpios(void)
*/
if (gpio_get_level(GPIO_TPM_RST_L))
hook_call_deferred(&deferred_tpm_rst_isr_data, 0);
+
+ if (!board_detect_ap_with_tpm_rst()) {
+ /* Use AP UART TX as the DETECT AP signal. */
+ GWRITE(PINMUX, GPIO1_GPIO1_SEL, GC_PINMUX_DIOA3_SEL);
+ /* Enable the input */
+ GWRITE_FIELD(PINMUX, DIOA3_CTL, IE, 1);
+ }
}
void decrement_retry_counter(void)