cr50: introduce RO image skeleton

The CR50 board will have to have a very different RO image, let's make
it possible to override the default list of objects compiled by the
top level makefile with a board/chip specific list compiled in the
appropriate build.mk file.

The CR50 RO will never run on its own for long time, it will always
load an RW and go straight to it, so there is no need in running under
the OS control, using sophisticated console channel controls, etc.

The gist of the functionality is verifying the RW image to run and
setting up the hardware to allow the picked image to execute, it will
be added in the following patches. This change just provides the
plumbing and shows the 'hello world' implementation for the customized
RO image.

A better solution could be the ability to create distinct sets of make
variables for RO and RW, a tracker item was created to look into this.

BRANCH=None
BUG=chrome-os-partner:43025, chromium:551151
TEST=built and started ec.RO.hex on cr50, observed the 'hello world'
     message on the console.

Change-Id: Ie67ff28bec3a9788898e99483eedb0ef77de38cd
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/310410
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

5 files changed, 121 insertions, 1 deletions

diff --git a/Makefile b/Makefile
index 1736fd1a85..bac644327f 100644
--- a/Makefile
+++ b/Makefile
@@ -154,7 +154,12 @@ dirs+= private private-cr51
 dirs+=$(shell find driver -type d)
 common_dirs=util
 
+ifeq ($(custom-ro_objs-y),)
 ro-objs := $(sort $(foreach obj, $(all-obj-y), $(out)/RO/$(obj)))
+else
+ro-objs := $(sort $(foreach obj, $(custom-ro_objs-y), $(out)/RO/$(obj)))
+endif
+
 rw-objs := $(sort $(foreach obj, $(all-obj-y), $(out)/RW/$(obj)))
 
 # Don't include the shared objects in the RO/RW image if we're enabling
diff --git a/chip/g/build.mk b/chip/g/build.mk
index 4450faf43a..2981b9c0ae 100644
--- a/chip/g/build.mk
+++ b/chip/g/build.mk
@@ -34,11 +34,19 @@ chip-$(CONFIG_WATCHDOG)+=watchdog.o
 chip-$(CONFIG_USB)+=usb.o usb_endpoints.o
 chip-$(CONFIG_USB_CONSOLE)+=usb_console.o
 chip-$(CONFIG_USB_HID)+=usb_hid.o
-# TODO(wfrichar): Document this (and all other CONFIG_USB_*) in config.h
 chip-$(CONFIG_USB_BLOB)+=usb_blob.o
 
 chip-$(CONFIG_FLASH)+=flash.o
 
+custom-ro_objs-y  = chip/g/loader/main.o
+custom-ro_objs-y += chip/g/system.o chip/g/uart.o
+custom-ro_objs-y += common/printf.o
+custom-ro_objs-y += common/util.o
+custom-ro_objs-y += core/cortex-m/init.o
+custom-ro_objs-y += core/cortex-m/panic.o
+
+dirs-y += chip/g/loader
+
 $(out)/RO/ec.RO.flat: $(out)/util/signer
 
 $(out)/RO/ec.RO.hex: $(out)/RO/ec.RO.flat
diff --git a/chip/g/loader/debug_printf.h b/chip/g/loader/debug_printf.h
new file mode 100644
index 0000000000..ff31e005a9
--- /dev/null
+++ b/chip/g/loader/debug_printf.h
@@ -0,0 +1,10 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+#ifndef __EC_CHIP_G_LOADER_DEBUG_PRINTF_H
+#define __EC_CHIP_G_LOADER_DEBUG_PRINTF_H
+
+void debug_printf(const char *format, ...);
+
+#endif /* __EC_CHIP_G_LOADER_DEBUG_PRINTF_H */
diff --git a/chip/g/loader/main.c b/chip/g/loader/main.c
new file mode 100644
index 0000000000..6e913dcf6d
--- /dev/null
+++ b/chip/g/loader/main.c
@@ -0,0 +1,93 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "common.h"
+#include "debug_printf.h"
+#include "printf.h"
+#include "system.h"
+#include "uart.h"
+
+/*
+ * This file is a proof of concept stub which will be extended and split into
+ * appropriate pieces sortly, when full blown support for cr50 bootrom is
+ * introduced.
+ */
+uint32_t sleep_mask;
+
+timestamp_t get_time(void)
+{
+	timestamp_t ret;
+
+	ret.val = 0;
+
+	return ret;
+}
+
+static int panic_txchar(void *context, int c)
+{
+	if (c == '\n')
+		panic_txchar(context, '\r');
+
+	/* Wait for space in transmit FIFO */
+	while (!uart_tx_ready())
+		;
+
+	/* Write the character directly to the transmit FIFO */
+	uart_write_char(c);
+
+	return 0;
+}
+
+void panic_puts(const char *outstr)
+{
+	/* Put all characters in the output buffer */
+	while (*outstr)
+		panic_txchar(NULL, *outstr++);
+}
+
+void panic_printf(const char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	vfnprintf(panic_txchar, NULL, format, args);
+	va_end(args);
+}
+
+int main(void)
+{
+	debug_printf("Hello world\n");
+	while (1)
+		;
+}
+
+void panic_reboot(void)
+{
+	panic_puts("\n\nRebooting...\n");
+	system_reset(0);
+}
+
+void interrupt_disable(void)
+{
+	asm("cpsid i");
+}
+
+static int printchar(void *context, int c)
+{
+	if (c == '\n')
+		uart_write_char('\r');
+	uart_write_char(c);
+
+	return 0;
+}
+
+void debug_printf(const char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	vfnprintf(printchar, NULL, format, args);
+	va_end(args);
+}
diff --git a/chip/g/uart.c b/chip/g/uart.c
index d48b6e3d9b..9af6990a1a 100644
--- a/chip/g/uart.c
+++ b/chip/g/uart.c
@@ -92,6 +92,7 @@ int uart_read_char(void)
 	return GR_UART_RDATA(0);
 }
 
+#ifndef SECTION_IS_RO
 void uart_disable_interrupt(void)
 {
 	task_disable_irq(GC_IRQNUM_UART0_TXINT);
@@ -126,6 +127,7 @@ void uart_ec_rx_interrupt(void)
 	uart_process_input();
 }
 DECLARE_IRQ(GC_IRQNUM_UART0_RXINT, uart_ec_rx_interrupt, 1);
+#endif  /* SECTION_IS_RO ^^^^^^ NOT defined. */
 
 void uart_init(void)
 {
@@ -149,8 +151,10 @@ void uart_init(void)
 	/* Note: doesn't do anything unless turned on in NVIC */
 	GR_UART_ICTRL(0) = 0x02;
 
+#ifndef SECTION_IS_RO
 	/* Enable interrupts for UART0 only */
 	uart_enable_interrupt();
+#endif
 
 	done_uart_init_yet = 1;
 }