diff options
| author | Chris Zhong <zyw@rock-chips.com> | 2014-09-11 11:07:53 +0800 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-09-13 02:19:22 +0000 |
| commit | 05518c0dbb2306111020a35985386a71abe609a8 (patch) | |
| tree | 6620f6c8b884d930b26b96abcadc9ead0ee4ce9b | |
| parent | 0ec258f930ddabb2afb7495d9cd8c6589c5e4ad6 (diff) | |
| download | chrome-ec-05518c0dbb2306111020a35985386a71abe609a8.tar.gz | |
Veyron: Fix leakage power before AP running
EC needs to ensure EC_INT & SPI_CS are in input state or output low, Before AP on.
Otherwise it will cause leakage to AP, and power_on timing is incorrect.
BUG=None
TEST=power_on timing is correct.
BRANCH=None
Change-Id: I2dc9c35b4782e4f5c138b31944af21d8248215cd
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/217691
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alexandru Stan <amstan@chromium.org>
Commit-Queue: Alexandru Stan <amstan@chromium.org>
Tested-by: Alexandru Stan <amstan@chromium.org>
| -rw-r--r-- | board/veyron/gpio.inc | 4 | ||||
| -rw-r--r-- | power/rockchip.c | 3 |
2 files changed, 2 insertions, 5 deletions
diff --git a/board/veyron/gpio.inc b/board/veyron/gpio.inc index 7e2a583388..37c91c80f7 100644 --- a/board/veyron/gpio.inc +++ b/board/veyron/gpio.inc @@ -10,7 +10,7 @@ GPIO(POWER_BUTTON_L, B, 5, GPIO_INT_BOTH, power_button_interrupt GPIO(SOC_POWER_GOOD, A, 3, GPIO_INT_BOTH , power_signal_interrupt) GPIO(LID_OPEN, C, 13, GPIO_INT_BOTH, lid_interrupt) GPIO(SUSPEND_L, C, 7, GPIO_INT_BOTH, power_signal_interrupt) -GPIO(SPI1_NSS, A, 4, GPIO_INT_BOTH | GPIO_PULL_UP, spi_event) +GPIO(SPI1_NSS, A, 4, GPIO_INT_BOTH, spi_event) GPIO(AC_PRESENT, A, 0, GPIO_INT_BOTH, extpower_interrupt) /* Keyboard inputs */ @@ -30,7 +30,7 @@ GPIO(WP_L, B, 4, GPIO_INPUT, NULL) GPIO(BAT_LED0, B, 11, GPIO_OUT_LOW, NULL) GPIO(BAT_LED1, A, 11, GPIO_OUT_LOW, NULL) GPIO(EC_BL_OVERRIDE, F, 1, GPIO_OUT_LOW, NULL) -GPIO(EC_INT, B, 9, GPIO_OUT_HIGH, NULL) +GPIO(EC_INT, B, 9, GPIO_OUT_LOW, NULL) GPIO(ENTERING_RW, F, 0, GPIO_OUT_LOW, NULL) GPIO(I2C1_SCL, B, 6, GPIO_ODR_HIGH, NULL) GPIO(I2C1_SDA, B, 7, GPIO_ODR_HIGH, NULL) diff --git a/power/rockchip.c b/power/rockchip.c index 8052a66d3a..28b6025381 100644 --- a/power/rockchip.c +++ b/power/rockchip.c @@ -382,9 +382,6 @@ static void power_on(void) /* Wait till the AP has SPI ready */ usleep(PMIC_SPI_READY_TIME); - gpio_set_flags(GPIO_SPI1_NSS, GPIO_INPUT | GPIO_INT_BOTH - | GPIO_PULL_UP); - /* enable interrupt */ gpio_set_flags(GPIO_SUSPEND_L, GPIO_INPUT | GPIO_INT_BOTH | GPIO_PULL_DOWN); |