summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorVic Yang <victoryang@chromium.org>2014-08-13 10:00:28 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-08-14 22:44:44 +0000
commit9262797ee6816e81b7523bcabfac5e30cf0c6226 (patch)
tree2f6095d3cce8fcc6a407a7faf7622631b292fc14
parentc8fa85d0b4ccafc4243f62f073f21c883d574042 (diff)
downloadchrome-ec-9262797ee6816e81b7523bcabfac5e30cf0c6226.tar.gz
pd: Print warning before flash erase if on PD power
During flash erase operation, read is stalled and thus interrupt might be serviced later. This can cause PD communication to fail and thus the board reboots if there is no battery. Print a warning message in this case. BUG=chrome-os-partner:31127,chrome-os-partner:31207,chrome-os-partner:31362 TEST=Boot Ryu, on software sync, see warning message before board reboots. BRANCH=None Change-Id: If327a4f533fd2dfa83f92531148bd52ace927e03 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/212264 Reviewed-by: Alec Berg <alecaberg@chromium.org>
-rw-r--r--board/ryu/board.h1
-rw-r--r--board/samus_pd/board.c21
-rw-r--r--board/samus_pd/board.h7
-rw-r--r--board/samus_pd/usb_pd_policy.c5
-rw-r--r--chip/stm32/flash-stm32f.c18
-rw-r--r--driver/battery/bq27541.c8
-rw-r--r--include/config.h3
7 files changed, 59 insertions, 4 deletions
diff --git a/board/ryu/board.h b/board/ryu/board.h
index a59db2f93f..973bcc487f 100644
--- a/board/ryu/board.h
+++ b/board/ryu/board.h
@@ -22,6 +22,7 @@
#define CONFIG_STM_HWTIMER32
#define CONFIG_USB_POWER_DELIVERY
#define CONFIG_USB_PD_DUAL_ROLE
+#define CONFIG_USB_PD_FLASH_ERASE_CHECK
#define CONFIG_USB_PD_INTERNAL_COMP
#define CONFIG_USBC_SS_MUX
#define CONFIG_ADC
diff --git a/board/samus_pd/board.c b/board/samus_pd/board.c
index 8cedf23f1c..519060424d 100644
--- a/board/samus_pd/board.c
+++ b/board/samus_pd/board.c
@@ -6,6 +6,7 @@
#include "adc.h"
#include "adc_chip.h"
+#include "battery.h"
#include "common.h"
#include "console.h"
#include "gpio.h"
@@ -21,6 +22,9 @@
/* Chipset power state */
static enum power_state ps;
+/* Battery state of charge */
+int batt_soc;
+
void vbus0_evt(enum gpio_signal signal)
{
ccprintf("VBUS %d, %d!\n", signal, gpio_get_level(signal));
@@ -260,3 +264,20 @@ int board_get_usb_mux(int port, const char **dp_str, const char **usb_str)
return has_ss;
}
+
+void board_update_battery_soc(int soc)
+{
+ batt_soc = soc;
+}
+
+int board_get_battery_soc(void)
+{
+ return batt_soc;
+}
+
+enum battery_present battery_is_present(void)
+{
+ if (batt_soc >= 0)
+ return BP_YES;
+ return BP_NOT_SURE;
+}
diff --git a/board/samus_pd/board.h b/board/samus_pd/board.h
index a292bc5981..87cef022b9 100644
--- a/board/samus_pd/board.h
+++ b/board/samus_pd/board.h
@@ -23,6 +23,7 @@
#define CONFIG_USB_PD_COMM_ENABLED 0
#define CONFIG_USB_PD_CUSTOM_VDM
#define CONFIG_USB_PD_DUAL_ROLE
+#define CONFIG_USB_PD_FLASH_ERASE_CHECK
#define CONFIG_USB_PD_INTERNAL_COMP
#define CONFIG_USBC_SS_MUX
#define CONFIG_ADC
@@ -69,6 +70,12 @@ enum adc_channel {
ADC_CH_COUNT
};
+/* Called when we receive battery level info from the EC. */
+void board_update_battery_soc(int soc);
+
+/* Get the last received battery level. */
+int board_get_battery_soc(void);
+
#endif /* !__ASSEMBLER__ */
#endif /* __BOARD_H */
diff --git a/board/samus_pd/usb_pd_policy.c b/board/samus_pd/usb_pd_policy.c
index 4edbed4f79..399cd06e48 100644
--- a/board/samus_pd/usb_pd_policy.c
+++ b/board/samus_pd/usb_pd_policy.c
@@ -33,9 +33,6 @@ const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
/* Cap on the max voltage requested as a sink (in millivolts) */
static unsigned max_mv = -1; /* no cap */
-/* Battery state of charge percentage */
-static int batt_soc;
-
/* PD MCU status for host response */
static struct ec_response_pd_status pd_status;
@@ -224,7 +221,7 @@ static int ec_status_host_cmd(struct host_cmd_handler_args *args)
const struct ec_params_pd_status *p = args->params;
struct ec_response_pd_status *r = args->response;
- batt_soc = p->batt_soc;
+ board_update_battery_soc(p->batt_soc);
*r = pd_status;
diff --git a/chip/stm32/flash-stm32f.c b/chip/stm32/flash-stm32f.c
index a49701740c..52220e4d23 100644
--- a/chip/stm32/flash-stm32f.c
+++ b/chip/stm32/flash-stm32f.c
@@ -5,6 +5,7 @@
/* Flash memory module for Chrome EC */
+#include "battery.h"
#include "console.h"
#include "flash.h"
#include "hooks.h"
@@ -281,6 +282,23 @@ int flash_physical_erase(int offset, int size)
{
int res = EC_SUCCESS;
+#ifdef CONFIG_USB_PD_FLASH_ERASE_CHECK
+ /*
+ * During flash erase operation, read is stalled and thus interrupt
+ * might be serviced later. This can cause PD communication to fail.
+ * This is unlikely going to affect normal users as they have
+ * batteries. However, print a warning in the console for developers
+ * without a battery.
+ *
+ * TODO(crosbug.com/p/31362): Remove this when PD ping is disabled.
+ */
+ if (battery_is_present() != BP_YES) {
+ ccprintf("WARNING: Performing flash erase while running on "
+ "USB PD power only!\n");
+ cflush();
+ }
+#endif
+
if (unlock(PRG_LOCK) != EC_SUCCESS)
return EC_ERROR_UNKNOWN;
diff --git a/driver/battery/bq27541.c b/driver/battery/bq27541.c
index ee8d2cc61d..dfa5fe01ba 100644
--- a/driver/battery/bq27541.c
+++ b/driver/battery/bq27541.c
@@ -189,6 +189,14 @@ int battery_status(int *status)
return EC_ERROR_UNIMPLEMENTED;
}
+enum battery_present battery_is_present(void)
+{
+ int v;
+ if (bq27541_read(REG_TEMPERATURE, &v))
+ return BP_NOT_SURE;
+ return BP_YES;
+}
+
void battery_get_params(struct batt_params *batt)
{
int v;
diff --git a/include/config.h b/include/config.h
index aa388ca69b..7ae00dfb44 100644
--- a/include/config.h
+++ b/include/config.h
@@ -917,6 +917,9 @@
/* Define if this board can act as a dual-role PD port (source and sink) */
#undef CONFIG_USB_PD_DUAL_ROLE
+/* Check whether PD is the sole power source before flash erase operation */
+#undef CONFIG_USB_PD_FLASH_ERASE_CHECK
+
/* USB PD MCU slave address for host commands */
#define CONFIG_USB_PD_I2C_SLAVE_ADDR 0x3c