summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorVic Yang <victoryang@chromium.org>2014-08-07 13:53:15 -0700
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-08-08 03:14:45 +0000
commit8bbee7645840cf9f96b2f0343ab68571c02322a2 (patch)
treebbd00551dbaf7f818bd41b980a87ee352bd54e04
parent866b1939d6af64dd604d0b404a55c1c19236ce84 (diff)
downloadchrome-ec-8bbee7645840cf9f96b2f0343ab68571c02322a2.tar.gz
stm32f0: stm32l: Fix backup register indexing
On stm32f0 and stm32l, the backup registers are 32-bit. Fix the index calculation. BUG=chrome-os-partner:31214 TEST=On Ryu, save and load VbNvContext BRANCH=None Change-Id: I86e5dc31c80bed46a6fe13929c7e6a1d4ca9f97b Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211462 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
-rw-r--r--chip/stm32/system.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/chip/stm32/system.c b/chip/stm32/system.c
index 27ed7398e9..89ee7a76e4 100644
--- a/chip/stm32/system.c
+++ b/chip/stm32/system.c
@@ -40,7 +40,14 @@ static uint16_t bkpdata_read(enum bkpdata_index index)
if (index < 0 || index >= STM32_BKP_ENTRIES)
return 0;
+#if defined(CHIP_FAMILY_STM32L) || defined(CHIP_FAMILY_STM32F0)
+ if (index & 1)
+ return STM32_BKP_DATA(index >> 1) >> 16;
+ else
+ return STM32_BKP_DATA(index >> 1) & 0xFFFF;
+#else
return STM32_BKP_DATA(index);
+#endif
}
/**
@@ -53,7 +60,19 @@ static int bkpdata_write(enum bkpdata_index index, uint16_t value)
if (index < 0 || index >= STM32_BKP_ENTRIES)
return EC_ERROR_INVAL;
+#if defined(CHIP_FAMILY_STM32L) || defined(CHIP_FAMILY_STM32F0)
+ if (index & 1) {
+ uint32_t val = STM32_BKP_DATA(index >> 1);
+ val = (val & 0x0000FFFF) | (value << 16);
+ STM32_BKP_DATA(index >> 1) = val;
+ } else {
+ uint32_t val = STM32_BKP_DATA(index >> 1);
+ val = (val & 0xFFFF0000) | value;
+ STM32_BKP_DATA(index >> 1) = val;
+ }
+#else
STM32_BKP_DATA(index) = value;
+#endif
return EC_SUCCESS;
}