diff options
author | Eric Yilun Lin <yllin@chromium.org> | 2022-06-27 15:08:32 +0800 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-18 06:52:45 +0000 |
commit | e002a7a8f9935e693226446fd17c98ce5bc4c0a9 (patch) | |
tree | 08f8640cfc529359f69409945ed1969739804220 | |
parent | 830b6f897fd70f8d9c845723737c7027bbc13591 (diff) | |
download | chrome-ec-e002a7a8f9935e693226446fd17c98ce5bc4c0a9.tar.gz |
nx20p348x: add device binding for PPC
add NXP NX20P348X PPC device binding
BUG=b:227359727
TEST=enable on kingler
BRANCH=none
Change-Id: Id050a0cb5fccf3dd0b868f374bf2849087ec6505
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3725851
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Tested-by: Eric Yilun Lin <yllin@google.com>
-rw-r--r-- | zephyr/dts/bindings/usbc/nxp,nx20p348x.yaml | 22 | ||||
-rw-r--r-- | zephyr/shim/include/usbc/ppc.h | 11 | ||||
-rw-r--r-- | zephyr/shim/include/usbc/ppc_nx20p348x.h | 13 | ||||
-rw-r--r-- | zephyr/shim/src/ppc.c | 10 |
4 files changed, 50 insertions, 6 deletions
diff --git a/zephyr/dts/bindings/usbc/nxp,nx20p348x.yaml b/zephyr/dts/bindings/usbc/nxp,nx20p348x.yaml new file mode 100644 index 0000000000..bc721a8eb9 --- /dev/null +++ b/zephyr/dts/bindings/usbc/nxp,nx20p348x.yaml @@ -0,0 +1,22 @@ +# Copyright 2022 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: NXP NX20P348X USBC PPC binding + +compatible: "nxp,nx20p348x" + +include: ppc-chip.yaml + +properties: + i2c-addr-flags: + default: "NX20P3483_ADDR2_FLAGS" + enum: + - "NX20P3483_ADDR0_FLAGS" + - "NX20P3483_ADDR1_FLAGS" + - "NX20P3483_ADDR2_FLAGS" + - "NX20P3483_ADDR3_FLAGS" + - "NX20P3481_ADDR0_FLAGS" + - "NX20P3481_ADDR1_FLAGS" + - "NX20P3481_ADDR2_FLAGS" + - "NX20P3481_ADDR3_FLAGS" diff --git a/zephyr/shim/include/usbc/ppc.h b/zephyr/shim/include/usbc/ppc.h index 9d7dfdd824..f6fe6e884b 100644 --- a/zephyr/shim/include/usbc/ppc.h +++ b/zephyr/shim/include/usbc/ppc.h @@ -9,6 +9,7 @@ #include <zephyr/device.h> #include <zephyr/devicetree.h> #include "usbc/ppc_rt1739.h" +#include "usbc/ppc_nx20p348x.h" #include "usbc/ppc_sn5s330.h" #include "usbc/ppc_syv682x.h" #include "usbc/utils.h" @@ -23,10 +24,12 @@ (PPC_ID_WITH_COMMA(id)), ()) enum ppc_chips_alt_id { - DT_FOREACH_STATUS_OKAY(RT1739_PPC_COMPAT, PPC_ALT_ENUM) - DT_FOREACH_STATUS_OKAY(SN5S330_COMPAT, PPC_ALT_ENUM) - DT_FOREACH_STATUS_OKAY(SYV682X_COMPAT, PPC_ALT_ENUM) - PPC_CHIP_ALT_COUNT + DT_FOREACH_STATUS_OKAY(NX20P348X_COMPAT, PPC_ALT_ENUM) + DT_FOREACH_STATUS_OKAY(RT1739_PPC_COMPAT, PPC_ALT_ENUM) + DT_FOREACH_STATUS_OKAY(SN5S330_COMPAT, PPC_ALT_ENUM) + DT_FOREACH_STATUS_OKAY(SYV682X_COMPAT, + PPC_ALT_ENUM) + PPC_CHIP_ALT_COUNT }; extern struct ppc_config_t ppc_chips_alt[]; diff --git a/zephyr/shim/include/usbc/ppc_nx20p348x.h b/zephyr/shim/include/usbc/ppc_nx20p348x.h new file mode 100644 index 0000000000..162a937a99 --- /dev/null +++ b/zephyr/shim/include/usbc/ppc_nx20p348x.h @@ -0,0 +1,13 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ppc/nx20p348x_public.h" + +#define NX20P348X_COMPAT nxp_nx20p348x + +#define PPC_CHIP_NX20P348X(id) \ + { .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ + .i2c_addr_flags = DT_STRING_UPPER_TOKEN(id, i2c_addr_flags), \ + .drv = &nx20p348x_drv }, diff --git a/zephyr/shim/src/ppc.c b/zephyr/shim/src/ppc.c index 48a382174b..ebfcb393ab 100644 --- a/zephyr/shim/src/ppc.c +++ b/zephyr/shim/src/ppc.c @@ -5,13 +5,15 @@ #include <zephyr/devicetree.h> #include "usbc_ppc.h" +#include "usbc/ppc_nx20p348x.h" #include "usbc/ppc_rt1739.h" #include "usbc/ppc_sn5s330.h" #include "usbc/ppc_syv682x.h" #include "usbc/ppc.h" -#if DT_HAS_COMPAT_STATUS_OKAY(RT1739_PPC_COMPAT) || \ - DT_HAS_COMPAT_STATUS_OKAY(SN5S330_COMPAT) || \ +#if DT_HAS_COMPAT_STATUS_OKAY(NX20P348X_COMPAT) || \ + DT_HAS_COMPAT_STATUS_OKAY(RT1739_PPC_COMPAT) || \ + DT_HAS_COMPAT_STATUS_OKAY(SN5S330_COMPAT) || \ DT_HAS_COMPAT_STATUS_OKAY(SYV682X_COMPAT) #define PPC_CHIP_PRIM(id, fn) \ @@ -30,6 +32,8 @@ /* Enable clang-format when the formatted code is readable. */ /* clang-format off */ struct ppc_config_t ppc_chips[] = { + DT_FOREACH_STATUS_OKAY_VARGS(NX20P348X_COMPAT, PPC_CHIP_PRIM, + PPC_CHIP_NX20P348X) DT_FOREACH_STATUS_OKAY_VARGS(RT1739_PPC_COMPAT, PPC_CHIP_PRIM, PPC_CHIP_RT1739) DT_FOREACH_STATUS_OKAY_VARGS(SN5S330_COMPAT, PPC_CHIP_PRIM, @@ -43,6 +47,8 @@ unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); /* Alt Power Path Controllers */ /* clang-format off */ struct ppc_config_t ppc_chips_alt[] = { + DT_FOREACH_STATUS_OKAY_VARGS(NX20P348X_COMPAT, PPC_CHIP_ALT, + PPC_CHIP_NX20P348X) DT_FOREACH_STATUS_OKAY_VARGS(RT1739_PPC_COMPAT, PPC_CHIP_ALT, PPC_CHIP_RT1739) DT_FOREACH_STATUS_OKAY_VARGS(SN5S330_COMPAT, PPC_CHIP_ALT, |