treewide: Convert ESPI_DEFAULT_SCI_WIDTH_US to default VWIRE pulse width

In the corresponding bug, Intel has clarified that this SCI# pulse
length requirement is actually for all virtual wires, therefore this
patch renames CONFIG_ESPI_DEFAULT_SCI_WIDTH_US to
CONFIG_ESPI_DEFAULT_VW_WIDTH_US to reflect its broader purpose. All
pulses of virtual wire signals were converted to use this new pulse
width config option, and all GPIO pulses were converted back to their
original value (65 us).

BUG=b:227367177
BRANCH=brya
TEST=build

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I1225b3e436cd1dca71c93500538a201d008781b3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3610694
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>

14 files changed, 42 insertions, 38 deletions

diff --git a/baseboard/brask/baseboard.h b/baseboard/brask/baseboard.h
index 5089ef0e14..14bd373ed5 100644
--- a/baseboard/brask/baseboard.h
+++ b/baseboard/brask/baseboard.h
@@ -84,9 +84,10 @@
 #define CONFIG_CMD_AP_RESET_LOG
 #define CONFIG_HOSTCMD_AP_RESET
 
-/* ADL has new low-power features that require an extra-wide SCI pulse */
-#undef CONFIG_ESPI_DEFAULT_SCI_WIDTH_US
-#define CONFIG_ESPI_DEFAULT_SCI_WIDTH_US	150
+/* ADL has new low-power features that requires extra-wide virtual wire
+ * pulses. */
+#undef CONFIG_ESPI_DEFAULT_VW_WIDTH_US
+#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US	150
 
 /* Buttons */
 #define CONFIG_DEDICATED_RECOVERY_BUTTON
diff --git a/baseboard/brya/baseboard.h b/baseboard/brya/baseboard.h
index aa45f256a5..8b83d1f358 100644
--- a/baseboard/brya/baseboard.h
+++ b/baseboard/brya/baseboard.h
@@ -122,9 +122,9 @@
 #define CONFIG_CMD_AP_RESET_LOG
 #define CONFIG_HOSTCMD_AP_RESET
 
-/* ADL has new lower-power features that require extra-wide SCI pulses. */
-#undef CONFIG_ESPI_DEFAULT_SCI_WIDTH_US
-#define CONFIG_ESPI_DEFAULT_SCI_WIDTH_US 150
+/* ADL has new lower-power features that require extra-wide virtual wire pulses. */
+#undef CONFIG_ESPI_DEFAULT_VW_WIDTH_US
+#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US 150
 
 /* Buttons / Switches */
 #define CONFIG_VOLUME_BUTTONS
diff --git a/baseboard/intelrvp/adlrvp.h b/baseboard/intelrvp/adlrvp.h
index 000996e1d7..612cf58eba 100644
--- a/baseboard/intelrvp/adlrvp.h
+++ b/baseboard/intelrvp/adlrvp.h
@@ -33,9 +33,9 @@
 /* Chipset */
 #define CONFIG_CHIPSET_ALDERLAKE
 
-/* ADL has new low-power features that require an extra-wide SCI pulse. */
-#undef CONFIG_ESPI_DEFAULT_SCI_WIDTH_US
-#define CONFIG_ESPI_DEFAULT_SCI_WIDTH_US	150
+/* ADL has new low-power features that require extra-wide virtual wire pulses. */
+#undef CONFIG_ESPI_DEFAULT_VW_WIDTH_US
+#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US	150
 
 /* USB PD config */
 #if defined(HAS_TASK_PD_C3)
diff --git a/chip/it83xx/lpc.c b/chip/it83xx/lpc.c
index 1f38491084..29f92e9b94 100644
--- a/chip/it83xx/lpc.c
+++ b/chip/it83xx/lpc.c
@@ -138,7 +138,7 @@ static void lpc_generate_smi(void)
 {
 #ifdef CONFIG_HOST_INTERFACE_ESPI
 	espi_vw_set_wire(VW_SMI_L, 0);
-	udelay(65);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	espi_vw_set_wire(VW_SMI_L, 1);
 #else
 	gpio_set_level(GPIO_PCH_SMI_L, 0);
@@ -151,11 +151,11 @@ static void lpc_generate_sci(void)
 {
 #ifdef CONFIG_HOST_INTERFACE_ESPI
 	espi_vw_set_wire(VW_SCI_L, 0);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	espi_vw_set_wire(VW_SCI_L, 1);
 #else
 	gpio_set_level(GPIO_PCH_SCI_L, 0);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(65);
 	gpio_set_level(GPIO_PCH_SCI_L, 1);
 #endif
 }
diff --git a/chip/mchp/espi.c b/chip/mchp/espi.c
index 778990b852..763b82ece2 100644
--- a/chip/mchp/espi.c
+++ b/chip/mchp/espi.c
@@ -708,6 +708,9 @@ int espi_vw_pulse_wire(enum espi_vw_signal signal, int pulse_level)
 	if (rc != EC_SUCCESS)
 		return rc;
 
+	/* Ensure a minimum pulse width is met. */
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
+
 	/* drive to requested active state */
 	rc = espi_vw_s2m_set_w4m(ridx, src_num, level);
 	if (rc != EC_SUCCESS)
diff --git a/chip/mchp/lpc.c b/chip/mchp/lpc.c
index b89ef1b065..86cc67fb51 100644
--- a/chip/mchp/lpc.c
+++ b/chip/mchp/lpc.c
@@ -103,14 +103,14 @@ static void lpc_generate_sci(void)
 	CPUTS("LPC Pulse SCI");
 #ifdef CONFIG_SCI_GPIO
 	gpio_set_level(CONFIG_SCI_GPIO, 0);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(65);
 	gpio_set_level(CONFIG_SCI_GPIO, 1);
 #else
 #ifdef CONFIG_HOST_INTERFACE_ESPI
 	espi_vw_pulse_wire(VW_SCI_L, 0);
 #else
 	MCHP_ACPI_PM_STS |= 1;
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	MCHP_ACPI_PM_STS &= ~1;
 #endif
 #endif
diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c
index 41e0eef253..be3b36cfef 100644
--- a/chip/mec1322/lpc.c
+++ b/chip/mec1322/lpc.c
@@ -79,11 +79,11 @@ static void lpc_generate_sci(void)
 {
 #ifdef CONFIG_SCI_GPIO
 	gpio_set_level(CONFIG_SCI_GPIO, 0);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(65);
 	gpio_set_level(CONFIG_SCI_GPIO, 1);
 #else
 	MEC1322_ACPI_PM_STS |= 1;
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	MEC1322_ACPI_PM_STS &= ~1;
 #endif
 }
diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c
index 84eac826e5..d2e7231c14 100644
--- a/chip/npcx/lpc.c
+++ b/chip/npcx/lpc.c
@@ -146,19 +146,19 @@ static void lpc_generate_smi(void)
 	 * status should be read from bit 1/0 in eSPI VMEVSM(2) register.
 	 */
 	NPCX_HIPMIC(PMC_ACPI) = NPCX_VW_SMI(1);
-	udelay(65);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	/* Generate a falling edge */
 	NPCX_HIPMIC(PMC_ACPI) = NPCX_VW_SMI(0);
-	udelay(65);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	/* Set signal high */
 	NPCX_HIPMIC(PMC_ACPI) = NPCX_VW_SMI(1);
 #else
 	/* SET SMIB bit to pull SMI_L to high.*/
 	SET_BIT(NPCX_HIPMIC(PMC_ACPI), NPCX_HIPMIC_SMIB);
-	udelay(65);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	/* Generate a falling edge */
 	CLEAR_BIT(NPCX_HIPMIC(PMC_ACPI), NPCX_HIPMIC_SMIB);
-	udelay(65);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	/* Set signal high */
 	SET_BIT(NPCX_HIPMIC(PMC_ACPI), NPCX_HIPMIC_SMIB);
 #endif
@@ -177,10 +177,10 @@ static void lpc_generate_sci(void)
 #ifdef CONFIG_SCI_GPIO
 	/* Enforce signal-high for long enough to debounce high */
 	gpio_set_level(CONFIG_SCI_GPIO, 1);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(65);
 	/* Generate a falling edge */
 	gpio_set_level(CONFIG_SCI_GPIO, 0);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(65);
 	/* Set signal high, now that we've generated the edge */
 	gpio_set_level(CONFIG_SCI_GPIO, 1);
 #elif defined(CONFIG_HOST_INTERFACE_ESPI)
@@ -192,19 +192,19 @@ static void lpc_generate_sci(void)
 	 * status should be read from bit 1/0 in eSPI VMEVSM(2) register.
 	 */
 	NPCX_HIPMIC(PMC_ACPI) = NPCX_VW_SCI(1);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	/* Generate a falling edge */
 	NPCX_HIPMIC(PMC_ACPI) = NPCX_VW_SCI(0);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	/* Set signal high */
 	NPCX_HIPMIC(PMC_ACPI) = NPCX_VW_SCI(1);
 #else
 	/* Set SCIB bit to pull SCI_L to high.*/
 	SET_BIT(NPCX_HIPMIC(PMC_ACPI), NPCX_HIPMIC_SCIB);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	/* Generate a falling edge */
 	CLEAR_BIT(NPCX_HIPMIC(PMC_ACPI), NPCX_HIPMIC_SCIB);
-	udelay(CONFIG_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
 	/* Set signal high */
 	SET_BIT(NPCX_HIPMIC(PMC_ACPI), NPCX_HIPMIC_SCIB);
 #endif
diff --git a/include/config.h b/include/config.h
index 7582656392..478e6dc708 100644
--- a/include/config.h
+++ b/include/config.h
@@ -5666,7 +5666,7 @@
  * The historical default SCI pulse width to the host is 65 microseconds, but
  * some chipsets may require different widths.
  */
-#define CONFIG_ESPI_DEFAULT_SCI_WIDTH_US	65
+#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US	65
 
 /*****************************************************************************/
 /*
diff --git a/zephyr/Kconfig.espi b/zephyr/Kconfig.espi
index 5768ba88ed..60ea99def7 100644
--- a/zephyr/Kconfig.espi
+++ b/zephyr/Kconfig.espi
@@ -31,11 +31,11 @@ config PLATFORM_EC_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST
 	  maintain these pins' states per request. Note that this is
 	  currently unimplemented for Zephyr. Please see b/183148073.
 
-config PLATFORM_EC_ESPI_DEFAULT_SCI_WIDTH_US
-	int "SCI# signal pulse width (microseconds)"
+config PLATFORM_EC_ESPI_DEFAULT_VW_WIDTH_US
+	int "Virtual wire pulse width (microseconds)"
 	default 65
 	help
-	  The minimum pulse width of an SCI# signal to the host. May vary by
-	  host chipset.
+	  The minimum pulse width of a eSPI/LPC virtual wire signals to the
+	  host. May vary by host chipset.
 
 endif # PLATFORM_EC_HOST_INTERFACE_ESPI
diff --git a/zephyr/projects/brya/prj.conf b/zephyr/projects/brya/prj.conf
index bba151c97a..4d2a7ba46b 100644
--- a/zephyr/projects/brya/prj.conf
+++ b/zephyr/projects/brya/prj.conf
@@ -37,7 +37,7 @@ CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y
 CONFIG_ESPI=y
 CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y
 CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5=y
-CONFIG_PLATFORM_EC_ESPI_DEFAULT_SCI_WIDTH_US=150
+CONFIG_PLATFORM_EC_ESPI_DEFAULT_VW_WIDTH_US=150
 
 # I2C
 CONFIG_I2C=y
diff --git a/zephyr/projects/intelrvp/adlrvp/prj.conf b/zephyr/projects/intelrvp/adlrvp/prj.conf
index 2913506f7c..c9493799ec 100644
--- a/zephyr/projects/intelrvp/adlrvp/prj.conf
+++ b/zephyr/projects/intelrvp/adlrvp/prj.conf
@@ -69,4 +69,4 @@ CONFIG_GPIO_PCA95XX=y
 CONFIG_PLATFORM_EC_MAX695X_SEVEN_SEGMENT_DISPLAY=y
 
 # eSPI
-CONFIG_PLATFORM_EC_ESPI_DEFAULT_SCI_WIDTH_US=150
+CONFIG_PLATFORM_EC_ESPI_DEFAULT_VW_WIDTH_US=150
diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h
index 3e124c9bbd..90bb632cc3 100644
--- a/zephyr/shim/include/config_chip.h
+++ b/zephyr/shim/include/config_chip.h
@@ -444,9 +444,9 @@
 #define CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST
 #endif
 
-#undef CONFIG_ESPI_DEFAULT_SCI_WIDTH_US
+#undef CONFIG_ESPI_DEFAULT_VW_WIDTH_US
 #ifdef CONFIG_PLATFORM_EC_DEFAULT_SCI_WIDTH_US
-#define CONFIG_ESPI_DEFAULT_SCI_WIDTH_US CONFIG_PLATFORM_EC_DEFAULT_SCI_WIDTH_US
+#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US CONFIG_PLATFORM_EC_DEFAULT_SCI_WIDTH_US
 #endif
 
 #if DT_HAS_CHOSEN(zephyr_flash)
diff --git a/zephyr/shim/src/espi.c b/zephyr/shim/src/espi.c
index ab7ac3cc97..74f6b70f42 100644
--- a/zephyr/shim/src/espi.c
+++ b/zephyr/shim/src/espi.c
@@ -28,7 +28,7 @@
 #include "timer.h"
 #include "zephyr_espi_shim.h"
 
-#define VWIRE_PULSE_TRIGGER_TIME 65
+#define VWIRE_PULSE_TRIGGER_TIME CONFIG_PLATFORM_EC_ESPI_DEFAULT_VW_WIDTH_US
 
 LOG_MODULE_REGISTER(espi_shim, CONFIG_ESPI_LOG_LEVEL);
 
@@ -250,9 +250,9 @@ static void lpc_generate_sci(void)
 {
 	/* Enforce signal-high for long enough to debounce high */
 	espi_vw_set_wire(VW_SCI_L, 1);
-	udelay(CONFIG_PLATFORM_EC_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(VWIRE_PULSE_TRIGGER_TIME);
 	espi_vw_set_wire(VW_SCI_L, 0);
-	udelay(CONFIG_PLATFORM_EC_ESPI_DEFAULT_SCI_WIDTH_US);
+	udelay(VWIRE_PULSE_TRIGGER_TIME);
 	espi_vw_set_wire(VW_SCI_L, 1);
 }