diff options
| author | Brandon Breitenstein <brandon.breitenstein@intel.com> | 2022-04-06 12:02:34 -0700 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-04-12 18:17:31 +0000 |
| commit | 73167b0439cd7a26e537328aa5402b7e27065e74 (patch) | |
| tree | 90ce556699f199ae6cda42902948f19b689b7d0d | |
| parent | 12c333e6029fb77caf8d5d2e32fabcbcfd667b44 (diff) | |
| download | chrome-ec-73167b0439cd7a26e537328aa5402b7e27065e74.tar.gz | |
zephyr: Enable NCT38XX ioexpander on MTLRVP
Enables ioexpander for the nuvoton nct38xx ports on MTL RVP.
This allows for type-c functionality on port c0 and c1.
BUG=none
BRANCH=none
TEST=zmake mtlrvpp_npcx verified retimers coming up when toggling
rst and ls lines with follow on patch
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Change-Id: I43210076bf0f17ff884e777b81853f05ff3765aa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3575076
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Massey <aaronmassey@google.com>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
| -rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts | 62 | ||||
| -rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts | 4 | ||||
| -rw-r--r-- | zephyr/projects/intelrvp/mtlrvp/prj.conf | 6 |
3 files changed, 70 insertions, 2 deletions
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts index fc2a7448c3..fbe42b2303 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts @@ -258,6 +258,28 @@ tp-gpiof4 { gpios = <&gpiof 4 GPIO_INPUT>; }; + /* USB C IOEX configuration */ + usb-c0-hbr-ls-en { + gpios = <&ioex_c0 2 GPIO_OUTPUT_LOW>; + }; + usb-c0-hbr-rst { + gpios = <&ioex_c0 3 GPIO_OUTPUT_LOW>; + }; + usb-c1-hbr-ls-en { + gpios = <&ioex_c1 2 GPIO_OUTPUT_LOW>; + }; + usb-c1-hbr-rst { + gpios = <&ioex_c1 3 GPIO_OUTPUT_LOW>; + }; + usb-c0-mux-oe-n { + gpios = <&ioex_c0 4 GPIO_OUTPUT_LOW>; + }; + usb-c0-mux-sbu-sel-0 { + gpios = <&ioex_c0 6 GPIO_OUTPUT_HIGH>; + }; + usb-c0-mux-sbu-sel-1 { + gpios = <&ioex_c1 4 GPIO_OUTPUT_LOW>; + }; }; def-lvol-io-list { @@ -274,3 +296,43 @@ >; }; }; + +&i2c0_0 { + nct38xx_C0:nct38xx_C0@70 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x70>; + label = "NCT38XX_C0"; + + ioex_c0:gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT38XX_C0_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xff>; + pinmux_mask = <0xf7>; + }; + }; + + nct38xx_C1:nct38xx_C1@70 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x70>; + label = "NCT38XX_C1"; + + ioex_c1:gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT38XX_C1_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xff>; + pinmux_mask = <0xf7>; + }; + }; +}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts index e50330c6d4..9bddcb88ec 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts @@ -15,11 +15,11 @@ i2c-port = <&i2c7_0>; enum-name = "I2C_PORT_CHARGER"; }; - typec_aic1 { + typec_aic1: typec-aic1{ i2c-port = <&i2c0_0>; enum-name = "I2C_PORT_TYPEC_AIC_1"; }; - typec_aic2 { + typec_aic2: typec-aic2{ i2c-port = <&i2c2_0>; enum-name = "I2C_PORT_TYPEC_AIC_2"; }; diff --git a/zephyr/projects/intelrvp/mtlrvp/prj.conf b/zephyr/projects/intelrvp/mtlrvp/prj.conf index fde700735e..badcb562ec 100644 --- a/zephyr/projects/intelrvp/mtlrvp/prj.conf +++ b/zephyr/projects/intelrvp/mtlrvp/prj.conf @@ -18,7 +18,13 @@ CONFIG_PLATFORM_EC_USBC=n CONFIG_PLATFORM_EC_CHARGER=n # IOEX +CONFIG_PLATFORM_EC_IOEX=y CONFIG_GPIO_PCA95XX=y +CONFIG_GPIO_NCT38XX=y + +# USB CONFIG +CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y # TODO: Enable these in follow on CLs CONFIG_PLATFORM_EC_KEYBOARD=n |