diff options
author | Shobhit Srivastava <shobhit.srivastava@intel.com> | 2015-09-29 15:18:24 +0530 |
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committer | ChromeOS bot <3su6n15k.default@developer.gserviceaccount.com> | 2015-10-01 18:51:28 +0000 |
commit | dd35ffed0f1c367a4bdda12f2efb2d20862438b5 (patch) | |
tree | 6b4b81d00fce1e304c18b4e0c631f569a7d3b037 | |
parent | 7d5ffd5e6310593080196850466403356cb7005e (diff) | |
download | chrome-ec-dd35ffed0f1c367a4bdda12f2efb2d20862438b5.tar.gz |
Strago: Enabling heavysleep idle task at S3
Enable heavysleep idle task at S3 for BCRD2 systems
BUG=none
BRANCH=firmware-strago-7287.B
TEST=Put the DUT in S3. Console is disabled when heavysleep idle
task kicks in. EC power is reduced
Change-Id: I928b663e8389afdea99172c204d25e88488d14a9
Signed-off-by: Shobhit Srivastava <shobhit.srivastava@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/303293
Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r-- | board/strago/board.c | 1 | ||||
-rw-r--r-- | board/strago/board.h | 1 | ||||
-rw-r--r-- | board/strago/gpio.inc | 2 |
3 files changed, 3 insertions, 1 deletions
diff --git a/board/strago/board.c b/board/strago/board.c index 39c3c3f9d9..76f1d4a3d3 100644 --- a/board/strago/board.c +++ b/board/strago/board.c @@ -29,6 +29,7 @@ #include "temp_sensor.h" #include "temp_sensor_chip.h" #include "thermal.h" +#include "uart.h" #include "util.h" #define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) diff --git a/board/strago/board.h b/board/strago/board.h index 54ffbe30f3..cfa40d8b71 100644 --- a/board/strago/board.h +++ b/board/strago/board.h @@ -24,6 +24,7 @@ #define CONFIG_POWER_BUTTON #define CONFIG_POWER_BUTTON_X86 #define CONFIG_LID_SWITCH +#define CONFIG_LOW_POWER_IDLE #define CONFIG_LOW_POWER_PSEUDO_G3 #define CONFIG_POWER_COMMON #define CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5 diff --git a/board/strago/gpio.inc b/board/strago/gpio.inc index ca9b205e2c..4b60205775 100644 --- a/board/strago/gpio.inc +++ b/board/strago/gpio.inc @@ -15,7 +15,7 @@ GPIO_INT(POWER_BUTTON_L, PIN(35), GPIO_INT_BOTH, power_ GPIO_INT(RSMRST_L_PGOOD, PIN(63), GPIO_INT_BOTH, power_signal_interrupt) /* RSMRST_N_PWRGD from power logic */ GPIO_INT(ALL_SYS_PGOOD, PIN(130), GPIO_INT_BOTH, power_signal_interrupt) /* ALL_SYS_PWRGD from power logic */ #ifdef CONFIG_LOW_POWER_IDLE -GPIO_INT(UART0_RX, PIN(162), GPIO_INT_BOTH | GPIO_PULL_UP, uart_deepsleep_interrupt) /* UART0 RX input */ +GPIO_INT(UART0_RX, PIN(162), GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, uart_deepsleep_interrupt) /* UART0 RX input */ #else GPIO_INT(UART0_RX, PIN(162), GPIO_INPUT | GPIO_PULL_UP, NULL) /* UART0 RX input */ #endif |