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authorjames_chao <james_chao@asus.com>2015-12-14 19:53:04 +0800
committerChromeOS bot <3su6n15k.default@developer.gserviceaccount.com>2015-12-15 03:04:58 +0000
commit4486f532216da858c21f61c847a6da0b5430f11c (patch)
tree87c89fda626e85749dc5b821c4d61a07deebc7b0
parentf9b851beaab3a76ddb5dbf2d668249009fd16cc0 (diff)
downloadchrome-ec-4486f532216da858c21f61c847a6da0b5430f11c.tar.gz
Terra: update gpio table
Set all nc pins named "NC_GPIOxxx" and flag GPIO_INPUT | GPIO_PULL_UP BUG=None BRANCH=firmware-strago-7287.B TEST=make buildall -j Change-Id: I11f9903c7efc678c07ceb2fcc83a99b56bf1d148 Signed-off-by: james_chao <james_chao@asus.com> Reviewed-on: https://chromium-review.googlesource.com/318102 Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r--board/terra/gpio.inc83
1 files changed, 43 insertions, 40 deletions
diff --git a/board/terra/gpio.inc b/board/terra/gpio.inc
index 7285259160..8909e9f130 100644
--- a/board/terra/gpio.inc
+++ b/board/terra/gpio.inc
@@ -21,20 +21,19 @@ GPIO_INT(PCH_SLP_S3_L, PIN(206), GPIO_INT_BOTH, power_
GPIO(BOARD_VERSION2, PIN(0), GPIO_INPUT) /* BOARD_ID1 */
GPIO(KBD_KSO2, PIN(1), GPIO_KB_OUTPUT_COL2) /* Negative edge triggered irq. */
-GPIO(NC_USBPD_BOOT0, PIN(12), GPIO_INPUT | GPIO_PULL_DOWN) /* NC */
+GPIO(NC_GPIO12, PIN(12), GPIO_INPUT | GPIO_PULL_UP) /* NC */
GPIO(USB_ILIM_SEL, PIN(13), GPIO_OUT_HIGH) /* USB current control */
GPIO(I2C_PORT0_0_SCL, PIN(15), GPIO_INPUT)
GPIO(I2C_PORT0_0_SDA, PIN(16), GPIO_INPUT)
-GPIO(I2C_PORT0_1_SCL, PIN(134), GPIO_INPUT)
-GPIO(I2C_PORT0_1_SDA, PIN(17), GPIO_INPUT)
-GPIO(I2C_PORT1_SCL, PIN(22), GPIO_INPUT)
-GPIO(I2C_PORT1_SDA, PIN(23), GPIO_INPUT)
-GPIO(I2C_PORT2_SCL, PIN(20), GPIO_INPUT)
-GPIO(I2C_PORT2_SDA, PIN(21), GPIO_INPUT)
+GPIO(NC_GPIO17, PIN(17), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO20, PIN(20), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO21, PIN(21), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO22, PIN(22), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO23, PIN(23), GPIO_INPUT | GPIO_PULL_UP) /* NC */
GPIO(I2C_PORT3_SCL, PIN(24), GPIO_INPUT)
GPIO(I2C_PORT3_SDA, PIN(25), GPIO_INPUT)
GPIO(PCH_SCI_L, PIN(26), GPIO_ODR_HIGH) /* SCI output */
-
+GPIO(NC_GPIO31, PIN(31), GPIO_INPUT | GPIO_PULL_UP) /* NC */
GPIO(WP_L, PIN(33), GPIO_INPUT) /* EC_SPI_WP_ME_L */
GPIO(POWER_LED, PIN(34), GPIO_OUT_LOW)
GPIO(USB2_ENABLE, PIN(36), GPIO_OUT_LOW) /* Enable power for USB2 Port */
@@ -42,13 +41,16 @@ GPIO(USB2_ENABLE, PIN(36), GPIO_OUT_LOW) /* Enable power
GPIO(ENTERING_RW, PIN(41), GPIO_OUT_LOW) /* Indicate when EC is entering RW code */
GPIO(PCH_SMI_L, PIN(44), GPIO_ODR_HIGH) /* SMI output */
GPIO(USB_OC1_L, PIN(45), GPIO_INT_FALLING) /* DB2 BC1.2 over current signal to EC */
-
+GPIO(NC_GPIO46, PIN(46), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO47, PIN(47), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO50, PIN(50), GPIO_INPUT | GPIO_PULL_UP) /* NC */
GPIO(PCH_SUS_STAT_L, PIN(51), GPIO_INT_FALLING) /* Signal to inform EC that SOC is entering low power state */
+GPIO(NC_GPIO52, PIN(52), GPIO_INPUT | GPIO_PULL_UP) /* NC */
GPIO(TRACKPAD_PWREN, PIN(53), GPIO_OUT_HIGH) /* Enable power for Track Pad */
GPIO(USB_OC0_L, PIN(55), GPIO_INT_FALLING) /* Over current signal of the BC1.2 charger to EC */
-GPIO(EC_ADC1, PIN(57), GPIO_INPUT) /* EC_ADC1, TEMP_SENSOR_2 no_stuff */
-
-GPIO(EC_ADC0, PIN(61), GPIO_INPUT) /* EC_ADC0 */
+GPIO(NC_GPIO57, PIN(57), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO61, PIN(61), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO62, PIN(62), GPIO_INPUT | GPIO_PULL_UP) /* NC */
GPIO(EC_HIB_L, PIN(64), GPIO_OUT_LOW) /* Set to high before Pseduo G3 */
GPIO(PCH_SYS_PWROK, PIN(65), GPIO_OUT_LOW) /* EC thinks everything is up and ready (DELAY_ALL_SYS_PWRGD) */
GPIO(PCH_WAKE_L, PIN(66), GPIO_ODR_HIGH) /* PCH wake pin */
@@ -60,40 +62,43 @@ GPIO(BOARD_VERSION3, PIN(102), GPIO_INPUT) /* BOARD_ID2 */
GPIO(USB_CTL1, PIN(105), GPIO_OUT_HIGH) /* USB charging mode control */
GPIO(PCH_RCIN_L, PIN(110), GPIO_ODR_HIGH) /* Reset line to PCH (for 8042 emulation) */
-GPIO(NC_115, PIN(115), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO115, PIN(115), GPIO_INPUT | GPIO_PULL_UP) /* NC */
GPIO(EC_VNN_VCLK, PIN(122), GPIO_INPUT | GPIO_PULL_UP) /* Interrupt from USB PD Controller to EC */
GPIO(STRAP_L, PIN(123), GPIO_OUT_LOW)
-GPIO(EC_VNN_ALERT_L, PIN(124), GPIO_INPUT | GPIO_PULL_UP)
-
-GPIO(NC_133, PIN(133), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(EC_VNN_ALERT_L, PIN(124), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO127, PIN(127), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO132, PIN(132), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO133, PIN(133), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO134, PIN(134), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO135, PIN(135), GPIO_INPUT | GPIO_PULL_UP) /* NC */
GPIO(BAT_LED_RED, PIN(136), GPIO_ODR_HIGH)
+GPIO(NC_GPIO140, PIN(140), GPIO_INPUT | GPIO_PULL_UP) /* NC */
GPIO(BAT_LED_GREEN, PIN(141), GPIO_ODR_HIGH)
-GPIO(PCH_RSMRST_L, PIN(143), GPIO_OUT_LOW) /* RSMRST_N to PCH */
-GPIO(EC_KBD_ALERT, PIN(145), GPIO_OUT_LOW) /* EC_KBD_ALERT */
-GPIO(PVT_CS0, PIN(146), GPIO_ODR_HIGH) /* SPI PVT Chip select */
-
-GPIO(WLAN_OFF_L, PIN(150), GPIO_ODR_HIGH) /* Wireless LAN */
+GPIO(PCH_RSMRST_L, PIN(143), GPIO_OUT_LOW) /* RSMRST_N to PCH */
+GPIO(EC_KBD_ALERT, PIN(145), GPIO_OUT_LOW) /* EC_KBD_ALERT */
+GPIO(PVT_CS0, PIN(146), GPIO_ODR_HIGH) /* SPI PVT Chip select */
+GPIO(NC_GPIO147, PIN(147), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(WLAN_OFF_L, PIN(150), GPIO_ODR_HIGH) /* Wireless LAN */
GPIO(CPU_PROCHOT, PIN(151), GPIO_OUT_LOW)
-GPIO(KBD_IRQ_L, PIN(152), GPIO_ODR_HIGH) /* Negative edge triggered irq. */
-GPIO(BOARD_VERSION1, PIN(154), GPIO_INPUT) /* BOARD_ID0 */
-GPIO(PCH_SUSPWRDNACK, PIN(157), GPIO_INT_FALLING) /* PMC SUSPWRDNACK signal from SOC to EC */
+GPIO(KBD_IRQ_L, PIN(152), GPIO_ODR_HIGH) /* Negative edge triggered irq. */
+GPIO(BOARD_VERSION1, PIN(154), GPIO_INPUT) /* BOARD_ID0 */
+GPIO(PCH_SUSPWRDNACK, PIN(157), GPIO_INT_FALLING) /* PMC SUSPWRDNACK signal from SOC to EC */
-GPIO(PCH_PWRBTN_L, PIN(160), GPIO_OUT_HIGH) /* Power button output to PCH */
+GPIO(PCH_PWRBTN_L, PIN(160), GPIO_OUT_HIGH) /* Power button output to PCH */
+GPIO(NC_GPIO161, PIN(161), GPIO_INPUT | GPIO_PULL_UP) /* NC */
+GPIO(NC_GPIO163, PIN(163), GPIO_INPUT | GPIO_PULL_UP) /* NC */
-GPIO(STARTUP_LATCH_SET, PIN(201), GPIO_INPUT) /* Not used in BCRD2. Programmed as Input to fix EC power leakage in S3*/
-GPIO(EC_BL_DISABLE_L, PIN(202), GPIO_OUT_HIGH) /* EDP backligh disable signal from EC */
-GPIO(SMC_SHUTDOWN, PIN(203), GPIO_OUT_LOW) /* Shutdown signal from EC to power sequencing PLD */
+GPIO(STARTUP_LATCH_SET, PIN(201), GPIO_INPUT) /* Not used in BCRD2. Programmed as Input to fix EC power leakage in S3*/
+GPIO(EC_BL_DISABLE_L, PIN(202), GPIO_OUT_HIGH) /* EDP backligh disable signal from EC */
+GPIO(SMC_SHUTDOWN, PIN(203), GPIO_OUT_LOW) /* Shutdown signal from EC to power sequencing PLD */
GPIO(IMAGE_SEL, PIN(204), GPIO_INPUT)
-GPIO(BAT_PRESENT_L, PIN(210), GPIO_INPUT) /* HW detection signal from battery to EC */
-GPIO(GPIO_3_EC, PIN(211), GPIO_OUT_LOW) /* Sleep SOIX signal from SOC to EC */
+GPIO(BAT_PRESENT_L, PIN(210), GPIO_INPUT) /* HW detection signal from battery to EC */
+GPIO(GPIO_3_EC, PIN(211), GPIO_OUT_LOW) /* Sleep SOIX signal from SOC to EC */
/* Alternate functions GPIO definition */
ALTERNATE(PIN_MASK(16, 0x24), 1, MODULE_UART, 0) /* UART0 */
-ALTERNATE(PIN_MASK(1, 0x60), 2, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C0: Battery Charger */
-ALTERNATE(PIN_MASK(2, 0x3f), 2, MODULE_I2C, GPIO_OPEN_DRAIN) /* I2C1: Temp Sensor / I2C2: SOC / I2C3: VNN */
-
ALTERNATE(PIN_MASK(0, 0xfc), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
ALTERNATE(PIN_MASK(1, 0x03), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
ALTERNATE(PIN_MASK(10, 0xd8), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
@@ -112,7 +117,7 @@ ALTERNATE(PIN_MASK(16, 0x10), 1, MODULE_SPI, 0)
ALTERNATE(PIN_MASK(15, 0x08), 1, MODULE_SPI, 0) /* 153: CLK */
ALTERNATE(PIN_MASK(5, 0x40), 1, MODULE_ADC, 0) /* 56: temperature sensor 1 */
-ALTERNATE(PIN_MASK(6, 0x05), 1, MODULE_ADC, 0) /* 60: PC_MON, 62: temperature sensor 3 */
+ALTERNATE(PIN_MASK(6, 0x01), 1, MODULE_ADC, 0) /* 60: PC_MON, 62: nc */
/* Re-Config LPC Pins to GPIO Open Drain for SOC G3 (EC - POWER_G3) state */
ALTERNATE(PIN_MASK(1, 0x10), 0, MODULE_GPIO, GPIO_ODR_HIGH) /* 14: LPC CLKRUN */
@@ -121,9 +126,7 @@ ALTERNATE(PIN_MASK(11, 0x40), 0, MODULE_GPIO, GPIO_ODR_HIGH)
ALTERNATE(PIN_MASK(12, 0x01), 0, MODULE_GPIO, GPIO_ODR_HIGH) /* 120: LFRAME# */
/* I2C pins */
-/* I2C0_0 CLK - GPIO015, I2C0_0 DAT - GPIO016, I2C0_1 DAT - GPIO017 */
-ALTERNATE(PIN_MASK(1, 0xe0), 2, MODULE_I2C, GPIO_ODR_HIGH)
-/* I2C0_1 CLK - GPIO134 */
-ALTERNATE(PIN_MASK(13, 0x10), 2, MODULE_I2C, GPIO_ODR_HIGH)
-/* I2C{1,2,3} CLK / DAT - GPIO022-GPIO025*/
-ALTERNATE(PIN_MASK(2, 0x3f), 2, MODULE_I2C, GPIO_ODR_HIGH)
+/* I2C0_0 CLK - GPIO015, I2C0_0 DAT - GPIO016 */
+ALTERNATE(PIN_MASK(1, 0x60), 2, MODULE_I2C, GPIO_ODR_HIGH)
+/* I2C_1 CLK -GPIO24, I2C_1 DAT - GPIO25 */
+ALTERNATE(PIN_MASK(2, 0x30), 2, MODULE_I2C, GPIO_ODR_HIGH)