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| author | David Huang <david.huang@quanta.corp-partner.google.com> | 2021-11-23 15:10:20 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-11-23 09:03:12 +0000 |
| commit | b5e6c58a6cc43d5ec5fbce7d826ddf1555a3d371 (patch) | |
| tree | b1b4ce7312ce434955cf25522b5fb294e7daff80 | |
| parent | d26f089259183a224c508b2e7fcdc0a4d25965ee (diff) | |
| download | chrome-ec-b5e6c58a6cc43d5ec5fbce7d826ddf1555a3d371.tar.gz | |
brask: Change GPIO name
Change USB_C1_RT_RST_ODL to USB_C1_RT_RST_L
BUG=b:206986093 b:194068869
BRANCH=main
TEST=make buildall -j success.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I2165e152f73ee9c0b711b1e53baa7335065fd683
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3295834
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
| -rw-r--r-- | board/brask/gpio.inc | 2 | ||||
| -rw-r--r-- | board/brask/usbc_config.c | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/board/brask/gpio.inc b/board/brask/gpio.inc index 0e93ac3f1b..9282b915cd 100644 --- a/board/brask/gpio.inc +++ b/board/brask/gpio.inc @@ -128,7 +128,7 @@ GPIO(LED_RED_L, PIN(C, 4), GPIO_OUT_LOW) GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT) -GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_OUT_LOW) +GPIO(USB_C1_RT_RST_R_L, PIN(0, 2), GPIO_OUT_LOW) /* GPIO02_P2 to PU */ /* GPIO03_P2 to PU */ diff --git a/board/brask/usbc_config.c b/board/brask/usbc_config.c index 8363c71f88..a8c952df6f 100644 --- a/board/brask/usbc_config.c +++ b/board/brask/usbc_config.c @@ -111,7 +111,7 @@ struct kb800x_control_t kb800x_control[] = { [USBC_PORT_C0] = { }, [USBC_PORT_C1] = { - .retimer_rst_gpio = GPIO_USB_C1_RT_RST_R_ODL, + .retimer_rst_gpio = GPIO_USB_C1_RT_RST_R_L, }, [USBC_PORT_C2] = { }, @@ -249,7 +249,7 @@ void board_reset_pd_mcu(void) */ gpio_set_level(tcpc_rst, 0); - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); + gpio_set_level(GPIO_USB_C1_RT_RST_R_L, 0); /* * delay for power-on to reset-off and min. assertion time @@ -258,7 +258,7 @@ void board_reset_pd_mcu(void) msleep(20); gpio_set_level(tcpc_rst, 1); - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); + gpio_set_level(GPIO_USB_C1_RT_RST_R_L, 1); /* wait for chips to come up */ |