diff options
author | Devin Lu <Devin.Lu@quantatw.com> | 2021-11-12 10:46:56 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-11-23 02:09:17 +0000 |
commit | 412246836f7fa4f99ca89e760e7a0a84092e8c13 (patch) | |
tree | c330036a2e5b0bfb4ca1bf47ac1546d842549d65 | |
parent | c0f27cad5a468433f703cc1e4c68d447b0184263 (diff) | |
download | chrome-ec-412246836f7fa4f99ca89e760e7a0a84092e8c13.tar.gz |
intel_x86: Apply chipset resume init and suspend complete hooks
The CL:2321875 introduced a hook for chipset resume init and
suspend complete. The application was applied for SPI driver for
sc7180.
This patch applies to intel_x86 as well. The benefit that we can
initial the devices (such as PCHG) prior the chipset resume and
shutdown the devices after the chipset suspend is completed.
BUG=b:205675485
BRANCH=None
TEST=make buildall -j
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I7ded958e1d2722b2e48c21466ff6fd2f82ecc5e7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276030
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
-rw-r--r-- | power/intel_x86.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/power/intel_x86.c b/power/intel_x86.c index 8c8ee908eb..c682b3f078 100644 --- a/power/intel_x86.c +++ b/power/intel_x86.c @@ -390,6 +390,10 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) lpc_s3_resume_clear_masks(); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + /* Call hooks prior to chipset resume */ + hook_notify(HOOK_CHIPSET_RESUME_INIT); +#endif /* Call hooks now that rails are up */ hook_notify(HOOK_CHIPSET_RESUME); @@ -412,8 +416,13 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) return POWER_S0; case POWER_S0S3: + /* Call hooks before we remove power rails */ hook_notify(HOOK_CHIPSET_SUSPEND); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + /* Call hooks after chipset suspend */ + hook_notify(HOOK_CHIPSET_SUSPEND_COMPLETE); +#endif /* Suspend wireless */ wireless_set_state(WIRELESS_SUSPEND); @@ -445,6 +454,11 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) * to go into deep sleep in S0ix. */ enable_sleep(SLEEP_MASK_AP_RUN); + +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + hook_notify(HOOK_CHIPSET_SUSPEND_COMPLETE); +#endif + return POWER_S0ix; case POWER_S0ixS0: @@ -454,6 +468,10 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) */ disable_sleep(SLEEP_MASK_AP_RUN); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + hook_notify(HOOK_CHIPSET_RESUME_INIT); +#endif + sleep_resume_transition(); return POWER_S0; #endif |