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| author | Furquan Shaikh <furquan@chromium.org> | 2017-07-20 10:36:37 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-07-21 16:02:36 -0700 |
| commit | e292f979431104f12c904f8f1f0227dfef3584c5 (patch) | |
| tree | eb43dd6c254fbb835f0f883d209b7c2e14a687a2 | |
| parent | 3e6c71ea2740a4a1c4c156e43e4fc81a2587ceb5 (diff) | |
| download | chrome-ec-e292f979431104f12c904f8f1f0227dfef3584c5.tar.gz | |
fizz: Implement workaround for broken reset flags
Board rev0 will lose VBAT on power cycle and therefore
cannot successfully save the reset flag state.
Implement workaround that will allow these boards to continue to
work for FAFT testing by indicating to the skylake chipset power code
that it should skip the PMIC reset when doing 'reboot ap-off'.
BUG=b:63889675
BRANCH=None
TEST=None
Change-Id: Ie79053e2e52a3a9efd9cd864808af7214989602e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/579666
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | board/fizz/board.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/board/fizz/board.c b/board/fizz/board.c index b13aed9075..d72b9c8415 100644 --- a/board/fizz/board.c +++ b/board/fizz/board.c @@ -444,3 +444,15 @@ int64_t get_time_dsw_pwrok(void) /* DSW_PWROK is turned on before EC was powered. */ return -20 * MSEC; } + +int board_has_working_reset_flags(void) +{ + int version = system_get_board_version(); + + /* Board Rev0 will lose reset flags on power cycle. */ + if (version == 0) + return 0; + + /* All other board versions should have working reset flags */ + return 1; +} |