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authorRandall Spangler <rspangler@chromium.org>2012-07-18 11:28:44 -0700
committerRandall Spangler <rspangler@chromium.org>2012-07-18 18:15:00 -0700
commitc7b4a30a53356cb51d21bad9b828a525f42da269 (patch)
treeac3ca6f374bacf205324c8ff9299be3e0af97079
parent9a8223a8db69b036f783493bb5c96465ce176bbf (diff)
downloadchrome-ec-c7b4a30a53356cb51d21bad9b828a525f42da269.tar.gz
Use config values for flash protect/erase/write sizes
Since they're config values anyway. Gets rid of an unneeded layer of function call. BUG=chrome-os-partner:11150 TEST=build link, snow, daisy; flashinfo returns same values Change-Id: I27fa007f64a446f1ec0fe22ae16c5c1ac667f8e9 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/27797
-rw-r--r--chip/lm4/config.h2
-rw-r--r--chip/lm4/flash.c27
-rw-r--r--chip/lm4/mock_flash.c27
-rw-r--r--chip/stm32/config-stm32f100.h2
-rw-r--r--chip/stm32/config-stm32l15x.h12
-rw-r--r--chip/stm32/flash-stm32f100.c25
-rw-r--r--chip/stm32/flash-stm32l15x.c55
-rw-r--r--common/flash_common.c22
-rw-r--r--include/flash.h42
9 files changed, 77 insertions, 137 deletions
diff --git a/chip/lm4/config.h b/chip/lm4/config.h
index 74d7663a6c..ff5c5771c8 100644
--- a/chip/lm4/config.h
+++ b/chip/lm4/config.h
@@ -26,6 +26,8 @@
#define CONFIG_FLASH_BASE 0x00000000
#define CONFIG_FLASH_BANK_SIZE 0x00000800 /* protect bank size */
+#define CONFIG_FLASH_ERASE_SIZE 0x00000400 /* erase bank size */
+#define CONFIG_FLASH_WRITE_SIZE 0x00000004 /* minimum write size */
/* This is the physical size of the flash on the chip. We'll reserve one bank
* in order to emulate per-bank write-protection UNTIL REBOOT. The hardware
diff --git a/chip/lm4/flash.c b/chip/lm4/flash.c
index 0df24ed838..0bbf0ede67 100644
--- a/chip/lm4/flash.c
+++ b/chip/lm4/flash.c
@@ -12,11 +12,8 @@
#include "util.h"
#include "watchdog.h"
-#define FLASH_WRITE_BYTES 4
-#define FLASH_FWB_WORDS 32
+#define FLASH_FWB_WORDS 32
#define FLASH_FWB_BYTES (FLASH_FWB_WORDS * 4)
-#define FLASH_ERASE_BYTES 1024
-#define FLASH_PROTECT_BYTES 2048
#define BANK_SHIFT 5 /* bank registers have 32bits each, 2^32 */
#define BANK_MASK ((1 << BANK_SHIFT) - 1) /* 5 bits */
@@ -27,25 +24,9 @@
#define ERASE_TIMEOUT_MS 200
#define WRITE_TIMEOUT_US 300
-int flash_get_write_block_size(void)
-{
- return FLASH_WRITE_BYTES;
-}
-
-int flash_get_erase_block_size(void)
-{
- return FLASH_ERASE_BYTES;
-}
-
-int flash_get_protect_block_size(void)
-{
- BUILD_ASSERT(FLASH_PROTECT_BYTES == CONFIG_FLASH_BANK_SIZE);
- return FLASH_PROTECT_BYTES;
-}
-
int flash_physical_size(void)
{
- return (LM4_FLASH_FSIZE + 1) * FLASH_PROTECT_BYTES;
+ return (LM4_FLASH_FSIZE + 1) * CONFIG_FLASH_BANK_SIZE;
}
/**
@@ -126,7 +107,7 @@ int flash_physical_erase(int offset, int size)
LM4_FLASH_FCMISC = LM4_FLASH_FCRIS; /* Clear previous error status */
LM4_FLASH_FMA = offset;
- for ( ; size > 0; size -= FLASH_ERASE_BYTES) {
+ for ( ; size > 0; size -= CONFIG_FLASH_ERASE_SIZE) {
int t;
#ifdef CONFIG_TASK_WATCHDOG
@@ -151,7 +132,7 @@ int flash_physical_erase(int offset, int size)
if (LM4_FLASH_FCRIS & 0x0a01)
return EC_ERROR_UNKNOWN;
- LM4_FLASH_FMA += FLASH_ERASE_BYTES;
+ LM4_FLASH_FMA += CONFIG_FLASH_ERASE_SIZE;
}
return EC_SUCCESS;
diff --git a/chip/lm4/mock_flash.c b/chip/lm4/mock_flash.c
index e516439355..8e46d52bfc 100644
--- a/chip/lm4/mock_flash.c
+++ b/chip/lm4/mock_flash.c
@@ -11,33 +11,12 @@
#include "uart.h"
#include "util.h"
-#define FLASH_WRITE_BYTES 4
-#define FLASH_ERASE_BYTES 1024
-#define FLASH_PROTECT_BYTES 2048
#define FLASH_FSIZE 0x7f
-#define PHYSICAL_SIZE ((FLASH_FSIZE + 1) * FLASH_PROTECT_BYTES)
-#define FLASH_MOCK_BEGIN (FLASH_FSIZE * FLASH_PROTECT_BYTES)
+#define PHYSICAL_SIZE ((FLASH_FSIZE + 1) * CONFIG_FLASH_BANK_SIZE)
+#define FLASH_MOCK_BEGIN (FLASH_FSIZE * CONFIG_FLASH_BANK_SIZE)
char mock_protect[FLASH_FSIZE + 1];
-char pstate_space[FLASH_PROTECT_BYTES];
-
-int flash_get_write_block_size(void)
-{
- return FLASH_WRITE_BYTES;
-}
-
-
-int flash_get_erase_block_size(void)
-{
- return FLASH_ERASE_BYTES;
-}
-
-
-int flash_get_protect_block_size(void)
-{
- return FLASH_PROTECT_BYTES;
-}
-
+char pstate_space[CONFIG_FLASH_BANK_SIZE];
int flash_physical_size(void)
{
diff --git a/chip/stm32/config-stm32f100.h b/chip/stm32/config-stm32f100.h
index 831daa62d7..bb4c4c33dc 100644
--- a/chip/stm32/config-stm32f100.h
+++ b/chip/stm32/config-stm32f100.h
@@ -8,6 +8,8 @@
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000
#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE
#define CONFIG_FLASH_BANK_SIZE 0x1000
+#define CONFIG_FLASH_ERASE_SIZE 0x0400 /* erase bank size */
+#define CONFIG_FLASH_WRITE_SIZE 0x0040 /* minimum write size */
#define CONFIG_RAM_BASE 0x20000000
#define CONFIG_RAM_SIZE 0x00002000
diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h
index 63d9b0d323..5a3fef59a8 100644
--- a/chip/stm32/config-stm32l15x.h
+++ b/chip/stm32/config-stm32l15x.h
@@ -8,6 +8,18 @@
#define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000
#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE
#define CONFIG_FLASH_BANK_SIZE 0x1000
+#define CONFIG_FLASH_ERASE_SIZE 0x0100 /* erase bank size */
+
+/* crosbug.comb/p/9811 workaround 64-byte payload limitation */
+#define CONFIG_64B_WORKAROUND
+
+#ifdef CONFIG_64B_WORKAROUND
+#define CONFIG_FLASH_WRITE_SIZE 0x0040 /* claimed minimum write size */
+#define CONFIG_FLASH_REAL_WRITE_SIZE 0x0080 /* actual minimum write size */
+#else
+#define CONFIG_FLASH_WRITE_SIZE 0x0080
+#endif
+
#define CONFIG_RAM_BASE 0x20000000
#define CONFIG_RAM_SIZE 0x00004000
diff --git a/chip/stm32/flash-stm32f100.c b/chip/stm32/flash-stm32f100.c
index a52e1ec2d2..50f1a5b0f3 100644
--- a/chip/stm32/flash-stm32f100.c
+++ b/chip/stm32/flash-stm32f100.c
@@ -13,10 +13,6 @@
#include "util.h"
#include "watchdog.h"
-#define FLASH_WRITE_BYTES 64
-#define FLASH_ERASE_BYTES 1024
-#define FLASH_PROTECT_BYTES 4096
-
#define US_PER_SECOND 1000000
/* the approximate number of CPU cycles per iteration of the loop when polling
@@ -45,23 +41,6 @@
static void write_optb(int byte, uint8_t value);
-
-int flash_get_write_block_size(void)
-{
- return FLASH_WRITE_BYTES;
-}
-
-int flash_get_erase_block_size(void)
-{
- return FLASH_ERASE_BYTES;
-}
-
-int flash_get_protect_block_size(void)
-{
- BUILD_ASSERT(FLASH_PROTECT_BYTES == CONFIG_FLASH_BANK_SIZE);
- return FLASH_PROTECT_BYTES;
-}
-
int flash_physical_size(void)
{
return CONFIG_FLASH_SIZE;
@@ -262,8 +241,8 @@ int flash_physical_erase(int offset, int size)
STM32_FLASH_CR |= PER;
for (address = CONFIG_FLASH_BASE + offset ;
- size > 0; size -= FLASH_ERASE_BYTES,
- address += FLASH_ERASE_BYTES) {
+ size > 0; size -= CONFIG_FLASH_ERASE_SIZE,
+ address += CONFIG_FLASH_ERASE_SIZE) {
timestamp_t deadline;
/* select page to erase */
diff --git a/chip/stm32/flash-stm32l15x.c b/chip/stm32/flash-stm32l15x.c
index e7f048b5d7..a1aaa370f7 100644
--- a/chip/stm32/flash-stm32l15x.c
+++ b/chip/stm32/flash-stm32l15x.c
@@ -13,13 +13,6 @@
#include "util.h"
#include "watchdog.h"
-/* crosbug.com/p/9811 workaround 64-byte payload limitation */
-#define CONFIG_64B_WORKAROUND
-
-#define FLASH_WRITE_BYTES 128
-#define FLASH_ERASE_BYTES 256
-#define FLASH_PROTECT_BYTES 4096
-
#define US_PER_SECOND 1000000
/* the approximate number of CPU cycles per iteration of the loop when polling
@@ -46,33 +39,17 @@
#define OPT_LOCK (1<<2)
#ifdef CONFIG_64B_WORKAROUND
-/* used to buffer the write payload smaller than the half page size */
-static uint32_t write_buffer[FLASH_WRITE_BYTES / sizeof(uint32_t)];
-static int buffered_off = -1;
-#endif
+/*
+ * Use the real write buffer size inside the driver. We only lie to the
+ * outside world so it'll feed data to us in smaller pieces.
+ */
+#undef CONFIG_FLASH_WRITE_SIZE
+#define CONFIG_FLASH_WRITE_SIZE CONFIG_FLASH_REAL_WRITE_SIZE
-int flash_get_write_block_size(void)
-{
-#ifdef CONFIG_64B_WORKAROUND
- return 64;
-#else
- return FLASH_WRITE_BYTES;
+/* Used to buffer the write payload smaller than the half page size */
+static uint32_t write_buffer[CONFIG_FLASH_WRITE_SIZE / sizeof(uint32_t)];
+static int buffered_off = -1;
#endif
-}
-
-
-int flash_get_erase_block_size(void)
-{
- return FLASH_ERASE_BYTES;
-}
-
-
-int flash_get_protect_block_size(void)
-{
- BUILD_ASSERT(FLASH_PROTECT_BYTES == CONFIG_FLASH_BANK_SIZE);
- return FLASH_PROTECT_BYTES;
-}
-
int flash_physical_size(void)
{
@@ -152,7 +129,7 @@ void __attribute__((section(".iram.text")))
STM32_FLASH_PECR |= (1<<3) | (1<<10);
/* send words for the half page */
- for (i = 0; i < FLASH_WRITE_BYTES / sizeof(uint32_t); i++)
+ for (i = 0; i < CONFIG_FLASH_WRITE_SIZE / sizeof(uint32_t); i++)
*addr++ = *data++;
/* Wait for writes to complete */
@@ -176,7 +153,7 @@ int flash_physical_write(int offset, int size, const char *data)
int res = EC_SUCCESS;
#ifdef CONFIG_64B_WORKAROUND
- if ((size < FLASH_WRITE_BYTES) || (offset & 64)) {
+ if ((size < CONFIG_FLASH_WRITE_SIZE) || (offset & 64)) {
if ((size != 64) ||
((offset & 64) && (buffered_off != offset - 64))) {
res = EC_ERROR_UNKNOWN;
@@ -207,7 +184,7 @@ int flash_physical_write(int offset, int size, const char *data)
STM32_FLASH_SR = 0xf00;
for (address = (uint32_t *)(CONFIG_FLASH_BASE + offset) ;
- size > 0; size -= FLASH_WRITE_BYTES) {
+ size > 0; size -= CONFIG_FLASH_WRITE_SIZE) {
#ifdef CONFIG_TASK_WATCHDOG
/* Reload the watchdog timer to avoid watchdog reset when doing
* long writing with interrupt disabled.
@@ -216,8 +193,8 @@ int flash_physical_write(int offset, int size, const char *data)
#endif
iram_flash_write(address, data32);
- address += FLASH_WRITE_BYTES / sizeof(uint32_t);
- data32 += FLASH_WRITE_BYTES / sizeof(uint32_t);
+ address += CONFIG_FLASH_WRITE_SIZE / sizeof(uint32_t);
+ data32 += CONFIG_FLASH_WRITE_SIZE / sizeof(uint32_t);
if (STM32_FLASH_SR & 1) {
res = EC_ERROR_TIMEOUT;
goto exit_wr;
@@ -253,8 +230,8 @@ int flash_physical_erase(int offset, int size)
STM32_FLASH_PECR |= (1<<3) | (1<<9);
for (address = (uint32_t *)(CONFIG_FLASH_BASE + offset) ;
- size > 0; size -= FLASH_ERASE_BYTES,
- address += FLASH_ERASE_BYTES/sizeof(uint32_t)) {
+ size > 0; size -= CONFIG_FLASH_ERASE_SIZE,
+ address += CONFIG_FLASH_ERASE_SIZE / sizeof(uint32_t)) {
timestamp_t deadline;
/* Start erase */
diff --git a/common/flash_common.c b/common/flash_common.c
index 26d017db87..d5792727d9 100644
--- a/common/flash_common.c
+++ b/common/flash_common.c
@@ -157,8 +157,7 @@ int flash_dataptr(int offset, int size_req, int align, char **ptrp)
int flash_write(int offset, int size, const char *data)
{
- if (flash_dataptr(offset, size, flash_get_write_block_size(),
- NULL) < 0)
+ if (flash_dataptr(offset, size, CONFIG_FLASH_WRITE_SIZE, NULL) < 0)
return EC_ERROR_INVAL; /* Invalid range */
return flash_physical_write(offset, size, data);
@@ -166,8 +165,7 @@ int flash_write(int offset, int size, const char *data)
int flash_erase(int offset, int size)
{
- if (flash_dataptr(offset, size, flash_get_erase_block_size(),
- NULL) < 0)
+ if (flash_dataptr(offset, size, CONFIG_FLASH_ERASE_SIZE, NULL) < 0)
return EC_ERROR_INVAL; /* Invalid range */
return flash_physical_erase(offset, size);
@@ -310,9 +308,9 @@ static int command_flash_info(int argc, char **argv)
flash_physical_size() / 1024);
ccprintf("Usable: %4d KB\n", CONFIG_FLASH_SIZE / 1024);
- ccprintf("Write: %4d B\n", flash_get_write_block_size());
- ccprintf("Erase: %4d B\n", flash_get_erase_block_size());
- ccprintf("Protect: %4d B\n", flash_get_protect_block_size());
+ ccprintf("Write: %4d B\n", CONFIG_FLASH_WRITE_SIZE);
+ ccprintf("Erase: %4d B\n", CONFIG_FLASH_ERASE_SIZE);
+ ccprintf("Protect: %4d B\n", CONFIG_FLASH_BANK_SIZE);
i = flash_get_protect();
ccprintf("Flags: ");
@@ -348,7 +346,7 @@ DECLARE_CONSOLE_COMMAND(flashinfo, command_flash_info,
static int command_flash_erase(int argc, char **argv)
{
int offset = -1;
- int size = flash_get_erase_block_size();
+ int size = CONFIG_FLASH_ERASE_SIZE;
int rv;
rv = parse_offset_size(argc, argv, 1, &offset, &size);
@@ -366,7 +364,7 @@ DECLARE_CONSOLE_COMMAND(flasherase, command_flash_erase,
static int command_flash_write(int argc, char **argv)
{
int offset = -1;
- int size = flash_get_erase_block_size();
+ int size = CONFIG_FLASH_ERASE_SIZE;
int rv;
char *data;
int i;
@@ -432,9 +430,9 @@ static int flash_command_get_info(struct host_cmd_handler_args *args)
(struct ec_response_flash_info *)args->response;
r->flash_size = CONFIG_FLASH_SIZE;
- r->write_block_size = flash_get_write_block_size();
- r->erase_block_size = flash_get_erase_block_size();
- r->protect_block_size = flash_get_protect_block_size();
+ r->write_block_size = CONFIG_FLASH_WRITE_SIZE;
+ r->erase_block_size = CONFIG_FLASH_ERASE_SIZE;
+ r->protect_block_size = CONFIG_FLASH_BANK_SIZE;
args->response_size = sizeof(*r);
return EC_RES_SUCCESS;
}
diff --git a/include/flash.h b/include/flash.h
index 7cb1c4fd14..e78119868b 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -20,15 +20,6 @@
int flash_physical_pre_init(void);
/**
- * Return the write / erase / protect block size, in bytes. Operations must be
- * aligned to and multiples of the granularity. For example, erase operations
- * must have offset and size which are multiples of the erase block size.
- */
-int flash_get_write_block_size(void);
-int flash_get_erase_block_size(void);
-int flash_get_protect_block_size(void);
-
-/**
* Return the physical size of flash in bytes as read from the flash chip
* itself.
*
@@ -53,14 +44,33 @@ static inline char *flash_physical_dataptr(int offset)
return (char *)offset;
}
-/* Write <size> bytes of data to flash at byte offset <offset>.
- * <data> must be 32-bit aligned. */
+/**
+ * Write to physical flash.
+ *
+ * Offset and size must be a multiple of CONFIG_FLASH_WRITE_SIZE.
+ *
+ * @param offset Flash offset to write.
+ * @param size Number of bytes to write.
+ * @param data Data to write to flash. Must be 32-bit aligned.
+ */
int flash_physical_write(int offset, int size, const char *data);
-/* Erase <size> bytes of flash at byte offset <offset>. */
+/**
+ * Erase physical flash.
+ *
+ * Offset and size must be a multiple of CONFIG_FLASH_ERASE_SIZE.
+ *
+ * @param offset Flash offset to erase.
+ * @param size Number of bytes to erase.
+ */
int flash_physical_erase(int offset, int size);
-/* Return non-zero if bank is protected until reboot. */
+/**
+ * Read physical write protect setting for a flash bank.
+ *
+ * @param bank Bank index to check.
+ * @return non-zero if bank is protected until reboot.
+ */
int flash_physical_get_protect(int bank);
/**
@@ -111,18 +121,18 @@ int flash_dataptr(int offset, int size_req, int align, char **ptrp);
/**
* Write to flash.
*
- * Offset and size must be a multiple of get_flash_write_block_size().
+ * Offset and size must be a multiple of CONFIG_FLASH_WRITE_SIZE.
*
* @param offset Flash offset to write.
* @param size Number of bytes to write.
- * @param data Data to write to flash.
+ * @param data Data to write to flash. Must be 32-bit aligned.
*/
int flash_write(int offset, int size, const char *data);
/**
* Erase flash.
*
- * Offset and size must be a multiple of get_flash_erase_block_size().
+ * Offset and size must be a multiple of CONFIG_FLASH_ERASE_SIZE.
*
* @param offset Flash offset to erase.
* @param size Number of bytes to erase.