diff options
| author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2018-11-27 11:22:20 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2018-12-06 14:40:53 +0000 |
| commit | 45037c7a6eb7c2d178c3bf651ac0b431b69b08b5 (patch) | |
| tree | 3580f00231a4f863d431a22d29e8a903cca7473e | |
| parent | 5dce731ab89030e0609a7faca861c03f0cd8fc44 (diff) | |
| download | chrome-ec-45037c7a6eb7c2d178c3bf651ac0b431b69b08b5.tar.gz | |
baseboard/octopus: Enable CONFIG_BOARD_HAS_RTC_RESET
Add a helper function to reset the RTC using EC_PCH_RTCRST GPIO.
Enable the config to use the hardware support to reset the RTC.
BUG=b:119678692
BRANCH=octopus
TEST=make -j buildall && Boot to ChromeOS. Create a forced scenario to
trigger an RTC reset and ensure that EC does not get reset while the SoC
boots to ChromeOS. Execute warm reboot from AP, cold reboot from EC and
wake from ec hibernate (10 iterations each) and suspend_stress_test for
50 iterations successfully.
Change-Id: I5eb1025cdaa62098de0250640788921621829cd1
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1354494
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/1365647
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
Trybot-Ready: Jett Rink <jettrink@chromium.org>
| -rw-r--r-- | baseboard/octopus/baseboard.c | 7 | ||||
| -rw-r--r-- | baseboard/octopus/baseboard.h | 1 | ||||
| -rw-r--r-- | power/apollolake.h | 1 |
3 files changed, 9 insertions, 0 deletions
diff --git a/baseboard/octopus/baseboard.c b/baseboard/octopus/baseboard.c index 30a450e991..4903314ac1 100644 --- a/baseboard/octopus/baseboard.c +++ b/baseboard/octopus/baseboard.c @@ -215,6 +215,13 @@ void baseboard_tcpc_init(void) /* Called after the cbi_init (via +2) */ DECLARE_HOOK(HOOK_INIT, baseboard_tcpc_init, HOOK_PRIO_INIT_I2C + 2); +void board_rtc_reset(void) +{ + gpio_set_level(GPIO_PCH_RTCRST, 1); + udelay(100); + gpio_set_level(GPIO_PCH_RTCRST, 0); +} + int board_set_active_charge_port(int port) { int is_valid_port = (port >= 0 && diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h index d47ca38e99..2ff9d48c5f 100644 --- a/baseboard/octopus/baseboard.h +++ b/baseboard/octopus/baseboard.h @@ -90,6 +90,7 @@ #define CONFIG_LOW_POWER_IDLE #define CONFIG_PWM #define CONFIG_DPTF +#define CONFIG_BOARD_HAS_RTC_RESET /* Port80 -- allow larger buffer for port80 messages */ #undef CONFIG_PORT80_HISTORY_LEN diff --git a/power/apollolake.h b/power/apollolake.h index 78aad94b5a..da5e86121f 100644 --- a/power/apollolake.h +++ b/power/apollolake.h @@ -16,6 +16,7 @@ #define IN_ALL_SYS_PG POWER_SIGNAL_MASK(X86_ALL_SYS_PG) #define IN_SLP_S3_N POWER_SIGNAL_MASK(X86_SLP_S3_N) #define IN_SLP_S4_N POWER_SIGNAL_MASK(X86_SLP_S4_N) +#define IN_PCH_SLP_S4_DEASSERTED IN_SLP_S4_N #define IN_SUSPWRDNACK POWER_SIGNAL_MASK(X86_SUSPWRDNACK) #define IN_SUS_STAT_N POWER_SIGNAL_MASK(X86_SUS_STAT_N) |