diff options
author | Dino Li <Dino.Li@ite.com.tw> | 2019-01-15 17:15:03 +0800 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2019-01-16 20:06:27 +0000 |
commit | 6d0f49987c824375f7faa3cf411e7ab5e09fb036 (patch) | |
tree | c8925238394ad5d07b0a8f842316bdde1f37560f | |
parent | b83eb99f2e35002cdd5d52e03efdb8710b7e8443 (diff) | |
download | chrome-ec-6d0f49987c824375f7faa3cf411e7ab5e09fb036.tar.gz |
it83xx: reset espi module during init on DX version
Symptom:
On Ampton, boot to kernel with coreboot image R73-11543.0.0 (eSPI
is operating at Quad I/O mode).
Reboot EC with console command "reboot", eSPI will get stuck after
power sequence is done.
Because I/O mode field will not go back to default setting
(single I/O mode) after a software reset.
BUG=b:122820812
BRANCH=octopus
TEST=Running "reboot" on the EC console and then boot to kernel.
Change-Id: I65252aa191294458467f3ba55b2071659f3b5ae8
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/1408752
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 21a6339d873770eb7dbcbf06c627a3da68b1b123)
Reviewed-on: https://chromium-review.googlesource.com/c/1412196
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Tested-by: Jett Rink <jettrink@chromium.org>
-rw-r--r-- | chip/it83xx/clock.c | 10 | ||||
-rw-r--r-- | chip/it83xx/intc.h | 1 |
2 files changed, 11 insertions, 0 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index 613b5db04d..c52edb6f6a 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -262,6 +262,16 @@ void clock_init(void) */ IT83XX_GCTRL_RSTS = (IT83XX_GCTRL_RSTS & 0x3F) + 0x40; +#if defined(IT83XX_ESPI_RESET_MODULE_BY_FW) && defined(CONFIG_HOSTCMD_ESPI) + /* + * Because we don't support eSPI HW reset function (b/111480168) on DX + * version, so we have to reset eSPI configurations during init to + * ensure Host and EC are synchronized (especially for the field of + * I/O mode) + */ + if (!system_jumped_to_this_image()) + espi_fw_reset_module(); +#endif /* Turn off auto clock gating. */ IT83XX_ECPM_AUTOCG = 0x00; diff --git a/chip/it83xx/intc.h b/chip/it83xx/intc.h index 1b085498fc..9fa6341953 100644 --- a/chip/it83xx/intc.h +++ b/chip/it83xx/intc.h @@ -22,6 +22,7 @@ void clock_sleep_mode_wakeup_isr(void); int clock_ec_wake_from_sleep(void); void __enter_hibernate(uint32_t seconds, uint32_t microseconds); void espi_reset_pin_asserted_interrupt(enum gpio_signal signal); +void espi_fw_reset_module(void); void espi_interrupt(void); void espi_vw_interrupt(void); void espi_init(void); |