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| author | amber.chen <amber.chen@lcfc.corp-partner.google.com> | 2022-12-27 13:04:37 +0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-01-10 17:44:40 +0000 |
| commit | 2e7ebc84a64bd9ded1cccb3ebe7bf2c90641a82a (patch) | |
| tree | dbdb16a4923524235c62952b6379082f157911ea | |
| parent | 61998464402f768ba855f937c6d5612118ea4542 (diff) | |
| download | chrome-ec-2e7ebc84a64bd9ded1cccb3ebe7bf2c90641a82a.tar.gz | |
baseboard: enable powered of PP1 and PP2 for port 1
Due to in Treeya360 project add "#undef CONFIG_HIBERNATE_PSL" this
configuration, so PPC1 remains powered during hibernate.
PPC1 therefore now needs to be configured the same way as PPC0, to mimic
the previous dead-battery behavior and allow wake on AC plug.
BRANCH=none
BUG=b:259211176
TEST=make buildall -j48
Change-Id: Ie353a3f3ca118dd94a2131d8ea62ddf5ee12c470
Signed-off-by: amber.chen <amber.chen@lcfc.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4119878
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
(cherry picked from commit 950c21ed4d0181029653bfebabcbfc990c1757d3)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4140778
Reviewed-by: YH Lin <yueherngl@chromium.org>
Commit-Queue: YH Lin <yueherngl@chromium.org>
| -rw-r--r-- | baseboard/grunt/baseboard.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/baseboard/grunt/baseboard.c b/baseboard/grunt/baseboard.c index 2807464230..6c3d0955d6 100644 --- a/baseboard/grunt/baseboard.c +++ b/baseboard/grunt/baseboard.c @@ -821,6 +821,15 @@ void board_hibernate(void) */ ppc_vbus_source_enable(0, 0); ppc_vbus_sink_enable(0, 1); + /* + * PPC1 therefore now needs to be configured the same way as PPC0, + * to mimic the previous dead-battery behavior and allow wake on AC + * plug. + */ + if (!IS_ENABLED(CONFIG_HIBERNATE_PSL)) { + ppc_vbus_source_enable(1, 0); + ppc_vbus_sink_enable(1, 1); + } /* * If CCD not active, set port 0 SBU_EN=0 to avoid power leakage during |