summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorZhuo-hao Lee <zhuo-hao.lee@intel.com>2017-01-20 18:15:11 +0800
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2017-02-10 09:19:46 +0000
commitb02eb5c9cb122be420aa553fb75f430f64f2a76e (patch)
treea0c2a9cca4c1f155b6639b557a33542867e5792a
parent068a79d44bc98338be748a5df419634d700ecb5f (diff)
downloadchrome-ec-b02eb5c9cb122be420aa553fb75f430f64f2a76e.tar.gz
mec1322: add panic backup/restore function for the panic data
From spec, the ROM will use top 8KB memory during ROM execution. To avoid PANIC_DATA_PTR be corrupted, we need to copy it to the backup address and restore it at very early stage (RO little fw). BUG=chrome-os-partner:61241 BRANCH=firmware-glados-7820.B TEST=On EC console, use use command "crash assert" check the panic data is restored from backup address Change-Id: I48fa7714295086abbca34139d6fb0f9c8daa3a93 Signed-off-by: Zhuo-hao Lee <zhuo-hao.lee@intel.com> Reviewed-on: https://chromium-review.googlesource.com/430577 Reviewed-by: Shawn N <shawnn@chromium.org>
-rw-r--r--chip/mec1322/lfw/ec_lfw.c6
-rw-r--r--chip/mec1322/panic_extra.h46
-rw-r--r--chip/mec1322/system.c13
-rw-r--r--core/cortex-m/ec.lds.S1
4 files changed, 66 insertions, 0 deletions
diff --git a/chip/mec1322/lfw/ec_lfw.c b/chip/mec1322/lfw/ec_lfw.c
index 6824d10686..a7ed6ccc37 100644
--- a/chip/mec1322/lfw/ec_lfw.c
+++ b/chip/mec1322/lfw/ec_lfw.c
@@ -22,6 +22,7 @@
#include "version.h"
#include "hwtimer.h"
#include "gpio_list.h"
+#include "panic_extra.h"
#include "ec_lfw.h"
@@ -270,6 +271,11 @@ void lfw_main()
uart_puts("lfw-RO load\n");
spi_image_load(CONFIG_EC_PROTECTED_STORAGE_OFF +
CONFIG_RO_STORAGE_OFF);
+ /*
+ * Top 8KB of Data RAM will be used by ROM during system reboot.
+ * Restore the panic data from the panic_backup.
+ */
+ panic_data_restore();
/* fall through */
default:
MEC1322_VBAT_RAM(MEC1322_IMAGETYPE_IDX) =
diff --git a/chip/mec1322/panic_extra.h b/chip/mec1322/panic_extra.h
new file mode 100644
index 0000000000..e6f2c55ed7
--- /dev/null
+++ b/chip/mec1322/panic_extra.h
@@ -0,0 +1,46 @@
+/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __CROS_EC_PANIC_EXTRA_H
+#define __CROS_EC_PANIC_EXTRA_H
+
+/*
+* The backup address for the panic data.
+* Set it to CONFIG_RAM_BASE because the panic_backup is put
+* on this address by specifying section .bss.panic_extra
+*/
+
+#define PANIC_DATA_BACKUP_ADDRESS CONFIG_RAM_BASE
+
+/**
+ * Save the panic data to the panic_backup
+ */
+static inline void panic_data_backup(void)
+{
+ uint8_t *src_ptr = (uint8_t *)panic_get_data();
+ uint8_t *dest_ptr;
+ int num_bytes = sizeof(struct panic_data);
+
+ dest_ptr = (uint8_t *)PANIC_DATA_BACKUP_ADDRESS;
+ if (src_ptr) {
+ while (num_bytes--)
+ *dest_ptr++ = *src_ptr++;
+ }
+}
+
+/**
+ * Restore the panic data from the panic_backup
+ */
+static inline void panic_data_restore(void)
+{
+ uint8_t *src_ptr = (uint8_t *)PANIC_DATA_BACKUP_ADDRESS;
+ uint8_t *dest_ptr = (uint8_t *)PANIC_DATA_PTR;
+ int num_bytes = sizeof(struct panic_data);
+
+ while (num_bytes--)
+ *dest_ptr++ = *src_ptr++;
+}
+
+#endif /* __CROS_EC_PANIC_EXTRA_H */
diff --git a/chip/mec1322/system.c b/chip/mec1322/system.c
index c199332f57..3acc3a3acd 100644
--- a/chip/mec1322/system.c
+++ b/chip/mec1322/system.c
@@ -19,6 +19,10 @@
#include "timer.h"
#include "util.h"
#include "spi.h"
+#include "panic_extra.h"
+
+__keep __attribute__ ((section(".bss.panic_extra")))
+struct panic_data panic_backup;
/* Indices for hibernate data registers (RAM backed by VBAT) */
enum hibdata_index {
@@ -78,6 +82,9 @@ int system_is_reboot_warm(void)
void system_pre_init(void)
{
+ /* make sure the panic_backup is located to the predefine address */
+ ASSERT(&panic_backup == (struct panic_data *)PANIC_DATA_BACKUP_ADDRESS);
+
/* Enable direct NVIC */
MEC1322_EC_INT_CTRL |= 1;
@@ -118,6 +125,12 @@ void _system_reset(int flags, int wake_from_hibernate)
chip_save_reset_flags(save_flags);
+ /*
+ * Top 8KB of Data RAM will be used by ROM during system reboot.
+ * So, copy the panic data to the panic_backup.
+ */
+ panic_data_backup();
+
/* Trigger watchdog in 1ms */
MEC1322_WDG_LOAD = 1;
MEC1322_WDG_CTL |= 1;
diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S
index 34c859b105..c8fc6efad7 100644
--- a/core/cortex-m/ec.lds.S
+++ b/core/cortex-m/ec.lds.S
@@ -237,6 +237,7 @@ SECTIONS
*/
. = ALIGN(512);
__bss_start = .;
+ *(.bss.panic_extra)
*(.bss.big_align)
/* Stacks must be 64-bit aligned */
. = ALIGN(8);