diff options
| author | Eric Yilun Lin <yllin@chromium.org> | 2023-05-05 16:43:31 +0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-05-08 09:46:57 +0000 |
| commit | 8dc42c6e8a66e3f4252069bc993cada6b58728c9 (patch) | |
| tree | e07ad0176801739b12d3a6af39588ab6ed81335a | |
| parent | e9b1ee0e784aad16a65eeb370bcaf49d585c6666 (diff) | |
| download | chrome-ec-8dc42c6e8a66e3f4252069bc993cada6b58728c9.tar.gz | |
corsola: fix auto-reload GPIO config when FRS mode enabled
When FRS enabled, the GPIO config auto-reload is enabled as well.
We should ensure in this period, the GPIO config auto-reload is
working as expected. Sets the following accordingly:
GPIO1: received VBUS SNK enabled, keep high, other commands, keep low
GPIO2: received VBUS SRC enabled, keep high, other commands, keep low
BUG=b:281177690
TEST=trigger S0->S5 with a FRS hub with power attached, and EN_SNK is
enabled (rt1718s_gpio)
BRANCH=none
Change-Id: I991e779baa991dd3f1fa9d181728459cf1778461
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4507010
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Sung-Chi Li <lschyi@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
| -rw-r--r-- | baseboard/cherry/baseboard.c | 4 | ||||
| -rw-r--r-- | driver/tcpm/rt1718s.h | 9 | ||||
| -rw-r--r-- | zephyr/program/corsola/src/npcx_usbc.c | 15 |
3 files changed, 20 insertions, 8 deletions
diff --git a/baseboard/cherry/baseboard.c b/baseboard/cherry/baseboard.c index 36df319f8c..4f43d8d238 100644 --- a/baseboard/cherry/baseboard.c +++ b/baseboard/cherry/baseboard.c @@ -313,10 +313,10 @@ __override int board_rt1718s_init(int port) /* gpio 1/2 output high when receiving frx signal */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_VBUS_CTRL, - RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, + RT1718S_GPIO_VBUS_CTRL_FRS_RX_VBUS, 0xFF)); RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_VBUS_CTRL, - RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, + RT1718S_GPIO_VBUS_CTRL_FRS_RX_VBUS, 0xFF)); /* Turn on SBU switch */ diff --git a/driver/tcpm/rt1718s.h b/driver/tcpm/rt1718s.h index 76bbfd48a8..d14e2bd498 100644 --- a/driver/tcpm/rt1718s.h +++ b/driver/tcpm/rt1718s.h @@ -92,9 +92,14 @@ #define RT1718S_ENA_SRC_VBUS_CTRL 0xE1 #define RT1718S_FAULT_OC1_VBUS_CTRL 0xE3 #define RT1718S_GPIO1_VBUS_CTRL 0xEA -#define RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS BIT(6) +#define RT1718S_GPIO_VBUS_CTRL_FRS_RX_VBUS BIT(6) +#define RT1718S_GPIO_VBUS_CTRL_FRS_TX_VBUS BIT(5) +#define RT1718S_GPIO_VBUS_CTRL_ENA_SRC_HV_VBUS_GPIO BIT(4) +#define RT1718S_GPIO_VBUS_CTRL_ENA_SRC_VBUS_GPIO BIT(3) +#define RT1718S_GPIO_VBUS_CTRL_DIS_SRC_VBUS_GPIO BIT(2) +#define RT1718S_GPIO_VBUS_CTRL_ENA_SNK_VBUS_GPIO BIT(1) +#define RT1718S_GPIO_VBUS_CTRL_DIS_SNK_VBUS_GPIO BIT(0) #define RT1718S_GPIO2_VBUS_CTRL 0xEB -#define RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS BIT(6) #define RT1718S_VBUS_CTRL_EN 0xEC #define RT1718S_VBUS_CTRL_EN_GPIO2_VBUS_PATH_EN BIT(7) #define RT1718S_VBUS_CTRL_EN_GPIO1_VBUS_PATH_EN BIT(6) diff --git a/zephyr/program/corsola/src/npcx_usbc.c b/zephyr/program/corsola/src/npcx_usbc.c index 10a977696e..a03e659171 100644 --- a/zephyr/program/corsola/src/npcx_usbc.c +++ b/zephyr/program/corsola/src/npcx_usbc.c @@ -94,11 +94,18 @@ __override int board_rt1718s_init(int port) /* gpio1 low, gpio2 output high when receiving frs signal */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_VBUS_CTRL, - RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, + RT1718S_GPIO_VBUS_CTRL_FRS_RX_VBUS, 0)); - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_VBUS_CTRL, - RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, - 0xFF)); + /* GPIO1 EN_SNK high when received TCPCI SNK enabled command */ + RETURN_ERROR(rt1718s_update_bits8( + port, RT1718S_GPIO1_VBUS_CTRL, + RT1718S_GPIO_VBUS_CTRL_ENA_SNK_VBUS_GPIO, 0xFF)); + /* GPIO2 EN_SRC high when received TCPCI SRC enabled command */ + RETURN_ERROR(rt1718s_update_bits8( + port, RT1718S_GPIO2_VBUS_CTRL, + RT1718S_GPIO_VBUS_CTRL_FRS_RX_VBUS | + RT1718S_GPIO_VBUS_CTRL_ENA_SRC_VBUS_GPIO, + 0xFF)); /* Trigger GPIO 1/2 change when FRS signal received */ RETURN_ERROR(rt1718s_update_bits8( |