diff options
author | Vadim Bendebury <vbendeb@chromium.org> | 2015-07-17 11:38:43 -0700 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-07-25 04:20:23 +0000 |
commit | 6f13628e7f29816abfe5108cdde55c00c36e990b (patch) | |
tree | 7f27dbe3f6365761b333473a1ae2373d84546ffd | |
parent | 24a0b31732d00fe24f288ad7d7900ab5ee2b40f6 (diff) | |
download | chrome-ec-6f13628e7f29816abfe5108cdde55c00c36e990b.tar.gz |
cr50: Use distinct configuration option for SPI Slave support
SPI slave and master interfaces require very different code to
support, they should have separate configuration options.
Host command code printouts should use their own console channel.
Using SPS to designate SPI Slave interface is not universally
acceptable, a bug has been opened to discuss the alternatives and
clean up the code.
BRANCH=none
BUG=chromium:512613
TEST=make buildall -j
Change-Id: I6683286a221c4689ecc247fdfe8ebca529f3f458
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/286469
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
-rw-r--r-- | board/cr50/board.h | 4 | ||||
-rw-r--r-- | chip/g/build.mk | 4 | ||||
-rw-r--r-- | chip/g/sps.c | 4 | ||||
-rw-r--r-- | chip/g/sps_hc.c | 6 | ||||
-rw-r--r-- | common/console_output.c | 1 | ||||
-rw-r--r-- | include/config.h | 14 | ||||
-rw-r--r-- | include/console.h | 1 |
7 files changed, 22 insertions, 12 deletions
diff --git a/board/cr50/board.h b/board/cr50/board.h index e93ff03ff1..5cd5c0f621 100644 --- a/board/cr50/board.h +++ b/board/cr50/board.h @@ -25,8 +25,8 @@ #define CONFIG_USB_PID 0x5014 /* Enable SPI Slave (SPS) module */ -#define CONFIG_SPI -#define CONFIG_HOSTCMD_SPI +#define CONFIG_SPS +#define CONFIG_HOSTCMD_SPS /* We don't need to send events to the AP */ #undef CONFIG_HOSTCMD_EVENTS diff --git a/chip/g/build.mk b/chip/g/build.mk index 40a9ed2ba8..a9747d3aea 100644 --- a/chip/g/build.mk +++ b/chip/g/build.mk @@ -18,8 +18,8 @@ CPPFLAGS+= -DGC_REVISION="$(ver_str)" # Required chip modules chip-y=clock.o gpio.o hwtimer.o jtag.o system.o uart.o chip-y+= pmu.o -chip-$(CONFIG_SPI)+= sps.o -chip-$(CONFIG_HOSTCMD_SPI)+=sps_hc.o +chip-$(CONFIG_SPS)+= sps.o +chip-$(CONFIG_HOSTCMD_SPS)+=sps_hc.o chip-$(CONFIG_WATCHDOG)+=watchdog.o chip-$(CONFIG_USB)+=usb.o usb_endpoints.o diff --git a/chip/g/sps.c b/chip/g/sps.c index faeb43ccb2..9e1bccea2c 100644 --- a/chip/g/sps.c +++ b/chip/g/sps.c @@ -57,8 +57,8 @@ static uint32_t sps_tx_count, sps_rx_count, tx_empty_count, max_rx_batch; /* Console output macros */ -#define CPUTS(outstr) cputs(CC_SPI, outstr) -#define CPRINTS(format, args...) cprints(CC_SPI, format, ## args) +#define CPUTS(outstr) cputs(CC_SPS, outstr) +#define CPRINTS(format, args...) cprints(CC_SPS, format, ## args) void sps_tx_status(uint8_t byte) { diff --git a/chip/g/sps_hc.c b/chip/g/sps_hc.c index d046117549..d99e095ab9 100644 --- a/chip/g/sps_hc.c +++ b/chip/g/sps_hc.c @@ -32,9 +32,9 @@ */ /* Console output macros */ -#define CPUTS(outstr) cputs(CC_SPI, outstr) -#define CPRINTS(format, args...) cprints(CC_SPI, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SPI, format, ## args) +#define CPUTS(outstr) cputs(CC_HOSTCMD, outstr) +#define CPRINTS(format, args...) cprints(CC_HOSTCMD, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_HOSTCMD, format, ## args) /* * Incoming messages are collected here until they're ready to process. The diff --git a/common/console_output.c b/common/console_output.c index 974e090608..ddb2ad298b 100644 --- a/common/console_output.c +++ b/common/console_output.c @@ -54,6 +54,7 @@ static const char * const channel_names[] = { "port80", "pwm", "spi", + "sps", "switch", "system", "task", diff --git a/include/config.h b/include/config.h index 8cd6e5a19b..17d0712b79 100644 --- a/include/config.h +++ b/include/config.h @@ -835,9 +835,9 @@ #undef CONFIG_HOSTCMD_I2C_SLAVE_ADDR /* - * Accept EC host commands over the SPI (slave) interface. + * Accept EC host commands over the SPI slave (SPS) interface. */ -#undef CONFIG_HOSTCMD_SPI +#undef CONFIG_HOSTCMD_SPS /* * Host command rate limiting assures EC will have time to process lower @@ -1343,9 +1343,17 @@ /* Support smbus interface */ #undef CONFIG_SMBUS -/* Support SPI (slave) interfaces */ +/* Support SPI master interfaces */ #undef CONFIG_SPI +/* + * Support SPI Slave interfaces. The first board supporting this is cr50 and + * in its parlance SPI_SLAVE is called SPS. This convention might be + * reconsidered later, and the use of "SPI" in different config options needs + * to be cleand up. (crbug.com/512613). + */ +#undef CONFIG_SPS + /* Define SPI chip select GPIO pin. */ #undef CONFIG_SPI_CS_GPIO diff --git a/include/console.h b/include/console.h index 00036d3632..91bd7783c8 100644 --- a/include/console.h +++ b/include/console.h @@ -49,6 +49,7 @@ enum console_channel { CC_PORT80, CC_PWM, CC_SPI, + CC_SPS, CC_SWITCH, CC_SYSTEM, CC_TASK, |