Skyrim: Move USB mux functions to board code

Move functions which are setting USB mux parameters into board
functions, as the tuning for each port will be sensitive to the board
layout.  Also, re-name mux set functions to reflect that they're no
longer in the equivalent of baseboard code.

LOW_COVERAGE_REASON=Skyrim board tests not created yet: b/247151116
BRANCH=None
BUG=b:244457125
TEST=zmake build skyrim and variants

Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I03ef85d409db5b49dae2646916e9652d04d0f2af
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3905890
Reviewed-by: Robert Zieba <robertzieba@google.com>
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>

9 files changed, 435 insertions, 256 deletions

diff --git a/zephyr/projects/skyrim/CMakeLists.txt b/zephyr/projects/skyrim/CMakeLists.txt
index 12efdbe823..2235958b63 100644
--- a/zephyr/projects/skyrim/CMakeLists.txt
+++ b/zephyr/projects/skyrim/CMakeLists.txt
@@ -20,6 +20,7 @@ if(DEFINED CONFIG_BOARD_MORTHAL)
 	project(morthal)
 	zephyr_library_sources(
 		"src/morthal/ppc_config.c"
+		"src/morthal/usb_mux_config.c"
 		"src/usbc_config.c"
 )
 endif()
@@ -28,6 +29,7 @@ if(DEFINED CONFIG_BOARD_SKYRIM)
 	project(skyrim)
 	cros_ec_library_include_directories_ifdef(CONFIG_BOARD_SKYRIM include)
 	zephyr_library_sources(
+			"src/skyrim/usb_mux_config.c"
 			"src/skyrim/ppc_config.c"
 			"src/skyrim/form_factor.c"
 			"src/skyrim/alt_charger.c"
@@ -39,6 +41,7 @@ endif()
 if(DEFINED CONFIG_BOARD_WINTERHOLD)
 	project(winterhold)
 	zephyr_library_sources(
+		"src/winterhold/usb_mux_config.c"
     		"src/winterhold/usbc_config.c"
 		"src/winterhold/ppc_config.c"
     )
diff --git a/zephyr/projects/skyrim/morthal.dts b/zephyr/projects/skyrim/morthal.dts
index b1ea8abb14..bb1e45aa87 100644
--- a/zephyr/projects/skyrim/morthal.dts
+++ b/zephyr/projects/skyrim/morthal.dts
@@ -130,7 +130,7 @@
 	anx7483_port0: anx7483@3e {
 		compatible = "analogix,anx7483";
 		reg = <0x3e>;
-		board-set = "baseboard_anx7483_c0_mux_set";
+		board-set = "board_anx7483_c0_mux_set";
 	};
 };
 
@@ -138,7 +138,7 @@
 	anx7483_port1: anx7483@3e {
 		compatible = "analogix,anx7483";
 		reg = <0x3e>;
-		board-set = "baseboard_anx7483_c1_mux_set";
+		board-set = "board_anx7483_c1_mux_set";
 	};
 	ppc_port1: nx20p348x@71 {
 		compatible = "nxp,nx20p348x";
diff --git a/zephyr/projects/skyrim/skyrim.dts b/zephyr/projects/skyrim/skyrim.dts
index 5bc7519154..02308e4390 100644
--- a/zephyr/projects/skyrim/skyrim.dts
+++ b/zephyr/projects/skyrim/skyrim.dts
@@ -148,7 +148,7 @@
 	anx7483_port0: anx7483@3e {
 		compatible = "analogix,anx7483";
 		reg = <0x3e>;
-		board-set = "baseboard_anx7483_c0_mux_set";
+		board-set = "board_anx7483_c0_mux_set";
 	};
 };
 
@@ -156,7 +156,7 @@
 	anx7483_port1: anx7483@3e {
 		compatible = "analogix,anx7483";
 		reg = <0x3e>;
-		board-set = "baseboard_anx7483_c1_mux_set";
+		board-set = "board_anx7483_c1_mux_set";
 	};
 	ppc_port1: nx20p348x@71 {
 		compatible = "nxp,nx20p348x";
diff --git a/zephyr/projects/skyrim/src/morthal/usb_mux_config.c b/zephyr/projects/skyrim/src/morthal/usb_mux_config.c
new file mode 100644
index 0000000000..8fe76233e2
--- /dev/null
+++ b/zephyr/projects/skyrim/src/morthal/usb_mux_config.c
@@ -0,0 +1,142 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Morthal board-specific USB-C mux configuration */
+
+#include <zephyr/drivers/gpio.h>
+
+#include "console.h"
+#include "cros_board_info.h"
+#include "cros_cbi.h"
+#include "driver/retimer/anx7483_public.h"
+#include "hooks.h"
+#include "ioexpander.h"
+#include "usb_mux.h"
+#include "usbc/usb_muxes.h"
+
+#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args)
+#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args)
+
+/*
+ * USB C0 (general) and C1 (just ANX DB) use IOEX pins to
+ * indicate flipped polarity to a protection switch.
+ */
+static int ioex_set_flip(int port, mux_state_t mux_state)
+{
+	if (port == 0) {
+		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+				1);
+		else
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+				0);
+	} else {
+		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+				1);
+		else
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+				0);
+	}
+
+	return EC_SUCCESS;
+}
+
+int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	/* Set the SBU polarity mux */
+	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+	return anx7483_set_default_tuning(me, mux_state);
+}
+
+int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED;
+
+	/* Set the SBU polarity mux */
+	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+	/* Remove flipped from the state for easier compraisons */
+	mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED;
+
+	RETURN_ERROR(anx7483_set_default_tuning(me, mux_state));
+
+	if (mux_state == USB_PD_MUX_USB_ENABLED) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DP_ENABLED) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DOCK && !flipped) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DOCK && flipped) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	}
+
+	return EC_SUCCESS;
+}
+
+int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	CPRINTSUSB("C1: PS8818 mux using default tuning");
+
+	/* Once a DP connection is established, we need to set IN_HPD */
+	if (mux_state & USB_PD_MUX_DP_ENABLED)
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1);
+	else
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0);
+
+	return 0;
+}
+
+static void setup_mux(void)
+{
+	uint32_t val;
+
+	if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0)
+		CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG");
+	/* Val will have our dts default on error, so continue setup */
+
+	if (val == FW_IO_DB_PS8811_PS8818) {
+		CPRINTSUSB("C1: Setting PS8818 mux");
+		USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1);
+	} else if (val == FW_IO_DB_NONE_ANX7483) {
+		CPRINTSUSB("C1: Setting ANX7483 mux");
+	} else {
+		CPRINTSUSB("Unexpected DB_IO board: %d", val);
+	}
+}
+DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C);
diff --git a/zephyr/projects/skyrim/src/skyrim/usb_mux_config.c b/zephyr/projects/skyrim/src/skyrim/usb_mux_config.c
new file mode 100644
index 0000000000..6c65e56d9e
--- /dev/null
+++ b/zephyr/projects/skyrim/src/skyrim/usb_mux_config.c
@@ -0,0 +1,142 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Skyrim board-specific USB-C mux configuration */
+
+#include <zephyr/drivers/gpio.h>
+
+#include "console.h"
+#include "cros_board_info.h"
+#include "cros_cbi.h"
+#include "driver/retimer/anx7483_public.h"
+#include "hooks.h"
+#include "ioexpander.h"
+#include "usb_mux.h"
+#include "usbc/usb_muxes.h"
+
+#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args)
+#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args)
+
+/*
+ * USB C0 (general) and C1 (just ANX DB) use IOEX pins to
+ * indicate flipped polarity to a protection switch.
+ */
+static int ioex_set_flip(int port, mux_state_t mux_state)
+{
+	if (port == 0) {
+		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+				1);
+		else
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+				0);
+	} else {
+		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+				1);
+		else
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+				0);
+	}
+
+	return EC_SUCCESS;
+}
+
+int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	/* Set the SBU polarity mux */
+	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+	return anx7483_set_default_tuning(me, mux_state);
+}
+
+int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED;
+
+	/* Set the SBU polarity mux */
+	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+	/* Remove flipped from the state for easier compraisons */
+	mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED;
+
+	RETURN_ERROR(anx7483_set_default_tuning(me, mux_state));
+
+	if (mux_state == USB_PD_MUX_USB_ENABLED) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DP_ENABLED) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DOCK && !flipped) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DOCK && flipped) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	}
+
+	return EC_SUCCESS;
+}
+
+int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	CPRINTSUSB("C1: PS8818 mux using default tuning");
+
+	/* Once a DP connection is established, we need to set IN_HPD */
+	if (mux_state & USB_PD_MUX_DP_ENABLED)
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1);
+	else
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0);
+
+	return 0;
+}
+
+static void setup_mux(void)
+{
+	uint32_t val;
+
+	if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0)
+		CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG");
+	/* Val will have our dts default on error, so continue setup */
+
+	if (val == FW_IO_DB_PS8811_PS8818) {
+		CPRINTSUSB("C1: Setting PS8818 mux");
+		USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1);
+	} else if (val == FW_IO_DB_NONE_ANX7483) {
+		CPRINTSUSB("C1: Setting ANX7483 mux");
+	} else {
+		CPRINTSUSB("Unexpected DB_IO board: %d", val);
+	}
+}
+DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C);
diff --git a/zephyr/projects/skyrim/src/usbc_config.c b/zephyr/projects/skyrim/src/usbc_config.c
index 401065a566..0ca421deca 100644
--- a/zephyr/projects/skyrim/src/usbc_config.c
+++ b/zephyr/projects/skyrim/src/usbc_config.c
@@ -83,131 +83,6 @@ static void usb_fault_interrupt_disable(void)
 DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, usb_fault_interrupt_disable,
 	     HOOK_PRIO_DEFAULT);
 
-/*
- * USB C0 (general) and C1 (just ANX DB) use IOEX pins to
- * indicate flipped polarity to a protection switch.
- */
-static int ioex_set_flip(int port, mux_state_t mux_state)
-{
-	if (port == USBC_PORT_C0) {
-		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
-			gpio_pin_set_dt(
-				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
-				1);
-		else
-			gpio_pin_set_dt(
-				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
-				0);
-	} else {
-		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
-			gpio_pin_set_dt(
-				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
-				1);
-		else
-			gpio_pin_set_dt(
-				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
-				0);
-	}
-
-	return EC_SUCCESS;
-}
-
-int baseboard_anx7483_c0_mux_set(const struct usb_mux *me,
-				 mux_state_t mux_state)
-{
-	/* Set the SBU polarity mux */
-	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
-
-	return anx7483_set_default_tuning(me, mux_state);
-}
-
-int baseboard_anx7483_c1_mux_set(const struct usb_mux *me,
-				 mux_state_t mux_state)
-{
-	bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED;
-
-	/* Set the SBU polarity mux */
-	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
-
-	/* Remove flipped from the state for easier compraisons */
-	mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED;
-
-	RETURN_ERROR(anx7483_set_default_tuning(me, mux_state));
-
-	if (mux_state == USB_PD_MUX_USB_ENABLED) {
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-	} else if (mux_state == USB_PD_MUX_DP_ENABLED) {
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-	} else if (mux_state == USB_PD_MUX_DOCK && !flipped) {
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-	} else if (mux_state == USB_PD_MUX_DOCK && flipped) {
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-	}
-
-	return EC_SUCCESS;
-}
-
-__overridable int board_c1_ps8818_mux_set(const struct usb_mux *me,
-					  mux_state_t mux_state)
-{
-	CPRINTSUSB("C1: PS8818 mux using default tuning");
-
-	/* Once a DP connection is established, we need to set IN_HPD */
-	if (mux_state & USB_PD_MUX_DP_ENABLED)
-		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1);
-	else
-		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0);
-
-	return 0;
-}
-
-static void setup_mux(void)
-{
-	uint32_t val;
-
-	if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0)
-		CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG");
-	/* Val will have our dts default on error, so continue setup */
-
-	if (val == FW_IO_DB_PS8811_PS8818) {
-		CPRINTSUSB("C1: Setting PS8818 mux");
-		USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1);
-	} else if (val == FW_IO_DB_NONE_ANX7483) {
-		CPRINTSUSB("C1: Setting ANX7483 mux");
-	} else {
-		CPRINTSUSB("Unexpected DB_IO board: %d", val);
-	}
-}
-DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C);
-
 int board_set_active_charge_port(int port)
 {
 	int is_valid_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT);
diff --git a/zephyr/projects/skyrim/src/winterhold/usb_mux_config.c b/zephyr/projects/skyrim/src/winterhold/usb_mux_config.c
new file mode 100644
index 0000000000..ca7b604d10
--- /dev/null
+++ b/zephyr/projects/skyrim/src/winterhold/usb_mux_config.c
@@ -0,0 +1,142 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Winterhold board-specific USB-C mux configuration */
+
+#include <zephyr/drivers/gpio.h>
+
+#include "console.h"
+#include "cros_board_info.h"
+#include "cros_cbi.h"
+#include "driver/retimer/anx7483_public.h"
+#include "hooks.h"
+#include "ioexpander.h"
+#include "usb_mux.h"
+#include "usbc/usb_muxes.h"
+
+#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args)
+#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args)
+
+/*
+ * USB C0 (general) and C1 (just ANX DB) use IOEX pins to
+ * indicate flipped polarity to a protection switch.
+ */
+static int ioex_set_flip(int port, mux_state_t mux_state)
+{
+	if (port == 0) {
+		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+				1);
+		else
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
+				0);
+	} else {
+		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+				1);
+		else
+			gpio_pin_set_dt(
+				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
+				0);
+	}
+
+	return EC_SUCCESS;
+}
+
+int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	/* Set the SBU polarity mux */
+	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+	return anx7483_set_default_tuning(me, mux_state);
+}
+
+int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED;
+
+	/* Set the SBU polarity mux */
+	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
+
+	/* Remove flipped from the state for easier compraisons */
+	mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED;
+
+	RETURN_ERROR(anx7483_set_default_tuning(me, mux_state));
+
+	if (mux_state == USB_PD_MUX_USB_ENABLED) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DP_ENABLED) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DOCK && !flipped) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	} else if (mux_state == USB_PD_MUX_DOCK && flipped) {
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
+					    ANX7483_EQ_SETTING_12_5DB));
+		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
+					    ANX7483_EQ_SETTING_12_5DB));
+	}
+
+	return EC_SUCCESS;
+}
+
+int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state)
+{
+	CPRINTSUSB("C1: PS8818 mux using default tuning");
+
+	/* Once a DP connection is established, we need to set IN_HPD */
+	if (mux_state & USB_PD_MUX_DP_ENABLED)
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1);
+	else
+		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0);
+
+	return 0;
+}
+
+static void setup_mux(void)
+{
+	uint32_t val;
+
+	if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0)
+		CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG");
+	/* Val will have our dts default on error, so continue setup */
+
+	if (val == FW_IO_DB_PS8811_PS8818) {
+		CPRINTSUSB("C1: Setting PS8818 mux");
+		USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1);
+	} else if (val == FW_IO_DB_NONE_ANX7483) {
+		CPRINTSUSB("C1: Setting ANX7483 mux");
+	} else {
+		CPRINTSUSB("Unexpected DB_IO board: %d", val);
+	}
+}
+DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C);
diff --git a/zephyr/projects/skyrim/src/winterhold/usbc_config.c b/zephyr/projects/skyrim/src/winterhold/usbc_config.c
index 79052b6a96..8a33729284 100644
--- a/zephyr/projects/skyrim/src/winterhold/usbc_config.c
+++ b/zephyr/projects/skyrim/src/winterhold/usbc_config.c
@@ -83,131 +83,6 @@ static void usb_fault_interrupt_disable(void)
 DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, usb_fault_interrupt_disable,
 	     HOOK_PRIO_DEFAULT);
 
-/*
- * USB C0 and C1 use IOEX pins to indicate flipped polarity to a
- * protection switch.
- */
-static int ioex_set_flip(int port, mux_state_t mux_state)
-{
-	if (port == USBC_PORT_C0) {
-		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
-			gpio_pin_set_dt(
-				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
-				1);
-		else
-			gpio_pin_set_dt(
-				GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip),
-				0);
-	} else {
-		if (mux_state & USB_PD_MUX_POLARITY_INVERTED)
-			gpio_pin_set_dt(
-				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
-				1);
-		else
-			gpio_pin_set_dt(
-				GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip),
-				0);
-	}
-
-	return EC_SUCCESS;
-}
-
-int baseboard_anx7483_c0_mux_set(const struct usb_mux *me,
-				 mux_state_t mux_state)
-{
-	/* Set the SBU polarity mux */
-	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
-
-	return anx7483_set_default_tuning(me, mux_state);
-}
-
-int baseboard_anx7483_c1_mux_set(const struct usb_mux *me,
-				 mux_state_t mux_state)
-{
-	bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED;
-
-	/* Set the SBU polarity mux */
-	RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state));
-
-	/* Remove flipped from the state for easier compraisons */
-	mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED;
-
-	RETURN_ERROR(anx7483_set_default_tuning(me, mux_state));
-
-	if (mux_state == USB_PD_MUX_USB_ENABLED) {
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-	} else if (mux_state == USB_PD_MUX_DP_ENABLED) {
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-	} else if (mux_state == USB_PD_MUX_DOCK && !flipped) {
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-	} else if (mux_state == USB_PD_MUX_DOCK && flipped) {
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1,
-					    ANX7483_EQ_SETTING_12_5DB));
-		RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2,
-					    ANX7483_EQ_SETTING_12_5DB));
-	}
-
-	return EC_SUCCESS;
-}
-
-__overridable int board_c1_ps8818_mux_set(const struct usb_mux *me,
-					  mux_state_t mux_state)
-{
-	CPRINTSUSB("C1: PS8818 mux using default tuning");
-
-	/* Once a DP connection is established, we need to set IN_HPD */
-	if (mux_state & USB_PD_MUX_DP_ENABLED)
-		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1);
-	else
-		ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0);
-
-	return 0;
-}
-
-static void setup_mux(void)
-{
-	uint32_t val;
-
-	if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0)
-		CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG");
-	/* Val will have our dts default on error, so continue setup */
-
-	if (val == FW_IO_DB_PS8811_PS8818) {
-		CPRINTSUSB("C1: Setting PS8818 mux");
-		USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1);
-	} else if (val == FW_IO_DB_NONE_ANX7483) {
-		CPRINTSUSB("C1: Setting ANX7483 mux");
-	} else {
-		CPRINTSUSB("Unexpected DB_IO board: %d", val);
-	}
-}
-DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C);
-
 int board_set_active_charge_port(int port)
 {
 	int is_valid_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT);
diff --git a/zephyr/projects/skyrim/winterhold.dts b/zephyr/projects/skyrim/winterhold.dts
index 16cc421d68..1b2a89999f 100644
--- a/zephyr/projects/skyrim/winterhold.dts
+++ b/zephyr/projects/skyrim/winterhold.dts
@@ -119,7 +119,7 @@
 	anx7483_port0: anx7483@3e {
 		compatible = "analogix,anx7483";
 		reg = <0x3e>;
-		board-set = "baseboard_anx7483_c0_mux_set";
+		board-set = "board_anx7483_c0_mux_set";
 	};
 	ppc_port0: nx20p348x@71 {
 		compatible = "nxp,nx20p348x";
@@ -132,7 +132,7 @@
 	anx7483_port1: anx7483@3e {
 		compatible = "analogix,anx7483";
 		reg = <0x3e>;
-		board-set = "baseboard_anx7483_c1_mux_set";
+		board-set = "board_anx7483_c1_mux_set";
 	};
 	ppc_port1: nx20p348x@71 {
 		compatible = "nxp,nx20p348x";