diff options
| author | Stefan Adolfsson <sadolfsson@chromium.org> | 2018-05-17 13:47:33 +0200 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2018-06-19 20:02:24 +0000 |
| commit | 6c20727c6fb4c429db633156b9832297ce3698a4 (patch) | |
| tree | 1267c10e2ea4e36d6e84d4250fbdeee3b70f8d67 | |
| parent | 18199e27a8fb5659533f31a8446592fdaff6a21d (diff) | |
| download | chrome-ec-6c20727c6fb4c429db633156b9832297ce3698a4.tar.gz | |
npcx: CEC: Change input back to GPIO when disabling CEC
The factory tests relies on being able to read CEC_IN through the
GPIO API. When it is configured as TA1, it can't be read as a
GPIO. With this change, the pin will be a reconfigured as a GPIO
at boot or when CEC is runtime disabled using "ectool cec set
enable 0"
Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org>
BUG=b:79842676
BRANCH=none
TEST=Test that "ectool cec read" still works with CEC on, and
that "ectool gpioget CEC_IN" reflects the incoming voltage when
CEC is off.
Reviewed-on: https://chromium-review.googlesource.com/1064110
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Change-Id: I3b17d6551612a156897d95ea2473e4fbcbd70e39
Reviewed-on: https://chromium-review.googlesource.com/1070068
Reviewed-by: Stefan Adolfsson <sadolfsson@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Stefan Adolfsson <sadolfsson@chromium.org>
Commit-Queue: Stefan Adolfsson <sadolfsson@chromium.org>
| -rw-r--r-- | chip/npcx/cec.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/chip/npcx/cec.c b/chip/npcx/cec.c index bb8f1fd29a..56e74bd429 100644 --- a/chip/npcx/cec.c +++ b/chip/npcx/cec.c @@ -1023,6 +1023,10 @@ static int cec_set_enable(uint8_t enable) return EC_RES_SUCCESS; if (enable) { + /* Configure GPIO40/TA1 as capture timer input (TA1) */ + CLEAR_BIT(NPCX_DEVALT(0xC), NPCX_DEVALTC_TA1_SL2); + SET_BIT(NPCX_DEVALT(3), NPCX_DEVALT3_TA1_SL1); + enter_state(CEC_STATE_IDLE); /* @@ -1049,6 +1053,10 @@ static int cec_set_enable(uint8_t enable) task_disable_irq(NPCX_IRQ_MFT_1); + /* Configure GPIO40/TA1 back to GPIO */ + CLEAR_BIT(NPCX_DEVALT(3), NPCX_DEVALT3_TA1_SL1); + SET_BIT(NPCX_DEVALT(0xC), NPCX_DEVALTC_TA1_SL2); + enter_state(CEC_STATE_DISABLED); CPRINTF("CEC disabled\n"); @@ -1140,10 +1148,6 @@ static void cec_init(void) /* APB1 is the clock we base the timers on */ apb1_freq_div_10k = clock_get_apb1_freq()/10000; - /* Configure TA1 as capture timer input instead of GPIO */ - CLEAR_BIT(NPCX_DEVALT(0xC), NPCX_DEVALTC_TA1_SL2); - SET_BIT(NPCX_DEVALT(3), NPCX_DEVALT3_TA1_SL1); - /* Ensure Multi-Function timer is powered up. */ CLEAR_BIT(NPCX_PWDWN_CTL(mdl), NPCX_PWDWN_CTL1_MFT1_PD); |