diff options
| author | Namyoon Woo <namyoon@chromium.org> | 2019-08-02 11:25:35 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-01-16 04:37:33 +0000 |
| commit | 2367420fd6f4a7db36c7cb566aa256e873fb33eb (patch) | |
| tree | a5b3a2f313d8dd93b85561dd932bf094f56cfbff | |
| parent | 53534ea1da670669eec5be9144ddc549b9fe6bc3 (diff) | |
| download | chrome-ec-2367420fd6f4a7db36c7cb566aa256e873fb33eb.tar.gz | |
extend INT_AP_L pulse
This patch extends INT_AP_L pulses to be at least 6.5 micro seconds.
It is a tentative solution to to meet Intel TGL/JSL requirement on
interrupt duration.
BUG=b:130515803
BRANCH=cr50
TEST=checked INT_AP_L pulse length ranges extended to 6.5 ~ 11 usec
with logic analyzer on Hatch.
Checked dmesg and coreboot log has no TPM errors.
Change-Id: Iea8d0a779fff7cbda0c8647f3c1de719c3c3d7e0
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002958
Reviewed-by: Andrey Pronin <apronin@chromium.org>
| -rw-r--r-- | chip/g/hwtimer.c | 9 | ||||
| -rw-r--r-- | chip/g/sps.c | 10 | ||||
| -rw-r--r-- | common/i2cs_tpm.c | 10 | ||||
| -rw-r--r-- | include/timer.h | 7 |
4 files changed, 36 insertions, 0 deletions
diff --git a/chip/g/hwtimer.c b/chip/g/hwtimer.c index 9fbe3f0920..7d9b31e470 100644 --- a/chip/g/hwtimer.c +++ b/chip/g/hwtimer.c @@ -211,3 +211,12 @@ void udelay(unsigned us) ; } #endif /* CONFIG_HW_SPECIFIC_UDELAY */ + +void tick_delay(uint32_t ticks) +{ + uint32_t cur_tick = GREG32(TIMELS, SOURCE(VALUE)); + + /* Note: the counter counts down. */ + while ((cur_tick - GREG32(TIMELS, SOURCE(VALUE))) < ticks) + ; +} diff --git a/chip/g/sps.c b/chip/g/sps.c index 5fd6735dd8..7f8b81de9b 100644 --- a/chip/g/sps.c +++ b/chip/g/sps.c @@ -344,6 +344,16 @@ static void sps_rx_interrupt(uint32_t port, int cs_deasserted) * completed. */ gpio_set_level(GPIO_INT_AP_L, 0); + + /* + * This is to meet the AP requirement of minimum 4 usec + * duration of INT_AP_L assertion. + * + * TODO(b/130515803): Ideally, this should be improved + * to support any duration requirement in future. + */ + tick_delay(2); + gpio_set_level(GPIO_INT_AP_L, 1); seen_data = 0; } diff --git a/common/i2cs_tpm.c b/common/i2cs_tpm.c index 4518eddbb9..cb893cf84f 100644 --- a/common/i2cs_tpm.c +++ b/common/i2cs_tpm.c @@ -208,6 +208,16 @@ static void wr_complete_handler(void *i2cs_data, size_t i2cs_data_size) * on the AP interrupt line for that. */ gpio_set_level(GPIO_INT_AP_L, 0); + + /* + * This is to meet the AP requirement of minimum 4 usec + * duration of INT_AP_L assertion. + * + * TODO(b/130515803): Ideally, this should be improved + * to support any duration requirement in future. + */ + tick_delay(2); + gpio_set_level(GPIO_INT_AP_L, 1); } diff --git a/include/timer.h b/include/timer.h index d8bc252ba0..89a49762ae 100644 --- a/include/timer.h +++ b/include/timer.h @@ -178,3 +178,10 @@ static inline int time_after(uint32_t a, uint32_t b) } #endif /* __CROS_EC_TIMER_H */ + +/** + * Busy-wait for the given ticks. + * + * @param ticks Number of ticks to delay. + */ +void tick_delay(uint32_t ticks); |