diff options
| author | Patryk Duda <pdk@semihalf.com> | 2023-01-25 16:09:38 +0100 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2023-04-07 09:42:24 +0000 |
| commit | 414bd1fd6b99ae3d28cbccd458ce66e129592de2 (patch) | |
| tree | 9c371cc0ae3e821d4ea3052949c263ec33a18219 | |
| parent | 2c3a9fc9ad623ba387d225ec0db352a805bdb515 (diff) | |
| download | chrome-ec-414bd1fd6b99ae3d28cbccd458ce66e129592de2.tar.gz | |
flash_fp_mcu: Dynamically determine gpiochip number for hatch
Hatch-kernelnext uses upstream kernel which changes every week.
In this case it's cumbersome to hardcode gpiochip number in the script
and we should determine it dynamically.
BUG=b:277206670
BRANCH=none
TEST=Run `flash_fp_mcu --hello` on hatch and hatch-kernelnext
Change-Id: Ib2aaf37888bf880e7066c02fee68352808d9b344
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4404897
Reviewed-by: Bobby Casey <bobbycasey@google.com>
Commit-Queue: Patryk Duda <patrykd@google.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Tested-by: Patryk Duda <patrykd@google.com>
| -rw-r--r-- | util/flash_fp_mcu | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/util/flash_fp_mcu b/util/flash_fp_mcu index e383186a9f..2d859f3dba 100644 --- a/util/flash_fp_mcu +++ b/util/flash_fp_mcu @@ -524,24 +524,24 @@ config_hatch() { # Examine `cat /sys/kernel/debug/pinctrl/INT34BB:00/gpio-ranges` on a hatch # device to determine gpio number from pin number. - local gpiochip="gpiochip712" - # Support kernel version 4.x, 5.4 and 5.10 during transition to 5.15+ - match_kernel_regex "^((4\..)|(5\.4\.)|(5\.10\.))" && gpiochip="gpiochip200" - readonly GPIO_CHIP="${gpiochip}" - local offset=0 - # Support kernel version 4.x, 5.4 and 5.10 during transition to 5.15+ - # v4.4 has GPIOs that are offset by -512 - match_kernel_regex "^((4\..)|(5\.4\.)|(5\.10\.))" && offset=512 - - # FPMCU RST_ODL is on GPP_A12 = 712 + 12 = 724 - local gpionrst=724 - readonly GPIO_NRST=$(( gpionrst - offset )) - # FPMCU BOOT0 is on GPP_A22 = 712 + 22 = 734 - local gpioboot=734 - readonly GPIO_BOOT0=$(( gpioboot - offset )) - # FP_PWR_EN is on GPP_C11 = 968 + (192 - 181) = 968 + 11 = 979 - local gpiopwren=979 - readonly GPIO_PWREN=$(( gpiopwren - offset )) + local gpiochip_dev_path="*/pci0000\:00/INT34BB\:00/gpio/*" + local gpiobase + if ! gpiobase=$(get_sysfs_gpiochip_base "${gpiochip_dev_path}"); then + echo "Unable to find gpio chip base" + return "${EXIT_PRECONDITION}" + fi + + local GPIO_CHIP="gpiochip${gpiobase}" + + # FPMCU RST_ODL is on GPP_A12 = 12 + local gpionrst=12 + readonly GPIO_NRST=$(( gpionrst + gpiobase )) + # FPMCU BOOT0 is on GPP_A22 = 22 + local gpioboot=22 + readonly GPIO_BOOT0=$(( gpioboot + gpiobase )) + # FP_PWR_EN is on GPP_C11 = 256 + 11 = 267 + local gpiopwren=267 + readonly GPIO_PWREN=$(( gpiopwren + gpiobase )) } config_herobrine() { |