diff options
| author | Eric Yilun Lin <yllin@chromium.org> | 2023-04-10 14:08:35 +0800 |
|---|---|---|
| committer | Eric Yilun Lin <yllin@google.com> | 2023-04-10 06:12:06 +0000 |
| commit | 0dd5bdacefd8b62523646950ad3754c1a60ca8b9 (patch) | |
| tree | f49684a4509738504f7c5982e1fb3a982023d593 | |
| parent | 012bda0c99d72191b00fb354691274069cf5b061 (diff) | |
| parent | 44842a951ca2757856dfae258fd9bde77ae4fd89 (diff) | |
| download | chrome-ec-0dd5bdacefd8b62523646950ad3754c1a60ca8b9.tar.gz | |
Merge remote-tracking branch cros/main into firmware-corsola-15194.B-main
Generated by: util/update_release_branch.py -r -z --board corsla --relevant_paths_file
util/corsola-relevant-paths.txt firmware-corsola-15194.B-main
Relevant changes:
git log --oneline 012bda0c99..44842a951c -- zephyr/program/corsla
common/charge_state_v2.c common/dps.c common/mkbp_* common/usb_charger.c
common/usb_common.c common/usbc/*_pd_* common/usbc/dp_alt_mode.c
common/usbc/usb_pe_drp_sm.c common/usbc/usb_prl_sm.c
common/usbc/usb_sm.c common/usbc/usb_tc_drp_acc_trysrc_sm.c
driver/battery/smart.c driver/bc12/pi3usb9201.* driver/charger/isl923x.*
driver/charger/rt949* driver/ppc/nx20p348x.* driver/ppc/rt1718s.*
driver/ppc/syv682x.* driver/tcpm/anx7447.* driver/tcpm/rt1718s.*
driver/tcpm/tcpci.* driver/usb_mux/it5205.* driver/usb_mux/ps8743.*
power/mt8186.c zephyr/boards/arm/npcx9/* zephyr/boards/riscv/it8xxx2/*
zephyr/drivers/* zephyr/program/corsola/* zephyr/shim/*
util/getversion.sh
ad568190dd USB-PD: Support Vconn swap during EPR entry for Sink
a421b3380f Zephyr: Add NX20P3481 CONFIG
53f35199ba Zephyr test: Test NXP PPC interrupts
eea95bc3d1 mt8186,mt8188: check the holder of AP_RST_ODL
171aa03229 zmake: Track project inheritance in ProjectConfig
67d4a05823 NX20P348X: Correct dead battery exit error handling
5056315df0 mt8186,mt8188: fix chipset_force_shutdown before power_chipset_init
76c0324c1b zephyr/tcpc_emul: automatically include prerequisites
2921b0afa3 zephyr: Don't include autoconf.h
fafe10a6fe ppc/nx20p348x: Do not set reserved bit
a514bea1d0 battery: Remove dead sbs_passthrough host cmds
d32a389718 Charger: CONFIG gate bypass mode
a4eb1414fd zephyr: tcpc: implement i2c transactions in rt1718s emulator
d8c8d452f7 zephyr: tcpc: add rt1718s as basic tcpc emulator
BRANCH=None
BUG=b:257320026 b:273854897 b:276229973 b:276468569 b:276947804
BUG=b:273722902 b:272518464 b:271118112 b:276458241
TEST=`make -j buildall`
Cq-Depend: chromium:4410221
Force-Relevant-Builds: all
Change-Id: I87dfb3549a3f228c1d4067965561a351999aa2c8
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
275 files changed, 9358 insertions, 1245 deletions
diff --git a/Makefile.rules b/Makefile.rules index cfb5e62230..5f1783e758 100644 --- a/Makefile.rules +++ b/Makefile.rules @@ -203,8 +203,12 @@ build_boards: | $(FAILED_BOARDS_DIR) @rm -f $(FAILED_BOARDS_DIR)/* $(MAKE) try_build_boards +.PHONY: check_undef +check_undef: + $(call quiet,check_undef) + .PHONY: buildall_only -buildall_only: build_boards build_cros_ec_commands +buildall_only: build_boards build_cros_ec_commands check_undef $(MAKE) BOARD=host utils $(MAKE) build_cts $(MAKE) buildfuzztests @@ -266,13 +270,17 @@ conflicting_options := \ UART_CONSOLE cmd_check_allowed = ./util/kconfig_check.py -c ${config} \ - -a util/config_allowed.txt -p PLATFORM_EC_ -s zephyr/ \ + -a util/config_allowed.txt -p PLATFORM_EC_ -s "" \ -I "${ZEPHYR_BASE}" \ $(foreach opt,$(conflicting_options),-i $(opt)) check +cmd_check_undef = ./util/kconfig_check.py -s "" -I "${ZEPHYR_BASE}" \ + check_undef else cmd_check_allowed = true +cmd_check_undef = true endif quiet_cmd_check_allowed = CHECK_ALLOWED ${config} +quiet_cmd_check_undef = CHECK_UNDEF # Print any important notices at the end of the build. .PHONY: notice diff --git a/board/agah/board.h b/board/agah/board.h index 0622e33df3..35ecdc58e6 100644 --- a/board/agah/board.h +++ b/board/agah/board.h @@ -135,6 +135,7 @@ #define CONFIG_FANS FAN_CH_COUNT /* Charger defines */ +#define CONFIG_CHARGER_BYPASS_MODE #define CONFIG_CHARGER_ISL9241 #define CONFIG_CHARGER_SENSE_RESISTOR 10 #define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 diff --git a/board/hades/board.h b/board/hades/board.h index 833529e03e..612507fb74 100644 --- a/board/hades/board.h +++ b/board/hades/board.h @@ -135,6 +135,7 @@ #define CONFIG_FANS FAN_CH_COUNT /* Charger defines */ +#define CONFIG_CHARGER_BYPASS_MODE #define CONFIG_CHARGER_ISL9241 #define CONFIG_CHARGER_SENSE_RESISTOR 10 #define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 diff --git a/board/hatch_fp/build.mk b/board/hatch_fp/build.mk index 2647b4af9c..7ded3aeb6a 100644 --- a/board/hatch_fp/build.mk +++ b/board/hatch_fp/build.mk @@ -44,6 +44,7 @@ test-list-y=\ global_initialization \ libc_printf \ libcxx \ + malloc \ mpu \ mutex \ panic \ @@ -56,6 +57,7 @@ test-list-y=\ rollback_entropy \ rsa3 \ rtc \ + sbrk \ scratchpad \ sha256 \ sha256_unrolled \ diff --git a/board/hatch_fp/fpsensor_detect_rw.c b/board/hatch_fp/fpsensor_detect_rw.c index 2a313cda18..e69f0e0000 100644 --- a/board/hatch_fp/fpsensor_detect_rw.c +++ b/board/hatch_fp/fpsensor_detect_rw.c @@ -7,7 +7,7 @@ #include "gpio.h" #include "timer.h" -enum fp_sensor_type get_fp_sensor_type(void) +enum fp_sensor_type fpsensor_detect_get_type(void) { enum fp_sensor_type ret; @@ -32,7 +32,7 @@ enum fp_sensor_type get_fp_sensor_type(void) return ret; } -enum fp_sensor_spi_select get_fp_sensor_spi_select(void) +enum fp_sensor_spi_select fpsensor_detect_get_spi_select(void) { return FP_SENSOR_SPI_SELECT_PRODUCTION; } diff --git a/board/kracko/board.c b/board/kracko/board.c index e0415b5c14..025ec5109c 100644 --- a/board/kracko/board.c +++ b/board/kracko/board.c @@ -656,6 +656,22 @@ __override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp) charger_set_otg_current_voltage(port, current, 5000); } +__override uint16_t board_get_ps8xxx_product_id(int port) +{ + /* Kracko variant doesn't have ps8xxx product in the port 0 */ + if (port == 0) + return 0; + + switch (get_cbi_ssfc_tcpc_p1()) { + case SSFC_TCPC_P1_PS8805: + return PS8805_PRODUCT_ID; + case SSFC_TCPC_P1_DEFAULT: + case SSFC_TCPC_P1_PS8705: + default: + return PS8705_PRODUCT_ID; + } +} + /* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ const struct pwm_t pwm_channels[] = { [PWM_CH_KBLIGHT] = { .channel = 0, diff --git a/board/kracko/board.h b/board/kracko/board.h index 78b1be8662..387680203c 100644 --- a/board/kracko/board.h +++ b/board/kracko/board.h @@ -77,7 +77,10 @@ /* TCPC */ #define CONFIG_USB_PD_PORT_MAX_COUNT 2 #define CONFIG_USB_PD_TCPM_ITE_ON_CHIP /* C0: ITE EC TCPC */ -#define CONFIG_USB_PD_TCPM_PS8705 /* C1: PS8705 TCPC*/ +#define CONFIG_USB_PD_TCPM_MULTI_PS8XXX +#define CONFIG_USB_PD_TCPM_PS8705 /* C1: PS8705 TCPC */ +#define CONFIG_USB_PD_TCPM_PS8805 /* C1: second source PS8805 TCPC */ +#define CONFIG_USB_PD_TCPM_PS8805_FORCE_DID #define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 1 #define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE #define CONFIG_USB_PD_TCPC_LOW_POWER diff --git a/board/kracko/cbi_ssfc.c b/board/kracko/cbi_ssfc.c index 81f3ee0dad..324ceffb63 100644 --- a/board/kracko/cbi_ssfc.c +++ b/board/kracko/cbi_ssfc.c @@ -34,3 +34,8 @@ enum ec_ssfc_lid_sensor get_cbi_ssfc_lid_sensor(void) { return (enum ec_ssfc_lid_sensor)cached_ssfc.lid_sensor; } + +enum ec_ssfc_tcpc_p1 get_cbi_ssfc_tcpc_p1(void) +{ + return (enum ec_ssfc_tcpc_p1)cached_ssfc.tcpc_type; +} diff --git a/board/kracko/cbi_ssfc.h b/board/kracko/cbi_ssfc.h index bf8853a43a..ad35b1a139 100644 --- a/board/kracko/cbi_ssfc.h +++ b/board/kracko/cbi_ssfc.h @@ -33,11 +33,31 @@ enum ec_ssfc_lid_sensor { SSFC_SENSOR_LIS2DWL = 3 }; +/* + * TCPC Port 1 (Bits 6-7) + */ +enum ec_ssfc_tcpc_p1 { + SSFC_TCPC_P1_DEFAULT, + SSFC_TCPC_P1_PS8705, + SSFC_TCPC_P1_PS8805, +}; + +/* + * Audio Codec Source(Bit 8-10) + */ +enum ec_ssfc_audio_codec_source { + SSFC_AUDIO_CODEC_DEFAULT = 0, + SSFC_AUDIO_CODEC_VD = 1, + SSFC_ADUIO_CODEC_VS = 2, +}; + union dedede_cbi_ssfc { struct { uint32_t base_sensor : 3; uint32_t lid_sensor : 3; - uint32_t reserved_2 : 26; + uint32_t tcpc_type : 2; + uint32_t audio_codec_source : 3; + uint32_t reserved_2 : 21; }; uint32_t raw_value; }; @@ -56,4 +76,11 @@ enum ec_ssfc_base_sensor get_cbi_ssfc_base_sensor(void); */ enum ec_ssfc_lid_sensor get_cbi_ssfc_lid_sensor(void); +/** + * Get the TCPC port 1 type from SSFC_CONFIG. + * + * @return the TCPC type. + */ +enum ec_ssfc_tcpc_p1 get_cbi_ssfc_tcpc_p1(void); + #endif /* _DEDEDE_CBI_SSFC__H_ */ diff --git a/board/marasov/generated-gpio.inc b/board/marasov/generated-gpio.inc index 59a360193e..e3a76ab142 100644 --- a/board/marasov/generated-gpio.inc +++ b/board/marasov/generated-gpio.inc @@ -50,7 +50,7 @@ GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_ODR_HIGH) GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) -GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_HIGH) +GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_LOW) GPIO(EN_PP5000_USBA_R, PIN(D, 7), GPIO_OUT_LOW) GPIO(EN_S5_RAILS, PIN(B, 6), GPIO_OUT_LOW) GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT) diff --git a/board/nocturne_fp/board_rw.c b/board/nocturne_fp/board_rw.c index 6c6de4fbae..c8bc225aa7 100644 --- a/board/nocturne_fp/board_rw.c +++ b/board/nocturne_fp/board_rw.c @@ -101,7 +101,7 @@ static void spi_configure(enum fp_sensor_spi_select spi_select) void board_init(void) { - enum fp_sensor_spi_select spi_select = get_fp_sensor_spi_select(); + enum fp_sensor_spi_select spi_select = fpsensor_detect_get_spi_select(); /* * FP_RST_ODL pin is defined in gpio_rw.inc (with GPIO_OUT_HIGH diff --git a/board/nocturne_fp/build.mk b/board/nocturne_fp/build.mk index 49d5db1582..dc99c72f85 100644 --- a/board/nocturne_fp/build.mk +++ b/board/nocturne_fp/build.mk @@ -44,6 +44,7 @@ test-list-y=\ global_initialization \ libc_printf \ libcxx \ + malloc \ mpu \ mutex \ panic \ @@ -56,6 +57,7 @@ test-list-y=\ rollback_entropy \ rsa3 \ rtc \ + sbrk \ scratchpad \ sha256 \ sha256_unrolled \ diff --git a/board/nocturne_fp/fpsensor_detect_rw.c b/board/nocturne_fp/fpsensor_detect_rw.c index d26927c187..adc2690998 100644 --- a/board/nocturne_fp/fpsensor_detect_rw.c +++ b/board/nocturne_fp/fpsensor_detect_rw.c @@ -7,12 +7,12 @@ #include "gpio.h" #include "timer.h" -enum fp_sensor_type get_fp_sensor_type(void) +enum fp_sensor_type fpsensor_detect_get_type(void) { return FP_SENSOR_TYPE_FPC; } -enum fp_sensor_spi_select get_fp_sensor_spi_select(void) +enum fp_sensor_spi_select fpsensor_detect_get_spi_select(void) { enum fp_sensor_spi_select ret; diff --git a/board/nucleo-dartmonkey/build.mk b/board/nucleo-dartmonkey/build.mk index b544490fc9..fbf78d16b7 100644 --- a/board/nucleo-dartmonkey/build.mk +++ b/board/nucleo-dartmonkey/build.mk @@ -33,6 +33,7 @@ test-list-y=\ rollback_entropy \ rsa3 \ rtc \ + sbrk \ scratchpad \ sha256 \ sha256_unrolled \ diff --git a/board/nucleo-dartmonkey/fpsensor_detect.c b/board/nucleo-dartmonkey/fpsensor_detect.c index 7a9c128211..07dee3d0cb 100644 --- a/board/nucleo-dartmonkey/fpsensor_detect.c +++ b/board/nucleo-dartmonkey/fpsensor_detect.c @@ -5,7 +5,7 @@ #include "fpsensor_detect.h" -enum fp_sensor_type get_fp_sensor_type(void) +enum fp_sensor_type fpsensor_detect_get_type(void) { return FP_SENSOR_TYPE_FPC; } diff --git a/board/nucleo-f412zg/build.mk b/board/nucleo-f412zg/build.mk index d923a7a40f..8299781a6f 100644 --- a/board/nucleo-f412zg/build.mk +++ b/board/nucleo-f412zg/build.mk @@ -30,6 +30,7 @@ test-list-y=\ rollback_entropy \ rsa3 \ rtc \ + sbrk \ scratchpad \ sha256 \ sha256_unrolled \ diff --git a/board/nucleo-h743zi/build.mk b/board/nucleo-h743zi/build.mk index ad04a68918..575a6d5da3 100644 --- a/board/nucleo-h743zi/build.mk +++ b/board/nucleo-h743zi/build.mk @@ -30,6 +30,7 @@ test-list-y=\ rollback_entropy \ rsa3 \ rtc \ + sbrk \ scratchpad \ sha256 \ sha256_unrolled \ diff --git a/board/omnigul/battery.c b/board/omnigul/battery.c index 39087f72a3..0fae9dbe56 100644 --- a/board/omnigul/battery.c +++ b/board/omnigul/battery.c @@ -42,8 +42,8 @@ const struct board_batt_params board_battery_info[] = { .manuf_name = "LGC KT0030G024", .device_name = "AP19B8M", .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, + .reg_addr = 0x3A, + .reg_data = { 0xC574, 0xC574 }, }, .fet = { .reg_addr = 0x43, @@ -72,8 +72,8 @@ const struct board_batt_params board_battery_info[] = { .fuel_gauge = { .manuf_name = "COSMX KT0030B004", .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, + .reg_addr = 0x3A, + .reg_data = { 0xC574, 0xC574 }, }, .fet = { .mfgacc_support = 1, diff --git a/chip/ish/host_command_heci.c b/chip/ish/host_command_heci.c index 3981ea5c53..fe82f94bda 100644 --- a/chip/ish/host_command_heci.c +++ b/chip/ish/host_command_heci.c @@ -43,8 +43,20 @@ struct cros_ec_ishtp_msg_hdr { } __ec_align4; #define CROS_EC_ISHTP_MSG_HDR_SIZE sizeof(struct cros_ec_ishtp_msg_hdr) + +/* + * Increase response_buffer size + * some host command response messages use bigger space; so increase + * the buffer size on par with EC, which is 256 bytes in total. + * The size has to meet + * HECI_CROS_EC_RESPONSE_BUF_SIZE >= CROS_EC_ISHTP_MSG_HDR_SIZE + 256. + * Here 260 bytes is chosen. + */ +#define HECI_CROS_EC_RESPONSE_BUF_SIZE 260 #define HECI_CROS_EC_RESPONSE_MAX \ - (HECI_IPC_PAYLOAD_SIZE - CROS_EC_ISHTP_MSG_HDR_SIZE) + (HECI_CROS_EC_RESPONSE_BUF_SIZE - CROS_EC_ISHTP_MSG_HDR_SIZE) +BUILD_ASSERT(HECI_CROS_EC_RESPONSE_BUF_SIZE >= + CROS_EC_ISHTP_MSG_HDR_SIZE + 256); struct cros_ec_ishtp_msg { struct cros_ec_ishtp_msg_hdr hdr; @@ -56,7 +68,7 @@ enum heci_cros_ec_channel { CROS_MKBP_EVENT = 2, /* initiated from EC */ }; -static uint8_t response_buffer[IPC_MAX_PAYLOAD_SIZE] __aligned(4); +static uint8_t response_buffer[HECI_CROS_EC_RESPONSE_BUF_SIZE] __aligned(4); static struct host_packet heci_packet; int heci_send_mkbp_event(uint32_t *timestamp) diff --git a/common/battery.c b/common/battery.c index 9e46cd8bbf..4a47991738 100644 --- a/common/battery.c +++ b/common/battery.c @@ -695,8 +695,12 @@ void battery_validate_params(struct batt_params *batt) * anything above the boiling point of tungsten until this bug * is fixed. If the battery is really that warm, we probably * have more urgent problems. + * TODO(b/276000336). Some batteries occasionally give obviously + * incorrect results of 591.1K and 2151K, which are 318C and 1878C. + * Ignore these for now. */ - if (batt->temperature > CELSIUS_TO_DECI_KELVIN(5660)) { + if (batt->temperature > CELSIUS_TO_DECI_KELVIN(5660) || + batt->temperature == 5911 || batt->temperature == 21510) { CPRINTS("ignoring ridiculous batt.temp of %dC", DECI_KELVIN_TO_CELSIUS(batt->temperature)); batt->flags |= BATT_FLAG_BAD_TEMPERATURE; diff --git a/common/fpsensor/fpsensor.cc b/common/fpsensor/fpsensor.cc index b0b8a72456..19b917dea0 100644 --- a/common/fpsensor/fpsensor.cc +++ b/common/fpsensor/fpsensor.cc @@ -41,11 +41,6 @@ extern "C" { /* Ready to encrypt a template. */ static timestamp_t encryption_deadline; -/* raw image offset inside the acquired frame */ -#ifndef FP_SENSOR_IMAGE_OFFSET -#define FP_SENSOR_IMAGE_OFFSET 0 -#endif - #define FP_MODE_ANY_CAPTURE \ (FP_MODE_CAPTURE | FP_MODE_ENROLL_IMAGE | FP_MODE_MATCH) #define FP_MODE_ANY_DETECT_FINGER \ @@ -240,7 +235,7 @@ extern "C" void fp_task(void) int timeout_us = -1; CPRINTS("FP_SENSOR_SEL: %s", - fp_sensor_type_to_str(get_fp_sensor_type())); + fp_sensor_type_to_str(fpsensor_detect_get_type())); #ifdef HAVE_FP_PRIVATE_DRIVER /* Reset and initialize the sensor IC */ @@ -340,9 +335,9 @@ extern "C" void fp_task(void) static enum ec_status fp_command_passthru(struct host_cmd_handler_args *args) { - const struct ec_params_fp_passthru *params = + const auto *params = static_cast<const ec_params_fp_passthru *>(args->params); - uint8_t *out = static_cast<uint8_t *>(args->response); + auto *out = static_cast<uint8_t *>(args->response); int rc; enum ec_status ret = EC_RES_SUCCESS; @@ -374,8 +369,7 @@ DECLARE_HOST_COMMAND(EC_CMD_FP_PASSTHRU, fp_command_passthru, EC_VER_MASK(0)); static enum ec_status fp_command_info(struct host_cmd_handler_args *args) { - struct ec_response_fp_info *r = - static_cast<ec_response_fp_info *>(args->response); + auto *r = static_cast<ec_response_fp_info *>(args->response); #ifdef HAVE_FP_PRIVATE_DRIVER if (fp_sensor_get_info(r) < 0) @@ -415,7 +409,7 @@ int validate_fp_buffer_offset(const uint32_t buffer_size, const uint32_t offset, static enum ec_status fp_command_frame(struct host_cmd_handler_args *args) { - const struct ec_params_fp_frame *params = + const auto *params = static_cast<const struct ec_params_fp_frame *>(args->params); void *out = args->response; uint32_t idx = FP_FRAME_GET_BUFFER_INDEX(params->offset); @@ -480,8 +474,9 @@ static enum ec_status fp_command_frame(struct host_cmd_handler_args *args) * The beginning of the buffer contains nonce, encryption_salt * and tag. */ - enc_info = (struct ec_fp_template_encryption_metadata - *)(fp_enc_buffer); + enc_info = reinterpret_cast< + struct ec_fp_template_encryption_metadata *>( + fp_enc_buffer); enc_info->struct_version = FP_TEMPLATE_FORMAT_VERSION; trng_init(); trng_rand_bytes(enc_info->nonce, FP_CONTEXT_NONCE_BYTES); @@ -538,8 +533,7 @@ DECLARE_HOST_COMMAND(EC_CMD_FP_FRAME, fp_command_frame, EC_VER_MASK(0)); static enum ec_status fp_command_stats(struct host_cmd_handler_args *args) { - struct ec_response_fp_stats *r = - static_cast<struct ec_response_fp_stats *>(args->response); + auto *r = static_cast<struct ec_response_fp_stats *>(args->response); r->capture_time_us = capture_time_us; r->matching_time_us = matching_time_us; @@ -580,10 +574,10 @@ validate_template_format(struct ec_fp_template_encryption_metadata *enc_info) static enum ec_status fp_command_template(struct host_cmd_handler_args *args) { - const struct ec_params_fp_template *params = + const auto *params = static_cast<const struct ec_params_fp_template *>(args->params); uint32_t size = params->size & ~FP_TEMPLATE_COMMIT; - int xfer_complete = params->size & FP_TEMPLATE_COMMIT; + bool xfer_complete = params->size & FP_TEMPLATE_COMMIT; uint32_t offset = params->offset; uint32_t idx = templ_valid; uint8_t key[SBP_ENC_KEY_LEN]; diff --git a/common/fpsensor/fpsensor_state.cc b/common/fpsensor/fpsensor_state.cc index e6de276cf7..e516563dc9 100644 --- a/common/fpsensor/fpsensor_state.cc +++ b/common/fpsensor/fpsensor_state.cc @@ -116,7 +116,7 @@ DECLARE_EVENT_SOURCE(EC_MKBP_EVENT_FINGERPRINT, fp_get_next_event); static enum ec_status fp_command_tpm_seed(struct host_cmd_handler_args *args) { - const struct ec_params_fp_seed *params = + const auto *params = static_cast<const ec_params_fp_seed *>(args->params); if (params->struct_version != FP_TEMPLATE_FORMAT_VERSION) { @@ -143,7 +143,7 @@ int fp_tpm_seed_is_set(void) static enum ec_status fp_command_encryption_status(struct host_cmd_handler_args *args) { - struct ec_response_fp_encryption_status *r = + auto *r = static_cast<ec_response_fp_encryption_status *>(args->response); r->valid_flags = FP_ENC_STATUS_SEED_SET; @@ -209,10 +209,8 @@ enum ec_status fp_set_sensor_mode(uint32_t mode, uint32_t *mode_output) static enum ec_status fp_command_mode(struct host_cmd_handler_args *args) { - const struct ec_params_fp_mode *p = - static_cast<const ec_params_fp_mode *>(args->params); - struct ec_response_fp_mode *r = - static_cast<ec_response_fp_mode *>(args->response); + const auto *p = static_cast<const ec_params_fp_mode *>(args->params); + auto *r = static_cast<ec_response_fp_mode *>(args->response); enum ec_status ret = fp_set_sensor_mode(p->mode, &r->mode); @@ -225,7 +223,7 @@ DECLARE_HOST_COMMAND(EC_CMD_FP_MODE, fp_command_mode, EC_VER_MASK(0)); static enum ec_status fp_command_context(struct host_cmd_handler_args *args) { - const struct ec_params_fp_context_v1 *p = + const auto *p = static_cast<const ec_params_fp_context_v1 *>(args->params); uint32_t mode_output; @@ -282,10 +280,10 @@ void fp_disable_positive_match_secret(struct positive_match_secret_state *state) static enum ec_status fp_command_read_match_secret(struct host_cmd_handler_args *args) { - const struct ec_params_fp_read_match_secret *params = + const auto *params = static_cast<const ec_params_fp_read_match_secret *>( args->params); - struct ec_response_fp_read_match_secret *response = + auto *response = static_cast<ec_response_fp_read_match_secret *>(args->response); int8_t fgr = params->fgr; timestamp_t now = get_time(); diff --git a/common/keyboard_scan.c b/common/keyboard_scan.c index a8c487c751..1568f5ae10 100644 --- a/common/keyboard_scan.c +++ b/common/keyboard_scan.c @@ -109,9 +109,6 @@ static uint8_t debounced_state[KEYBOARD_COLS_MAX]; static uint8_t debouncing[KEYBOARD_COLS_MAX]; /* Keys simulated-pressed */ static uint8_t simulated_key[KEYBOARD_COLS_MAX]; -#ifdef CONFIG_KEYBOARD_LANGUAGE_ID -static uint8_t keyboard_id[KEYBOARD_IDS]; -#endif /* Times of last scans */ static uint32_t scan_time[SCAN_TIME_COUNT]; @@ -419,38 +416,6 @@ static int read_matrix(uint8_t *state, bool at_boot) return pressed ? 1 : 0; } -#ifdef CONFIG_KEYBOARD_LANGUAGE_ID -/** - * Read the raw keyboard IDs state. - * - * Used in pre-init, so must not make task-switching-dependent calls; udelay() - * is ok because it's a spin-loop. - * - * @param id Destination for keyboard id (must be KEYBOARD_IDS long). - * - */ -static void read_matrix_id(uint8_t *id) -{ - int c; - - for (c = 0; c < KEYBOARD_IDS; c++) { - /* Select the ID pin, then wait a bit for it to settle. - * Caveat: If a keyboard maker puts ID pins right after scan - * columns, we can't support variable column size with a single - * image. */ - keyboard_raw_drive_column(KEYBOARD_COLS_MAX + c); - udelay(keyscan_config.output_settle_us); - - /* Read the row state */ - id[c] = keyboard_raw_read_rows(); - - CPRINTS("Keyboard ID%u: 0x%02x", c, id[c]); - } - - keyboard_raw_drive_column(KEYBOARD_COLUMN_NONE); -} -#endif - #ifdef CONFIG_KEYBOARD_RUNTIME_KEYS static uint8_t key_vol_up_row = KEYBOARD_DEFAULT_ROW_VOL_UP; @@ -672,11 +637,6 @@ static int check_keys_changed(uint8_t *state) } if (any_change) { -#ifdef CONFIG_KEYBOARD_SUPPRESS_NOISE - /* Suppress keyboard noise */ - keyboard_suppress_noise(); -#endif - if (print_state_changes) print_state(state, "state"); @@ -875,11 +835,6 @@ void keyboard_scan_init(void) read_adc_boot_keys(debounced_state); #endif -#ifdef CONFIG_KEYBOARD_LANGUAGE_ID - /* Check keyboard ID state */ - read_matrix_id(keyboard_id); -#endif - #ifdef CONFIG_KEYBOARD_BOOT_KEYS /* Check for keys held down at boot */ boot_key_value = check_boot_key(debounced_state); @@ -1164,26 +1119,6 @@ DECLARE_HOST_COMMAND(EC_CMD_KEYBOARD_FACTORY_TEST, keyboard_factory_test, EC_VER_MASK(0)); #endif -#ifdef CONFIG_KEYBOARD_LANGUAGE_ID -int keyboard_get_keyboard_id(void) -{ - int c; - uint32_t id = 0; - - BUILD_ASSERT(sizeof(id) >= KEYBOARD_IDS); - - for (c = 0; c < KEYBOARD_IDS; c++) { - /* Check ID ghosting if more than one bit in any KSIs was set */ - if (keyboard_id[c] & (keyboard_id[c] - 1)) - /* ID ghosting is found */ - return KEYBOARD_ID_UNREADABLE; - else - id |= keyboard_id[c] << (c * 8); - } - return id; -} -#endif - /*****************************************************************************/ /* Console commands */ #ifdef CONFIG_CMD_KEYBOARD @@ -1264,4 +1199,15 @@ __test_only void keyboard_scan_set_print_state_changes(int val) { print_state_changes = val; } + +__test_only void test_keyboard_scan_debounce_reset(void) +{ + memset(&debouncing, 0, sizeof(debouncing)); + memset(&debounced_state, 0, sizeof(debounced_state)); + memset(&scan_time, 0, sizeof(scan_time)); + memset(&scan_edge_index, 0, sizeof(scan_edge_index)); + + scan_time_index = 0; + post_scan_clock_us = 0; +} #endif /* TEST_BUILD */ diff --git a/common/mock/README.md b/common/mock/README.md index 62f53f5416..ab91f9f927 100644 --- a/common/mock/README.md +++ b/common/mock/README.md @@ -45,7 +45,7 @@ Example `.mocklist`: #define CONFIG_TEST_MOCK_LIST \ MOCK(ROLLBACK) \ - MOCK(FP_SENSOR) + MOCK(FPSENSOR) ``` If you need additional [mock control](#mock-controls) functionality, you may @@ -79,10 +79,10 @@ which resides in [include/mock](/include/mock). * When creating mock controls, consider placing all your mock parameters in one externally facing struct, like in - [fp_sensor_mock.h](/include/mock/fp_sensor_mock.h). The primary reason for + [fpsensor_mock.h](/include/mock/fpsensor_mock.h). The primary reason for this is to allow the mock to be easily used by a fuzzer (write random bytes into the struct with memcpy). * When following the above pattern, please provide a macro for resetting default values for this struct, like in - [fp_sensor_mock.h](/include/mock/fp_sensor_mock.h). This allows unit tests + [fpsensor_mock.h](/include/mock/fpsensor_mock.h). This allows unit tests to quickly reset the mock state/parameters before each unrelated unit test. diff --git a/common/mock/build.mk b/common/mock/build.mk index f2fca72328..00c4693d7f 100644 --- a/common/mock/build.mk +++ b/common/mock/build.mk @@ -7,7 +7,7 @@ mock-$(HAS_MOCK_ADC) += adc_mock.o mock-$(HAS_MOCK_BATTERY) += battery_mock.o mock-$(HAS_MOCK_CHARGE_MANAGER) += charge_manager_mock.o -mock-$(HAS_MOCK_FP_SENSOR) += fp_sensor_mock.o +mock-$(HAS_MOCK_FPSENSOR) += fpsensor_mock.o mock-$(HAS_MOCK_FPSENSOR_CRYPTO) += fpsensor_crypto_mock.o mock-$(HAS_MOCK_FPSENSOR_DETECT) += fpsensor_detect_mock.o mock-$(HAS_MOCK_FPSENSOR_STATE) += fpsensor_state_mock.o diff --git a/common/mock/fpsensor_detect_mock.c b/common/mock/fpsensor_detect_mock.c index 50f27f92bf..928c2fe6ec 100644 --- a/common/mock/fpsensor_detect_mock.c +++ b/common/mock/fpsensor_detect_mock.c @@ -12,9 +12,9 @@ struct mock_ctrl_fpsensor_detect mock_ctrl_fpsensor_detect = MOCK_CTRL_DEFAULT_FPSENSOR_DETECT; -enum fp_sensor_type get_fp_sensor_type(void) +enum fp_sensor_type fpsensor_detect_get_type(void) { - return mock_ctrl_fpsensor_detect.get_fp_sensor_type_return; + return mock_ctrl_fpsensor_detect.fpsensor_detect_get_type_return; } enum fp_transport_type get_fp_transport_type(void) @@ -22,7 +22,7 @@ enum fp_transport_type get_fp_transport_type(void) return mock_ctrl_fpsensor_detect.get_fp_transport_type_return; } -enum fp_sensor_spi_select get_fp_sensor_spi_select(void) +enum fp_sensor_spi_select fpsensor_detect_get_spi_select(void) { return mock_ctrl_fpsensor_detect.get_fp_sensor_spi_select_return; } diff --git a/common/mock/fp_sensor_mock.c b/common/mock/fpsensor_mock.c index 57a4f42ae9..8540d30f1c 100644 --- a/common/mock/fp_sensor_mock.c +++ b/common/mock/fpsensor_mock.c @@ -10,7 +10,7 @@ #include "common.h" #include "fpsensor.h" -#include "mock/fp_sensor_mock.h" +#include "mock/fpsensor_mock.h" #include <stdlib.h> diff --git a/common/rollback.c b/common/rollback.c index 20dcbe4aa9..e530397af1 100644 --- a/common/rollback.c +++ b/common/rollback.c @@ -45,42 +45,28 @@ static int get_rollback_offset(int region) #endif } -#ifdef SECTION_IS_RO -static int get_rollback_erase_size_bytes(int region) -{ - int erase_size; - -#ifndef CONFIG_FLASH_MULTIPLE_REGION - erase_size = CONFIG_FLASH_ERASE_SIZE; -#else - int rollback_start_bank = crec_flash_bank_index(CONFIG_ROLLBACK_OFF); - - erase_size = crec_flash_bank_erase_size(rollback_start_bank + region); -#endif - ASSERT(erase_size > 0); - ASSERT(ROLLBACK_REGIONS * erase_size <= CONFIG_ROLLBACK_SIZE); - ASSERT(sizeof(struct rollback_data) <= erase_size); - return erase_size; -} -#endif - /* * When MPU is available, read rollback with interrupts disabled, to minimize * time protection is left open. */ -static void lock_rollback(void) +static void lock_rollback(uint32_t key) { #ifdef CONFIG_ROLLBACK_MPU_PROTECT mpu_lock_rollback(1); - interrupt_enable(); + irq_unlock(key); #endif } -static void unlock_rollback(void) +static uint32_t unlock_rollback(void) { #ifdef CONFIG_ROLLBACK_MPU_PROTECT - interrupt_disable(); + uint32_t key; + + key = irq_lock(); mpu_lock_rollback(0); + return key; +#else + return 0; #endif } @@ -95,13 +81,14 @@ int read_rollback(int region, struct rollback_data *data) { int offset; int ret = EC_SUCCESS; + uint32_t key; offset = get_rollback_offset(region); - unlock_rollback(); + key = unlock_rollback(); if (crec_flash_read(offset, sizeof(*data), (char *)data)) ret = EC_ERROR_UNKNOWN; - lock_rollback(); + lock_rollback(key); return ret; } @@ -187,6 +174,22 @@ failed: #endif #ifdef CONFIG_ROLLBACK_UPDATE +static int get_rollback_erase_size_bytes(int region) +{ + int erase_size; + +#ifndef CONFIG_FLASH_MULTIPLE_REGION + erase_size = CONFIG_FLASH_ERASE_SIZE; +#else + int rollback_start_bank = crec_flash_bank_index(CONFIG_ROLLBACK_OFF); + + erase_size = crec_flash_bank_erase_size(rollback_start_bank + region); +#endif + ASSERT(erase_size > 0); + ASSERT(ROLLBACK_REGIONS * erase_size <= CONFIG_ROLLBACK_SIZE); + ASSERT(sizeof(struct rollback_data) <= erase_size); + return erase_size; +} #ifdef CONFIG_ROLLBACK_SECRET_SIZE static int add_entropy(uint8_t *dst, const uint8_t *src, const uint8_t *add, @@ -254,6 +257,7 @@ static int rollback_update(int32_t next_min_version, const uint8_t *entropy, struct rollback_data *data = (struct rollback_data *)block; BUILD_ASSERT(sizeof(block) >= sizeof(*data)); int erase_size, offset, region, ret; + uint32_t key; if (crec_flash_get_protect() & EC_FLASH_PROTECT_ROLLBACK_NOW) { ret = EC_ERROR_ACCESS_DENIED; @@ -325,15 +329,15 @@ static int rollback_update(int32_t next_min_version, const uint8_t *entropy, goto out; } - unlock_rollback(); + key = unlock_rollback(); if (crec_flash_erase(offset, erase_size)) { ret = EC_ERROR_UNKNOWN; - lock_rollback(); + lock_rollback(key); goto out; } ret = crec_flash_write(offset, sizeof(block), block); - lock_rollback(); + lock_rollback(key); out: clear_rollback(data); diff --git a/common/system.c b/common/system.c index c7b7ed39d6..f598fb36c9 100644 --- a/common/system.c +++ b/common/system.c @@ -1658,21 +1658,6 @@ DECLARE_HOST_COMMAND(EC_CMD_SET_SKU_ID, host_command_set_sku_id, EC_VER_MASK(0)); #endif -#ifdef CONFIG_KEYBOARD_LANGUAGE_ID -static enum ec_status -host_command_get_keyboard_id(struct host_cmd_handler_args *args) -{ - struct ec_response_keyboard_id *r = args->response; - - r->keyboard_id = keyboard_get_keyboard_id(); - args->response_size = sizeof(*r); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_GET_KEYBOARD_ID, host_command_get_keyboard_id, - EC_VER_MASK(0)); -#endif - static enum ec_status host_command_build_info(struct host_cmd_handler_args *args) { diff --git a/common/usbc/usb_pe_drp_sm.c b/common/usbc/usb_pe_drp_sm.c index 0264837057..767fed302b 100644 --- a/common/usbc/usb_pe_drp_sm.c +++ b/common/usbc/usb_pe_drp_sm.c @@ -4137,6 +4137,8 @@ static void pe_send_soft_reset_entry(int port) { print_current_state(port); + PE_CLR_FLAG(port, PE_FLAGS_ENTERING_EPR); + /* Reset Protocol Layer (softly) */ prl_reset_soft(port); @@ -6965,7 +6967,11 @@ static void pe_vcs_turn_off_vconn_swap_run(int port) pe[port].discover_identity_counter = 0; pe[port].dr_swap_attempt_counter = 0; - pe_set_ready_state(port); + if (PE_CHK_FLAG(port, PE_FLAGS_ENTERING_EPR)) + set_state_pe(port, + PE_SNK_EPR_MODE_ENTRY_WAIT_FOR_RESPONSE); + else + pe_set_ready_state(port); return; } } @@ -7906,6 +7912,7 @@ static void pe_ddr_perform_data_reset_exit(int port) #ifdef CONFIG_USB_PD_EPR static void pe_enter_epr_mode(int port) { + PE_CLR_FLAG(port, PE_FLAGS_ENTERING_EPR); PE_SET_FLAG(port, PE_FLAGS_IN_EPR); CPRINTS("C%d: Entered EPR", port); } @@ -7984,6 +7991,8 @@ static void pe_snk_send_epr_mode_entry_entry(int port) print_current_state(port); + PE_SET_FLAG(port, PE_FLAGS_ENTERING_EPR); + /* Send EPR mode entry message */ eprmdo->action = PD_EPRMDO_ACTION_ENTER; eprmdo->data = 0; /* EPR Sink Operational PDP */ @@ -8004,6 +8013,7 @@ static void pe_snk_send_epr_mode_entry_run(int port) msg_check = pe_sender_response_msg_run(port); if (msg_check & PE_MSG_DISCARDED) { + PE_CLR_FLAG(port, PE_FLAGS_ENTERING_EPR); set_state_pe(port, PE_SNK_READY); return; } @@ -8072,11 +8082,16 @@ static void pe_snk_epr_mode_entry_wait_for_response_run(int port) return; } else if (eprmdo->action == PD_EPRMDO_ACTION_ENTER_FAILED) { + PE_CLR_FLAG(port, PE_FLAGS_ENTERING_EPR); /* Table 6-50 EPR Mode Data Object */ CPRINTS("C%d: Failed to enter EPR for 0x%x", port, eprmdo->data); } /* Fall through to soft reset. */ + } else if ((ext == 0) && (cnt == 0) && + (type == PD_CTRL_VCONN_SWAP)) { + set_state_pe(port, PE_VCS_EVALUATE_SWAP); + return; } /* * 6.4.10.1 Process to enter EPR Mode diff --git a/common/usbc/usb_pe_private.h b/common/usbc/usb_pe_private.h index a3979c1821..5eafb7befd 100644 --- a/common/usbc/usb_pe_private.h +++ b/common/usbc/usb_pe_private.h @@ -84,6 +84,12 @@ enum { PE_FLAGS_DATA_RESET_COMPLETE_FN, /* Waiting for SRC to SNK settle time */ PE_FLAGS_SRC_SNK_SETTLE_FN, + /* + * Indicates the port is in the process of entering EPR mode. For a + * sink, the SM is in and after PE_SNK_EPR_Mode_Entry. For a source, + * the SM is in and after PE_SRC_EPR_Mode_Entery_ACK. + */ + PE_FLAGS_ENTERING_EPR_FN, /* In EPR mode */ PE_FLAGS_IN_EPR_FN, /* Discovery disabled due to UFP/PD 2.0 constraint. */ diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S index b370d1acf0..d41a6ff86f 100644 --- a/core/cortex-m/ec.lds.S +++ b/core/cortex-m/ec.lds.S @@ -500,12 +500,6 @@ SECTIONS __data_end = .; /* - * _sbrk in newlib expects "end" symbol to point to start of - * free memory. - */ - end = .; - - /* * Shared memory buffer must be at the end of preallocated * RAM, so it can expand to use all the remaining RAM. */ diff --git a/core/cortex-m0/ec.lds.S b/core/cortex-m0/ec.lds.S index c59973ebff..3721fbcce2 100644 --- a/core/cortex-m0/ec.lds.S +++ b/core/cortex-m0/ec.lds.S @@ -301,12 +301,6 @@ SECTIONS __data_end = .; /* - * _sbrk in newlib expects "end" symbol to point to start of - * free memory. - */ - end = .; - - /* * Shared memory buffer must be at the end of preallocated * RAM, so it can expand to use all the remaining RAM. */ diff --git a/core/minute-ia/ec.lds.S b/core/minute-ia/ec.lds.S index 81668fecc7..e396b0e097 100644 --- a/core/minute-ia/ec.lds.S +++ b/core/minute-ia/ec.lds.S @@ -226,12 +226,6 @@ SECTIONS __bss_end = .; __bss_size_words = ABSOLUTE((__bss_end - __bss_start) / 4); - /* - * _sbrk in newlib expects "end" symbol to point to start of - * free memory. - */ - end = .; - /* * Shared memory buffer must be at the end of * preallocated RAM, so it can expand to use all the diff --git a/core/nds32/ec.lds.S b/core/nds32/ec.lds.S index b97af1a679..7d77afbc36 100644 --- a/core/nds32/ec.lds.S +++ b/core/nds32/ec.lds.S @@ -273,12 +273,6 @@ SECTIONS __bss_end = .; /* - * _sbrk in newlib expects "end" symbol to point to start of - * free memory. - */ - end = .; - - /* * Shared memory buffer must be at the end of preallocated RAM, * so it can expand to use all the remaining RAM. */ diff --git a/core/riscv-rv32i/ec.lds.S b/core/riscv-rv32i/ec.lds.S index 015ed12548..5617f9786f 100644 --- a/core/riscv-rv32i/ec.lds.S +++ b/core/riscv-rv32i/ec.lds.S @@ -344,12 +344,6 @@ SECTIONS __bss_end = .; /* - * _sbrk in newlib expects "end" symbol to point to start of - * free memory. - */ - end = .; - - /* * Shared memory buffer must be at the end of preallocated RAM, * so it can expand to use all the remaining RAM. */ diff --git a/docs/fingerprint/fingerprint-debugging.md b/docs/fingerprint/fingerprint-debugging.md index 6d91d6ade0..b015eb1199 100644 --- a/docs/fingerprint/fingerprint-debugging.md +++ b/docs/fingerprint/fingerprint-debugging.md @@ -77,15 +77,15 @@ Dragonclaw v0.3 with 10-pin SWD (0.05" / 1.27mm) on J4. | ------------------------------------------------------- | ![Dragonclaw with 10-pin SWD] | -### Icetower v0.1 +### Icetower v3 -The connector for SWD is `J4` on Icetower v0.1. +The connector for SWD is labeled with `CORESIGHT20 DB CONN` on Icetower v3. -`SW2` on Icetower must be set to `CORESIGHT` (not `SERVO`). +`JTAG` on Icetower must be set to `CORESIGHT` (not `SERVO`). -Icetower v0.1 with 20-pin SWD (0.05" / 1.27mm) on J4. | ------------------------------------------------------ | -![Icetower with 20-pin SWD] | +Icetower v3 with 20-pin SWD (0.05" / 1.27mm) on `CORESIGHT20 DB CONN`. | +---------------------------------------------------------------------- | +![Icetower with 20-pin SWD] | ## Powering the Board {#power} diff --git a/docs/fingerprint/fingerprint-dev-for-partners.md b/docs/fingerprint/fingerprint-dev-for-partners.md index aafa5e0731..f2fe8fd34b 100644 --- a/docs/fingerprint/fingerprint-dev-for-partners.md +++ b/docs/fingerprint/fingerprint-dev-for-partners.md @@ -48,9 +48,9 @@ Download the [Dragonclaw schematics, layout, and BOM][dragonclaw schematics]. *** <!-- mdformat on --> -This FPMCU board is Icetower Rev 0.1. | -------------------------------------- | -![Icetower board] | +This FPMCU board is Icetower Rev 3. | +----------------------------------- | +![Icetower board] | <!-- mdformat off(b/139308852) --> *** note @@ -69,7 +69,7 @@ debug a running program. There are several variants of Servo and the fingerprint team uses the [Servo Micro](#servo-micro) for its simplicity. It lacks builtin JTAG/SWD -support for single step debugging, but Dragonclaw v0.3 and Icetower v0.1 have an +support for single step debugging, but Dragonclaw v0.3 and Icetower v3 have an [SWD connector](#servo-micro-swd) that can be used. [Servo Micro](#servo-micro) | @@ -598,7 +598,7 @@ Make sure that this interface is disabled: [Servo Micro with Dragonclaw]: ../images/servomicro_dragonclaw.jpg [Dragonclaw board]: ../images/dragonclaw_v0.3.jpg [Dragonclaw servo fix diagram]: ../images/dragonclaw_servo_fix.jpg -[Icetower board]: ../images/icetower_v0.1.jpg +[Icetower board]: ../images/icetower_v3.jpg <!-- If you make changes to the docs below make sure to regenerate the JPEGs by appending "export/pdf" to the Google Drive link. --> diff --git a/docs/fingerprint/fingerprint.md b/docs/fingerprint/fingerprint.md index a05f33059a..0edd7a35cd 100644 --- a/docs/fingerprint/fingerprint.md +++ b/docs/fingerprint/fingerprint.md @@ -28,10 +28,10 @@ The main source code for fingerprint sensor functionality lives in the The following "boards" (specified by the `BOARD` environment variable when building the EC code) are for fingerprint: -MCU | Sensor | Firmware (EC "board") | Dev Board | Nucleo Board ------------------------- | ---------- | ---------------------------------------------- | -------------------------------------------- | ------------ -[STM32H743] \(Cortex-M7) | [FPC 1145] | `dartmonkey`<br>(aka `nocturne_fp`, `nami_fp`) | [Icetower v0.2] <br>(Previously Dragontalon) | [Nucleo H743ZI2] -[STM32F412] \(Cortex-M4) | [FPC 1025] | `bloonchipper`<br>(aka `hatch_fp`) | [Dragonclaw v0.3] | [Nucleo F412ZG] +MCU | Sensor | Firmware (EC "board") | Dev Board | Nucleo Board +------------------------ | ---------- | ---------------------------------------------- | ------------------------------------------ | ------------ +[STM32H743] \(Cortex-M7) | [FPC 1145] | `dartmonkey`<br>(aka `nocturne_fp`, `nami_fp`) | [Icetower v3] <br>(Previously Dragontalon) | [Nucleo H743ZI2] +[STM32F412] \(Cortex-M4) | [FPC 1025] | `bloonchipper`<br>(aka `hatch_fp`) | [Dragonclaw v0.3] | [Nucleo F412ZG] RAM and Flash details for each board are in the [Fingerprint MCU RAM and Flash] document. @@ -368,7 +368,7 @@ disconnected.* @@ pp3300_dx_mcu_mw 488 1.57 0.59 9.73 1.31 ``` -### Icetower v0.1 +### Icetower v3 <!-- mdformat off(b/139308852) --> *** note @@ -593,7 +593,7 @@ that are connected via UART use [`cros_ec_uart.c`]. [FPC 1145 Template Size]: https://chromium.googlesource.com/chromiumos/platform/ec/+/127521b109be8aac352e80e319e46ed123360408/driver/fingerprint/fpc/libfp/fpc1145_private.h#46 [FPC 1025 Template Size]: https://chromium.googlesource.com/chromiumos/platform/ec/+/127521b109be8aac352e80e319e46ed123360408/driver/fingerprint/fpc/bep/fpc1025_private.h#44 [Dragonclaw v0.3]: ./fingerprint-dev-for-partners.md#fpmcu-dev-board -[Icetower v0.2]: ./fingerprint-dev-for-partners.md#fpmcu-dev-board +[Icetower v3]: ./fingerprint-dev-for-partners.md#fpmcu-dev-board [Nucleo F412ZG]: https://www.digikey.com/en/products/detail/stmicroelectronics/NUCLEO-F412ZG/6137573 [Nucleo H743ZI2]: https://www.digikey.com/en/products/detail/stmicroelectronics/NUCLEO-H743ZI2/10130892 [CBI Info]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md diff --git a/docs/images/icetower_v3.jpg b/docs/images/icetower_v3.jpg Binary files differnew file mode 100644 index 0000000000..e3a1aaa638 --- /dev/null +++ b/docs/images/icetower_v3.jpg diff --git a/docs/images/icetower_with_20_pin_swd.jpg b/docs/images/icetower_with_20_pin_swd.jpg Binary files differindex dcaa0ad731..a7261e6fb9 100644 --- a/docs/images/icetower_with_20_pin_swd.jpg +++ b/docs/images/icetower_with_20_pin_swd.jpg diff --git a/docs/zephyr/zephyr_troubleshooting.md b/docs/zephyr/zephyr_troubleshooting.md index 552f22eac1..aa6980a9d5 100644 --- a/docs/zephyr/zephyr_troubleshooting.md +++ b/docs/zephyr/zephyr_troubleshooting.md @@ -149,7 +149,13 @@ object files, this is useful to inspect the macro output. To do that use the `zmake` flag: ``` -zmake build $PROJECT --extra-cflags=-save-temps=obj +zmake build --save-temps $PROJECT +``` + +or for unit tests: + +``` +./twister -x=CONFIG_COMPILER_SAVE_TEMPS=y ``` This leaves a bunch of `.i` files in the build/ directory. @@ -184,3 +190,38 @@ $3 = 0x100ba480 "tach@400e1000" ``` If the symbol has been optimized, try rebuilding with `CONFIG_LTO=n`. + + +## Using GDB for debugging unit tests + +Unit tests running on `native_posix` produce an executable file that can be +rebuilt directly with ninja to save time, and run with GDB to help out +debugging. This can be found after a twister run in the `twister-out` +directory. For example: + +``` +$ ./twister -v -T zephyr/test/hooks +... +INFO - 1/1 native_posix hooks.default PASSED (native 0.042s) +... + +# Modify the test code + +$ ninja -C twister-out/native_posix/hooks.default +... +[7/7] Linking C executable zephyr/zephyr.elf + +$ ./twister-out/native_posix/hooks.default/zephyr/zephyr.elf +... +PROJECT EXECUTION SUCCESSFUL + +$ gdb ./twister-out/native_posix/hooks.default/zephyr/zephyr.elf +Reading symbols from ./twister-out/native_posix/hooks.default/zephyr/zephyr.elf... +(gdb) b main +Breakpoint 1 at 0x80568a9: file boards/posix/native_posix/main.c, line 112. +(gdb) run +Starting program: /mnt/host/source/src/platform/ec/twister-out/native_posix/hooks.default/zephyr/zephyr.elf +Breakpoint 1, main (argc=-17520, argv=0xffffbc24) at boards/posix/native_posix/main.c:112 +112 posix_init(argc, argv); +... +``` diff --git a/driver/accel_bma4xx.c b/driver/accel_bma4xx.c index 4120f726c3..3d6c7caa12 100644 --- a/driver/accel_bma4xx.c +++ b/driver/accel_bma4xx.c @@ -23,12 +23,6 @@ #include <motion_sense_fifo.h> -/* - * TODO(b/272518464): Work around coreboot GCC preprocessor bug. - * #line marks the *next* line, so it is off by one. - */ -#line 31 - #ifdef CONFIG_ACCEL_BMA4XX_INT_EVENT #define BMA4XX_USE_INTERRUPTS #endif diff --git a/driver/accelgyro_icm42607.c b/driver/accelgyro_icm42607.c index e0ed5b0d9d..48518fa315 100644 --- a/driver/accelgyro_icm42607.c +++ b/driver/accelgyro_icm42607.c @@ -1125,6 +1125,15 @@ static int icm42607_init_config(const struct motion_sensor_t *s) if (ret) return ret; +#ifdef CONFIG_ACCELGYRO_ICM_COMM_SPI + /* Device operation in shared spi bus configuration */ + mask = 0x03; + val = 0x03; + ret = icm_field_update8(s, ICM42607_REG_INTF_CONFIG0, mask, val); + if (ret) + return ret; +#endif + /* disable i3c support */ mask = ICM42607_I3C_SDR_EN | ICM42607_I3C_DDR_EN; ret = icm_field_update8(s, ICM42607_REG_INTF_CONFIG1, mask, 0); diff --git a/driver/battery/smart.c b/driver/battery/smart.c index aac76ace74..b68e037133 100644 --- a/driver/battery/smart.c +++ b/driver/battery/smart.c @@ -684,89 +684,6 @@ DECLARE_CONSOLE_COMMAND(battmfgacc, command_batt_mfg_access_read, "Read battery manufacture access data"); #endif /* CONFIG_CMD_BATT_MFG_ACCESS */ -/*****************************************************************************/ -/* Smart battery pass-through - */ -#ifdef CONFIG_SB_PASSTHROUGH -static enum ec_status -host_command_sb_read_word(struct host_cmd_handler_args *args) -{ - int rv; - int val; - const struct ec_params_sb_rd *p = args->params; - struct ec_response_sb_rd_word *r = args->response; - - if (p->reg > 0x1c) - return EC_RES_INVALID_PARAM; - rv = sb_read(p->reg, &val); - if (rv) - if (rv == EC_ERROR_ACCESS_DENIED) - return EC_RES_ACCESS_DENIED; - else - return EC_RES_ERROR; - - r->value = val; - args->response_size = sizeof(struct ec_response_sb_rd_word); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_SB_READ_WORD, host_command_sb_read_word, - EC_VER_MASK(0)); - -static enum ec_status -host_command_sb_write_word(struct host_cmd_handler_args *args) -{ - int rv; - const struct ec_params_sb_wr_word *p = args->params; - - if (p->reg > 0x1c) - return EC_RES_INVALID_PARAM; - rv = sb_write(p->reg, p->value); - if (rv) - if (rv == EC_ERROR_ACCESS_DENIED) - return EC_RES_ACCESS_DENIED; - else - return EC_RES_ERROR; - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_SB_WRITE_WORD, host_command_sb_write_word, - EC_VER_MASK(0)); - -static enum ec_status -host_command_sb_read_block(struct host_cmd_handler_args *args) -{ - int rv; - const struct ec_params_sb_rd *p = args->params; - struct ec_response_sb_rd_block *r = args->response; - - if ((p->reg != SB_MANUFACTURER_NAME) && (p->reg != SB_DEVICE_NAME) && - (p->reg != SB_DEVICE_CHEMISTRY) && (p->reg != SB_MANUFACTURER_DATA)) - return EC_RES_INVALID_PARAM; - rv = sb_read_string(p->reg, r->data, 32); - if (rv) - if (rv == EC_ERROR_ACCESS_DENIED) - return EC_RES_ACCESS_DENIED; - else - return EC_RES_ERROR; - - args->response_size = sizeof(struct ec_response_sb_rd_block); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_SB_READ_BLOCK, host_command_sb_read_block, - EC_VER_MASK(0)); - -static enum ec_status -host_command_sb_write_block(struct host_cmd_handler_args *args) -{ - /* Not implemented */ - return EC_RES_INVALID_COMMAND; -} -DECLARE_HOST_COMMAND(EC_CMD_SB_WRITE_BLOCK, host_command_sb_write_block, - EC_VER_MASK(0)); -#endif - #ifdef CONFIG_CMD_I2C_STRESS_TEST_BATTERY test_mockable int sb_i2c_test_read(int cmd, int *param) { diff --git a/driver/charger/isl9241.c b/driver/charger/isl9241.c index f1273fe43d..5f3566095c 100644 --- a/driver/charger/isl9241.c +++ b/driver/charger/isl9241.c @@ -179,7 +179,7 @@ static enum ec_error_list isl9241_set_frequency(int chgnum, int freq_khz) freq = ISL9241_CONTROL1_SWITCHING_FREQ_808KHZ; else if (freq_khz >= 690) freq = ISL9241_CONTROL1_SWITCHING_FREQ_724KHZ; - else if (freq_khz >= 678) + else if (freq_khz >= 628) freq = ISL9241_CONTROL1_SWITCHING_FREQ_656KHZ; else freq = ISL9241_CONTROL1_SWITCHING_FREQ_600KHZ; @@ -703,6 +703,7 @@ static void isl9241_dump_prochot_status(int chgnum) } #endif +#ifdef CONFIG_CHARGER_BYPASS_MODE static bool isl9241_is_ac_present(int chgnum) { static bool ac_is_present; @@ -1074,6 +1075,7 @@ static enum ec_error_list isl9241_enable_bypass_mode(int chgnum, bool enable) return rv; } +#endif /* CONFIG_CHARGER_BYPASS_MODE */ /*****************************************************************************/ /* ISL-9241 initialization */ @@ -1288,7 +1290,9 @@ const struct charger_drv isl9241_drv = { .ramp_is_detected = &isl9241_ramp_is_detected, .ramp_get_current_limit = &isl9241_ramp_get_current_limit, #endif +#ifdef CONFIG_CHARGER_BYPASS_MODE .enable_bypass_mode = isl9241_enable_bypass_mode, +#endif #ifdef CONFIG_CMD_CHARGER_DUMP .dump_registers = &command_isl9241_dump, #endif diff --git a/driver/fingerprint/elan/elan_sensor.h b/driver/fingerprint/elan/elan_sensor.h index d7b9de70a7..010d36a14c 100644 --- a/driver/fingerprint/elan/elan_sensor.h +++ b/driver/fingerprint/elan/elan_sensor.h @@ -7,6 +7,7 @@ #define CROS_EC_DRIVER_FINGERPRINT_ELAN_ELAN_SENSOR_H #include "common.h" #include "ec_commands.h" +#include "fpsensor_types.h" /* Sensor pixel resolution */ #if defined(CONFIG_FP_SENSOR_ELAN80) @@ -31,6 +32,7 @@ #define FP_MAX_FINGER_COUNT_ELAN 3 #endif +#define FP_SENSOR_IMAGE_OFFSET_ELAN (0) #define FP_SENSOR_RES_BPP_ELAN (8) /** diff --git a/driver/fingerprint/fpsensor_driver.h b/driver/fingerprint/fpsensor_driver.h index d57ea355e4..e5cdc78d3d 100644 --- a/driver/fingerprint/fpsensor_driver.h +++ b/driver/fingerprint/fpsensor_driver.h @@ -10,6 +10,7 @@ #define HAVE_FP_PRIVATE_DRIVER #if defined(CONFIG_FP_SENSOR_ELAN80) || defined(CONFIG_FP_SENSOR_ELAN515) #include "elan/elan_sensor.h" +#define FP_SENSOR_IMAGE_OFFSET (FP_SENSOR_IMAGE_OFFSET_ELAN) #define FP_SENSOR_IMAGE_SIZE (FP_SENSOR_IMAGE_SIZE_ELAN) #define FP_SENSOR_RES_X (FP_SENSOR_RES_X_ELAN) #define FP_SENSOR_RES_Y (FP_SENSOR_RES_Y_ELAN) @@ -17,6 +18,7 @@ #define FP_MAX_FINGER_COUNT (FP_MAX_FINGER_COUNT_ELAN) #else #include "fpc/fpc_sensor.h" +#define FP_SENSOR_IMAGE_OFFSET (FP_SENSOR_IMAGE_OFFSET_FPC) #define FP_SENSOR_IMAGE_SIZE (FP_SENSOR_IMAGE_SIZE_FPC) #define FP_SENSOR_RES_X (FP_SENSOR_RES_X_FPC) #define FP_SENSOR_RES_Y (FP_SENSOR_RES_Y_FPC) @@ -25,6 +27,7 @@ #endif #else /* These values are used by the host (emulator) tests. */ +#define FP_SENSOR_IMAGE_OFFSET (0) #define FP_SENSOR_IMAGE_SIZE 0 #define FP_SENSOR_RES_X 0 #define FP_SENSOR_RES_Y 0 @@ -35,9 +38,13 @@ #if defined(HAVE_PRIVATE) && defined(TEST_BUILD) /* * For unittest in a private build, enable driver-related code in - * common/fpsensor/ so that they can be tested (with fp_sensor_mock). + * common/fpsensor/ so that they can be tested (with fpsensor_mock). */ #define HAVE_FP_PRIVATE_DRIVER #endif +#if !defined(FP_SENSOR_IMAGE_OFFSET) && defined(TEST_BUILD) +#define FP_SENSOR_IMAGE_OFFSET (0) +#endif + #endif /* __CROS_EC_DRIVER_FINGERPRINT_FPSENSOR_DRIVER_H_ */ diff --git a/driver/ppc/nx20p348x.c b/driver/ppc/nx20p348x.c index 14dfb88e02..cb35e9ff23 100644 --- a/driver/ppc/nx20p348x.c +++ b/driver/ppc/nx20p348x.c @@ -311,6 +311,7 @@ static int nx20p348x_init(int port) /* Mask interrupts for interrupt 1 register */ mask = ~(NX20P348X_INT1_OC_5VSRC | NX20P348X_INT1_SC_5VSRC | NX20P348X_INT1_RCP_5VSRC | NX20P348X_INT1_DBEXIT_ERR); + mask &= ~NX20P3481_INT1_RESERVED; if (IS_ENABLED(CONFIG_USBC_PPC_NX20P3481)) { /* Unmask Fast Role Swap detect interrupt */ mask &= ~NX20P3481_INT1_FRS_DET; @@ -409,7 +410,7 @@ static void nx20p348x_handle_interrupt(int port) NX20P348X_DB_EXIT_FAIL_THRESHOLD) { ppc_prints("failed to exit DB mode", port); if (read_reg(port, NX20P348X_INTERRUPT1_MASK_REG, - &mask_reg)) { + &mask_reg) == 0) { mask_reg |= NX20P348X_INT1_DBEXIT_ERR; write_reg(port, NX20P348X_INTERRUPT1_MASK_REG, mask_reg); @@ -501,7 +502,6 @@ static int nx20p348x_dump(int port) int reg; int rv; - ccprintf("Port %d NX20P348X registers\n", port); for (reg_addr = NX20P348X_DEVICE_ID_REG; reg_addr <= NX20P348X_DEVICE_CONTROL_REG; reg_addr++) { rv = read_reg(port, reg_addr, ®); diff --git a/driver/ppc/nx20p348x.h b/driver/ppc/nx20p348x.h index 94e7a8d06e..9bab7298be 100644 --- a/driver/ppc/nx20p348x.h +++ b/driver/ppc/nx20p348x.h @@ -96,6 +96,7 @@ /* Interrupt 1 Register Bits (0x04) */ #define NX20P348X_INT1_DBEXIT_ERR BIT(7) #define NX20P3481_INT1_FRS_DET BIT(6) +#define NX20P3481_INT1_RESERVED BIT(5) #define NX20P348X_INT1_OV_5VSRC BIT(4) #define NX20P348X_INT1_RCP_5VSRC BIT(3) #define NX20P348X_INT1_SC_5VSRC BIT(2) diff --git a/driver/ppc/rt1739.c b/driver/ppc/rt1739.c index 7c70c18975..edb54bb73c 100644 --- a/driver/ppc/rt1739.c +++ b/driver/ppc/rt1739.c @@ -486,7 +486,7 @@ void rt1739_interrupt(int port) void rt1739_pd_connect(void) { for (int i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; ++i) { - if (ppc_chips[i].drv == &rt1739_ppc_drv) + if (ppc_chips[i].drv == &rt1739_ppc_drv && pd_is_connected(i)) update_reg(i, RT1739_REG_SBU_CTRL_01, RT1739_DM_SWEN | RT1739_DP_SWEN | RT1739_SBU1_SWEN | RT1739_SBU2_SWEN, @@ -498,7 +498,8 @@ DECLARE_HOOK(HOOK_USB_PD_CONNECT, rt1739_pd_connect, HOOK_PRIO_DEFAULT); void rt1739_pd_disconnect(void) { for (int i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; ++i) { - if (ppc_chips[i].drv == &rt1739_ppc_drv) + if (ppc_chips[i].drv == &rt1739_ppc_drv && + pd_is_disconnected(i)) update_reg(i, RT1739_REG_SBU_CTRL_01, RT1739_DM_SWEN | RT1739_DP_SWEN | RT1739_SBU1_SWEN | RT1739_SBU2_SWEN, diff --git a/driver/tcpm/rt1718s.h b/driver/tcpm/rt1718s.h index 8ff977e26b..76bbfd48a8 100644 --- a/driver/tcpm/rt1718s.h +++ b/driver/tcpm/rt1718s.h @@ -110,6 +110,8 @@ #define RT1718S_UNLOCK_PW_2 0xF0 #define RT1718S_UNLOCK_PW_1 0xF1 +#define RT1718S_RT2 0xF2 + #define RT1718S_RT2_SYS_CTRL5 0xF210 #define RT1718S_VBUS_VOL_TO_REG(_vol) (CLAMP(_vol, 5, 20) - 5) diff --git a/extra/ftdi_hostcmd/test_cmds.c b/extra/ftdi_hostcmd/test_cmds.c index e8ed1aff70..4c03bcc264 100644 --- a/extra/ftdi_hostcmd/test_cmds.c +++ b/extra/ftdi_hostcmd/test_cmds.c @@ -456,10 +456,6 @@ static struct lookup cmd_table[] = { { 0xa0, "EC_CMD_CHARGE_STATE" }, { 0xa1, "EC_CMD_CHARGE_CURRENT_LIMIT" }, { 0xa2, "EC_CMD_EXT_POWER_CURRENT_LIMIT" }, - { 0xb0, "EC_CMD_SB_READ_WORD" }, - { 0xb1, "EC_CMD_SB_WRITE_WORD" }, - { 0xb2, "EC_CMD_SB_READ_BLOCK" }, - { 0xb3, "EC_CMD_SB_WRITE_BLOCK" }, { 0xb4, "EC_CMD_BATTERY_VENDOR_PARAM" }, { 0xb5, "EC_CMD_SB_FW_UPDATE" }, { 0xd2, "EC_CMD_REBOOT_EC" }, diff --git a/fuzz/host_command_fuzz.mocklist b/fuzz/host_command_fuzz.mocklist index 3b7d03ee0e..9dc068bce7 100644 --- a/fuzz/host_command_fuzz.mocklist +++ b/fuzz/host_command_fuzz.mocklist @@ -4,7 +4,7 @@ */ #define CONFIG_TEST_MOCK_LIST \ - MOCK(FP_SENSOR) \ + MOCK(FPSENSOR) \ MOCK(FPSENSOR_DETECT) \ MOCK(MKBP_EVENTS) \ MOCK(ROLLBACK) diff --git a/include/chipset.h b/include/chipset.h index 2ec7d3b059..c5ba6ffd6f 100644 --- a/include/chipset.h +++ b/include/chipset.h @@ -10,12 +10,6 @@ * all main chipsets (x86, gaia, etc.). */ -/* - * TODO(b/272518464): Work around coreboot GCC preprocessor bug. - * #line marks the *next* line, so it is off by one. - */ -#line 18 - #ifndef __CROS_EC_CHIPSET_H #define __CROS_EC_CHIPSET_H @@ -227,7 +221,7 @@ void chipset_ap_rst_interrupt(enum gpio_signal signal); /** * GPIO interrupt handler of warm reset signal from servo or H1. * - * It is used in Qualcomm chipset power sequence. + * It is used in Qualcomm/MediaTek chipset power sequence. */ void chipset_warm_reset_interrupt(enum gpio_signal signal); diff --git a/include/common.h b/include/common.h index 496fa42247..02f7449d81 100644 --- a/include/common.h +++ b/include/common.h @@ -8,13 +8,6 @@ #ifndef __CROS_EC_COMMON_H #define __CROS_EC_COMMON_H -/* - * I don't know why but gcc's preprocessor doesn't like the autoconf.h file, - * sometimes. Adding a #line directive anywhere in this file seems to fix the - * problem. #line marks the *next* line, so it is off by one. - */ -#line 17 - #include "compile_time_macros.h" #include <inttypes.h> diff --git a/include/config.h b/include/config.h index 544f8811a6..9b4092db6d 100644 --- a/include/config.h +++ b/include/config.h @@ -19,13 +19,6 @@ #define __CROS_EC_CONFIG_H /* - * I don't know why but gcc's preprocessor doesn't like the autoconf.h file, - * sometimes. Adding a #line directive anywhere in this file seems to fix the - * problem. #line marks the *next* line, so it is off by one. - */ -#line 27 - -/* * When building for Zephyr tests, a shimmed_tasks.h header is defined * to create all the HAS_TASK_* definitions. Since those are used in * config.h, we need to include that header first. @@ -303,11 +296,10 @@ */ #undef CONFIG_SYNC_INT_EVENT +#ifndef CONFIG_ZEPHYR /* Compile chip support for digital-to-analog converter */ #undef CONFIG_DAC - -/* Compile chip support for analog-to-digital convertor */ -#undef CONFIG_ADC +#endif /* CONFIG_ZEPHYR */ /* * Allow runtime configuration of the adc_channels[] array @@ -435,8 +427,10 @@ */ #undef CONFIG_ASSEMBLY_MULA32 +#ifndef CONFIG_ZEPHYR /* Support audio codec. */ #undef CONFIG_AUDIO_CODEC +#endif /* CONFIG_ZEPHYR */ /* Audio codec caps. */ #undef CONFIG_AUDIO_CODEC_CAP_WOV_AUDIO_SHM #undef CONFIG_AUDIO_CODEC_CAP_WOV_LANG_SHM @@ -723,11 +717,6 @@ #define CONFIG_BATT_HOST_FULL_FACTOR 97 /* - * Smart battery pass-through host commands. - */ -#undef CONFIG_SB_PASSTHROUGH - -/* * Expose some data when it is needed. * For example, battery disconnect state */ @@ -1313,6 +1302,13 @@ */ #undef CONFIG_BATTERY_MAX_IMBALANCE_MV +/* + * Select this option if the charger will be used in a bypass mode in + * order to pass the input current from AC directly to the system + * power rail for efficiency. + */ +#undef CONFIG_CHARGER_BYPASS_MODE + /* Set this option when using a Narrow VDC (NVDC) charger, such as ISL9237/8. */ #undef CONFIG_CHARGER_NARROW_VDC @@ -1464,10 +1460,12 @@ /* AP chipset support; pick at most one */ #undef CONFIG_CHIPSET_ALDERLAKE /* Intel Alderlake (x86) */ +#ifndef CONFIG_ZEPHYR #undef CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540 /* Intel Alderlake (x86) \ * with power sequencer \ * chip \ */ +#endif /* CONFIG_ZEPHYR */ #undef CONFIG_CHIPSET_APOLLOLAKE /* Intel Apollolake (x86) */ #undef CONFIG_CHIPSET_CANNONLAKE /* Intel Cannonlake (x86) */ #undef CONFIG_CHIPSET_COMETLAKE /* Intel Cometlake (x86) */ @@ -2019,8 +2017,10 @@ /* Maximal EC sampling rate */ #undef CONFIG_EC_MAX_SENSOR_FREQ_MILLIHZ +#ifndef CONFIG_ZEPHYR /* Support EC chip internal data EEPROM */ #undef CONFIG_EEPROM +#endif /* CONFIG_ZEPHYR */ /* * Support for sending emulated sysrq events to AP (on designs with a keyboard, @@ -2230,8 +2230,10 @@ /* Allow EC serial console input to wake up the EC from STOP mode */ #undef CONFIG_FORCE_CONSOLE_RESUME +#ifndef CONFIG_ZEPHYR /* Enable support for floating point unit */ #undef CONFIG_FPU +#endif /* CONFIG_ZEPHYR */ /* Enable warnings on FPU exceptions */ #undef CONFIG_FPU_WARNINGS @@ -2700,7 +2702,9 @@ /*****************************************************************************/ /* I2C configuration */ +#ifndef CONFIG_ZEPHYR #undef CONFIG_I2C +#endif /* CONFIG_ZEPHYR */ #undef CONFIG_I2C_DEBUG #undef CONFIG_I2C_DEBUG_PASSTHRU #undef CONFIG_I2C_PASSTHRU_RESTRICTED @@ -2782,6 +2786,7 @@ */ #undef CONFIG_I2C_MULTI_PORT_CONTROLLER +#ifndef CONFIG_ZEPHYR /* * Enable I2C bitbang driver. * @@ -2793,6 +2798,7 @@ * {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv}, */ #undef CONFIG_I2C_BITBANG +#endif /* CONFIG_ZEPHYR */ /* * If defined, reduce I2C traffic from update functions (i2c_update8/16 @@ -2850,7 +2856,9 @@ * Compile driver for INA219 or INA231 or INA3221. * Only one of these may be defined (if any). */ +#ifndef CONFIG_ZEPHYR #undef CONFIG_INA219 +#endif /* CONFIG_ZEPHYR */ #undef CONFIG_INA231 #undef CONFIG_INA3221 @@ -3098,13 +3106,6 @@ #undef CONFIG_KEYBOARD_SCANCODE_CALLBACK /* - * Call board-supplied keyboard_suppress_noise() function when the debounced - * keyboard state changes. Some boards use this to send a signal to the audio - * codec to suppress typing noise picked up by the microphone. - */ -#undef CONFIG_KEYBOARD_SUPPRESS_NOISE - -/* * Enable keyboard testing functionality. This enables a message which receives * a list of keyscan events from the AP and processes them. This will cause * keypresses to appear on the AP through the same mechanism as a normal @@ -3124,11 +3125,6 @@ #undef CONFIG_KEYBOARD_KSO_HIGH_DRIVE /* - * Add support for keyboards with language ID pins - */ -#undef CONFIG_KEYBOARD_LANGUAGE_ID - -/* * Enable keypad (a palm-sized keyboard section usually placed on the far right) */ #undef CONFIG_KEYBOARD_KEYPAD @@ -3171,11 +3167,13 @@ */ #undef CONFIG_LED_POLICY_STD +#ifndef CONFIG_ZEPHYR /* * Support common PWM-controlled LEDs that conform to the Chrome OS LED * behaviour specification. */ #undef CONFIG_LED_PWM +#endif /* CONFIG_ZEPHYR */ /* * Support common PWM-controlled LEDs that do not conform to the Chrom OS LED @@ -3411,8 +3409,10 @@ /* Size of low power RAM. */ #undef CONFIG_LPRAM_SIZE +#ifndef CONFIG_ZEPHYR /* Use Link-Time Optimizations to try to reduce the firmware code size */ #undef CONFIG_LTO +#endif /* CONFIG_ZEPHYR */ /* Provide rudimentary malloc/free like services for shared memory. */ #undef CONFIG_MALLOC @@ -3565,8 +3565,10 @@ */ #undef CONFIG_MKBP_INPUT_DEVICES +#ifndef CONFIG_ZEPHYR /* Support memory protection unit (MPU) */ #undef CONFIG_MPU +#endif /* CONFIG_ZEPHYR */ /* Do not try hold I/O pins at frozen level during deep sleep */ #undef CONFIG_NO_PINHOLD @@ -3584,8 +3586,10 @@ #undef CONFIG_PANIC_DATA_BASE #undef CONFIG_PANIC_DATA_SIZE +#ifndef CONFIG_ZEPHYR /* Support PECI interface to x86 processor */ #undef CONFIG_PECI +#endif /* CONFIG_ZEPHYR */ /* Common code for PECI interface to x86 processor */ #undef CONFIG_PECI_COMMON @@ -3748,8 +3752,10 @@ */ #undef CONFIG_CPU_PROCHOT_GATE_ON_C10 +#ifndef CONFIG_ZEPHYR /* Support PS/2 interface */ #undef CONFIG_PS2 +#endif /* CONFIG_ZEPHYR */ /* Support Power Sourcing Equipment */ #undef CONFIG_PSE_LTC4291 @@ -3763,8 +3769,10 @@ #undef CONFIG_PVD /*****************************************************************************/ +#ifndef CONFIG_ZEPHYR /* Support PWM control */ #undef CONFIG_PWM +#endif /* CONFIG_ZEPHYR */ /* Define clock input to PWM module. */ #undef CONFIG_PWM_INPUT_LFCLK @@ -3817,8 +3825,10 @@ #undef CONFIG_RGBKBD_DEMO_FLOW #undef CONFIG_RGBKBD_DEMO_DOT +#ifndef CONFIG_ZEPHYR /* Support Real-Time Clock (RTC) */ #undef CONFIG_RTC +#endif /* CONFIG_ZEPHYR */ /* Size of each RAM bank in chip, default is CONFIG_RAM_SIZE */ #undef CONFIG_RAM_BANK_SIZE @@ -3989,8 +3999,10 @@ */ /* #undef CONFIG_SMBUS */ +#ifndef CONFIG_ZEPHYR /* Support SPI interfaces */ #undef CONFIG_SPI +#endif /* CONFIG_ZEPHYR */ /* Support deprecated SPI protocol version 2. */ #undef CONFIG_SPI_PROTOCOL_V2 @@ -4022,8 +4034,10 @@ /* Define the SPI port to use to access the fingerprint sensor */ #undef CONFIG_SPI_FP_PORT +#ifndef CONFIG_ZEPHYR /* Support JEDEC SFDP based Serial NOR flash */ #undef CONFIG_SPI_NOR +#endif /* CONFIG_ZEPHYR */ /* Enable SPI_NOR debugging providing additional console output while * initializing Serial NOR Flash devices including SFDP discovery. */ @@ -4415,8 +4429,10 @@ /* Baud rate for UARTs */ #define CONFIG_UART_BAUD_RATE 115200 +#ifndef CONFIG_ZEPHYR /* UART index (number) for EC console */ #undef CONFIG_UART_CONSOLE +#endif /* CONFIG_ZEPHYR */ /* UART index (number) for host UART, if present */ #undef CONFIG_UART_HOST @@ -5413,8 +5429,10 @@ /* Support reporting of configuration bMaxPower in mA */ #define CONFIG_USB_MAXPOWER_MA 500 +#ifndef CONFIG_ZEPHYR /* Support reporting as self powered in USB configuration. */ #undef CONFIG_USB_SELF_POWERED +#endif /* CONFIG_ZEPHYR */ /* Support correct handling of USB suspend (host-initiated). */ #undef CONFIG_USB_SUSPEND @@ -5845,8 +5863,10 @@ */ #undef CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT +#ifndef CONFIG_ZEPHYR /* Define this to enable system boot time logging */ #undef CONFIG_SYSTEM_BOOT_TIME_LOGGING +#endif /* CONFIG_ZEPHYR */ /* * The USB port used for CCD. Defaults to 0/C0. @@ -6340,9 +6360,11 @@ #define CONFIG_BUTTON_TRIGGERED_RECOVERY #endif /* defined(CONFIG_DEDICATED_RECOVERY_BUTTON) */ +#ifndef CONFIG_ZEPHYR #ifdef CONFIG_LED_PWM_COUNT #define CONFIG_LED_PWM #endif /* defined(CONFIG_LED_PWM_COUNT) */ +#endif /* CONFIG_ZEPHYR */ #ifdef CONFIG_LED_PWM_ACTIVE_CHARGE_PORT_ONLY #define CONFIG_LED_PWM_CHARGE_STATE_ONLY @@ -6418,7 +6440,9 @@ #ifndef HAS_TASK_CHIPSET #undef CONFIG_AP_HANG_DETECT #undef CONFIG_CHIPSET_ALDERLAKE +#ifndef CONFIG_ZEPHYR #undef CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540 +#endif /* CONFIG_ZEPHYR */ #undef CONFIG_CHIPSET_APOLLOLAKE #undef CONFIG_CHIPSET_CANNONLAKE #undef CONFIG_CHIPSET_COMETLAKE @@ -6444,11 +6468,13 @@ * for. In Zephyr this can be implied by multiple options, so we provide the * same symbol here instead of making code examine HAS_TASK_CHIPSET. */ +#ifndef CONFIG_ZEPHYR #ifndef CONFIG_AP_POWER_CONTROL #ifdef HAS_TASK_CHIPSET #define CONFIG_AP_POWER_CONTROL #endif /* HAS_TASK_CHIPSET */ #endif /* CONFIG_AP_POWER_CONTROL */ +#endif /* CONFIG_ZEPHYR */ /* * If a board has a chipset task, set the minimum charger power required for diff --git a/include/driver/tcpm/rt1718s_public.h b/include/driver/tcpm/rt1718s_public.h index 62bade6ab9..7a76c24af3 100644 --- a/include/driver/tcpm/rt1718s_public.h +++ b/include/driver/tcpm/rt1718s_public.h @@ -8,6 +8,8 @@ #ifndef __CROS_EC_DRIVER_TCPM_RT1718S_PUBLIC_H #define __CROS_EC_DRIVER_TCPM_RT1718S_PUBLIC_H +#include "usb_pd_tcpm.h" + #define RT1718S_I2C_ADDR1_FLAGS 0x43 #define RT1718S_I2C_ADDR2_FLAGS 0x40 diff --git a/include/ec_cmd_api.h b/include/ec_cmd_api.h index 723b639f9d..29a63b8088 100644 --- a/include/ec_cmd_api.h +++ b/include/ec_cmd_api.h @@ -282,7 +282,6 @@ _CROS_EC_C0_F_PF_RF(EC_CMD_GET_CMD_VERSIONS, get_cmd_versions); _CROS_EC_C0_F_RF(EC_CMD_GET_COMMS_STATUS, get_comms_status); _CROS_EC_C0_F_RF(EC_CMD_GET_FEATURES, get_features); _CROS_EC_CV_F_R(EC_CMD_GET_KEYBD_CONFIG, 0, get_keybd_config, keybd_config); -_CROS_EC_CV_F_R(EC_CMD_GET_KEYBOARD_ID, 0, get_keyboard_id, keyboard_id); _CROS_EC_CV_F_R(EC_CMD_GET_NEXT_EVENT, 2, get_next_event_v2, get_next_event); _CROS_EC_C0_F_RF(EC_CMD_GET_NEXT_EVENT, get_next_event); _CROS_EC_C0_F_PF_RF(EC_CMD_GET_PD_PORT_CAPS, get_pd_port_caps); diff --git a/include/ec_commands.h b/include/ec_commands.h index 049adcc205..71089447ce 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -1273,7 +1273,7 @@ struct ec_response_get_version_v1 { char cros_fwid_rw[32]; /* Added in version 1 */ } __ec_align4; -/* Read test - DEPRECATED */ +/* Read test - OBSOLETE */ #define EC_CMD_READ_TEST 0x0003 /* @@ -3725,17 +3725,6 @@ struct ec_params_mkbp_simulate_key { uint8_t pressed; } __ec_align1; -#define EC_CMD_GET_KEYBOARD_ID 0x0063 - -struct ec_response_keyboard_id { - uint32_t keyboard_id; -} __ec_align4; - -enum keyboard_id { - KEYBOARD_ID_UNSUPPORTED = 0, - KEYBOARD_ID_UNREADABLE = 0xffffffff, -}; - /* Configure keyboard scanning */ #define EC_CMD_MKBP_SET_CONFIG 0x0064 #define EC_CMD_MKBP_GET_CONFIG 0x0065 @@ -4997,38 +4986,16 @@ struct ec_response_device_event { /*****************************************************************************/ /* Smart battery pass-through */ -/* Get / Set 16-bit smart battery registers */ +/* Get / Set 16-bit smart battery registers - OBSOLETE */ #define EC_CMD_SB_READ_WORD 0x00B0 #define EC_CMD_SB_WRITE_WORD 0x00B1 /* Get / Set string smart battery parameters - * formatted as SMBUS "block". + * formatted as SMBUS "block". - OBSOLETE */ #define EC_CMD_SB_READ_BLOCK 0x00B2 #define EC_CMD_SB_WRITE_BLOCK 0x00B3 -struct ec_params_sb_rd { - uint8_t reg; -} __ec_align1; - -struct ec_response_sb_rd_word { - uint16_t value; -} __ec_align2; - -struct ec_params_sb_wr_word { - uint8_t reg; - uint16_t value; -} __ec_align1; - -struct ec_response_sb_rd_block { - uint8_t data[32]; -} __ec_align1; - -struct ec_params_sb_wr_block { - uint8_t reg; - uint16_t data[32]; -} __ec_align1; - /*****************************************************************************/ /* Battery vendor parameters * diff --git a/include/fpsensor_detect.h b/include/fpsensor_detect.h index b8d7b398d5..13ee1f73f6 100644 --- a/include/fpsensor_detect.h +++ b/include/fpsensor_detect.h @@ -17,9 +17,9 @@ extern "C" { const char *fp_transport_type_to_str(enum fp_transport_type type); const char *fp_sensor_type_to_str(enum fp_sensor_type type); const char *fp_sensor_spi_select_to_str(enum fp_sensor_spi_select type); -enum fp_sensor_type get_fp_sensor_type(void); +enum fp_sensor_type fpsensor_detect_get_type(void); enum fp_transport_type get_fp_transport_type(void); -enum fp_sensor_spi_select get_fp_sensor_spi_select(void); +enum fp_sensor_spi_select fpsensor_detect_get_spi_select(void); #ifdef __cplusplus } diff --git a/include/i2c.h b/include/i2c.h index 741b578ec8..4da9306abb 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -8,13 +8,6 @@ #ifndef __CROS_EC_I2C_H #define __CROS_EC_I2C_H -/* - * I don't know why but gcc's preprocessor doesn't like the autoconf.h file, - * sometimes. Adding a #line directive anywhere in this file seems to fix the - * problem. #line marks the *next* line, so it is off by one. - */ -#line 17 - #include "common.h" #include "gpio_signal.h" #include "host_command.h" diff --git a/include/keyboard_config.h b/include/keyboard_config.h index afb69bf141..997fe88a2b 100644 --- a/include/keyboard_config.h +++ b/include/keyboard_config.h @@ -14,10 +14,6 @@ /* include the board layer keyboard header file */ #include "keyboard_customization.h" #else /* CONFIG_KEYBOARD_CUSTOMIZATION */ -#ifdef CONFIG_KEYBOARD_LANGUAGE_ID -/* Keyboard matrix support for language ID pins */ -#define KEYBOARD_IDS 2 -#endif /* Keyboard matrix is 13 (or 15 with keypad) output columns x 8 input rows */ #define KEYBOARD_COLS_WITH_KEYPAD 15 diff --git a/include/keyboard_raw.h b/include/keyboard_raw.h index 350791998f..8ce26c5d39 100644 --- a/include/keyboard_raw.h +++ b/include/keyboard_raw.h @@ -108,15 +108,10 @@ static inline int keyboard_raw_get_cols(void) static inline void keyboard_raw_set_cols(int cols) { -#ifdef CONFIG_KEYBOARD_LANGUAGE_ID - /* Keyboard ID is probably encoded right after the last column. Scanner - * would read keyboard ID if the column size is decreased. */ - assert(cols == KEYBOARD_COLS_MAX); -#else /* We can only decrease the column size. You have to assume a larger * grid (and reduce scanning size if the keyboard has no keypad). */ assert(cols <= KEYBOARD_COLS_MAX); -#endif + keyboard_cols = cols; } diff --git a/include/keyboard_scan.h b/include/keyboard_scan.h index e235a47c1c..544f973946 100644 --- a/include/keyboard_scan.h +++ b/include/keyboard_scan.h @@ -122,25 +122,6 @@ static inline void keyboard_scan_enable(int enable, } #endif -#ifdef CONFIG_KEYBOARD_SUPPRESS_NOISE -/** - * Indicate to audio codec that a key has been pressed. - * - * Boards may supply this function to suppress audio noise. - */ -void keyboard_suppress_noise(void); -#endif - -#ifdef CONFIG_KEYBOARD_LANGUAGE_ID -/** - * Get the KEYBOARD ID for a keyboard - * - * @return A value that identifies keyboard variants. Its meaning and - * the number of bits actually used is the supported keyboard layout. - */ -int keyboard_get_keyboard_id(void); -#endif - #ifdef CONFIG_KEYBOARD_RUNTIME_KEYS void set_vol_up_key(uint8_t row, uint8_t col); #else @@ -204,6 +185,11 @@ __test_only void keyboard_scan_set_print_state_changes(int val); * @return int non-zero if enabled, zero otherwise. */ int keyboard_scan_is_enabled(void); + +/** + * @brief Reset key debouncing logic + */ +void test_keyboard_scan_debounce_reset(void); #endif /* TEST_BUILD */ #endif /* __CROS_EC_KEYBOARD_SCAN_H */ diff --git a/include/mock/fpsensor_detect_mock.h b/include/mock/fpsensor_detect_mock.h index b8594ebdd9..e68704115c 100644 --- a/include/mock/fpsensor_detect_mock.h +++ b/include/mock/fpsensor_detect_mock.h @@ -9,14 +9,14 @@ #include "fpsensor_detect.h" struct mock_ctrl_fpsensor_detect { - enum fp_sensor_type get_fp_sensor_type_return; + enum fp_sensor_type fpsensor_detect_get_type_return; enum fp_transport_type get_fp_transport_type_return; enum fp_sensor_spi_select get_fp_sensor_spi_select_return; }; #define MOCK_CTRL_DEFAULT_FPSENSOR_DETECT \ { \ - .get_fp_sensor_type_return = FP_SENSOR_TYPE_UNKNOWN, \ + .fpsensor_detect_get_type_return = FP_SENSOR_TYPE_UNKNOWN, \ .get_fp_transport_type_return = FP_TRANSPORT_TYPE_UNKNOWN, \ .get_fp_sensor_spi_select_return = \ FP_SENSOR_SPI_SELECT_UNKNOWN \ diff --git a/include/mock/fp_sensor_mock.h b/include/mock/fpsensor_mock.h index 338a03b7e9..dae485b859 100644 --- a/include/mock/fp_sensor_mock.h +++ b/include/mock/fpsensor_mock.h @@ -8,8 +8,8 @@ * @brief Controls for the mock fpsensor private driver */ -#ifndef __MOCK_FP_SENSOR_MOCK_H -#define __MOCK_FP_SENSOR_MOCK_H +#ifndef __MOCK_FPSENSOR_MOCK_H +#define __MOCK_FPSENSOR_MOCK_H #include "common.h" #include "fpsensor.h" diff --git a/include/test_util.h b/include/test_util.h index 45afba55b5..eb3aa5b4d6 100644 --- a/include/test_util.h +++ b/include/test_util.h @@ -97,11 +97,16 @@ extern "C" { #define TEST_ASSERT_ARRAY_EQ(s, d, n) \ do { \ - int __i; \ - for (__i = 0; __i < n; ++__i) \ + if (n < 0) \ + return EC_ERROR_UNKNOWN; \ + \ + unsigned int __n = n; \ + \ + for (unsigned int __i = 0; __i < __n; ++__i) \ + \ if ((s)[__i] != (d)[__i]) { \ ccprintf("%s:%d: ASSERT_ARRAY_EQ failed at " \ - "index=%d: %d != %d\n", \ + "index=%u: %d != %d\n", \ __FILE__, __LINE__, __i, \ (int)(s)[__i], (int)(d)[__i]); \ task_dump_trace(); \ @@ -111,11 +116,16 @@ extern "C" { #define TEST_ASSERT_MEMSET(d, c, n) \ do { \ - int __i; \ - for (__i = 0; __i < n; ++__i) \ + if (n < 0) \ + return EC_ERROR_UNKNOWN; \ + \ + unsigned int __n = n; \ + \ + for (unsigned int __i = 0; __i < __n; ++__i) \ + \ if ((d)[__i] != (c)) { \ ccprintf("%s:%d: ASSERT_MEMSET failed at " \ - "index=%d: %d != %d\n", \ + "index=%u: %d != %d\n", \ __FILE__, __LINE__, __i, \ (int)(d)[__i], (c)); \ task_dump_trace(); \ diff --git a/include/usb_pd_tcpm.h b/include/usb_pd_tcpm.h index 0311f155b3..3860ca5d4f 100644 --- a/include/usb_pd_tcpm.h +++ b/include/usb_pd_tcpm.h @@ -8,13 +8,6 @@ #ifndef __CROS_EC_USB_PD_TCPM_H #define __CROS_EC_USB_PD_TCPM_H -/* - * I don't know why but gcc's preprocessor doesn't like this file, - * sometimes. Adding a #line directive anywhere in this file seems to fix the - * problem. #line marks the *next* line, so it is off by one. - */ -#line 17 - #include "common.h" #include "compiler.h" #include "ec_commands.h" diff --git a/include/watchdog.h b/include/watchdog.h index 6955f128ff..5e6e5626e6 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -8,13 +8,6 @@ #ifndef __CROS_EC_WATCHDOG_H #define __CROS_EC_WATCHDOG_H -/* - * I don't know why but gcc's preprocessor doesn't like this file, - * sometimes. Adding a #line directive anywhere in this file seems to fix the - * problem. #line marks the *next* line, so it is off by one. - */ -#line 17 - #include "config.h" #include <stdint.h> diff --git a/libc/syscalls.c b/libc/syscalls.c index afe92c2d06..1c13e9915d 100644 --- a/libc/syscalls.c +++ b/libc/syscalls.c @@ -12,8 +12,11 @@ */ #include "gettimeofday.h" +#include "link_defs.h" #include "panic.h" +#include "shared_mem.h" #include "software_panic.h" +#include "system.h" #include "task.h" #include "uart.h" @@ -92,3 +95,31 @@ int _gettimeofday(struct timeval *restrict tv, void *restrict tz) return 0; } + +/** + * Change program's data space by increment bytes. + * + * This function is called from the libc sbrk() function (which is in turn + * called from malloc() when memory needs to be allocated or released). + * + * @param incr[in] amount to increment or decrement. 0 means return current + * program break. + * @return the previous program break (address) on success + * @return (void*)-1 on error and errno is set to ENOMEM. + */ +void *_sbrk(intptr_t incr) +{ + static char *heap_end = __shared_mem_buf; + char *prev_heap_end; + + if ((heap_end + incr < __shared_mem_buf) || + (heap_end + incr > (__shared_mem_buf + shared_mem_size()))) { + errno = ENOMEM; + return (void *)-1; + } + + prev_heap_end = heap_end; + heap_end += incr; + + return (void *)prev_heap_end; +} diff --git a/power/mt8186.c b/power/mt8186.c index ad0f189510..9550a28c8a 100644 --- a/power/mt8186.c +++ b/power/mt8186.c @@ -80,6 +80,8 @@ /* indicate MT8186 is processing a chipset reset. */ static bool is_resetting; +/* indicate MT8186 is AP reset is held by servo or GSC. */ +test_export_static bool is_held; /* indicate MT8186 is processing a AP forcing shutdown. */ static bool is_shutdown; /* indicate MT8186 has been dropped to S5G3 from the last IN_AP_RST state . */ @@ -90,6 +92,9 @@ static bool is_s5g3_passed; */ static bool is_exiting_off; +/* forward declaration */ +static enum power_state power_get_signal_state(void); + /* Turn on the PMIC power source to AP, this also boots AP. */ static void set_pmic_pwron(void) { @@ -122,6 +127,20 @@ static void set_pmic_pwroff(void) GPIO_SET_LEVEL(GPIO_EC_PMIC_EN_ODL, 1); } +void chipset_warm_reset_interrupt(enum gpio_signal signal) +{ + /* If this is not a chipset_reset, the ap_rst must be held by gsc or + * servo. + */ + if (!is_resetting && !gpio_get_level(GPIO_SYS_RST_ODL) && + !gpio_get_level(signal)) + is_held = true; + else + is_held = false; + + power_signal_interrupt(signal); +} + static void reset_request_interrupt_deferred(void) { chipset_reset(CHIPSET_RESET_AP_REQ); @@ -159,7 +178,12 @@ void chipset_watchdog_interrupt(enum gpio_signal signal) void chipset_force_shutdown(enum chipset_shutdown_reason reason) { - bool chipset_off = chipset_in_state(CHIPSET_STATE_ANY_OFF); + int state = power_get_signal_state(); + /* use the signal state instead of the chipset_in_state because the + * power_state is not initaialized when chipset_force_shutdown is called + * from power_chipset_init. + */ + bool chipset_off = (state != POWER_S0 && state != POWER_S3); CPRINTS("%s: 0x%x%s", __func__, reason, chipset_off ? "(skipped)" : ""); @@ -229,23 +253,27 @@ static void power_reset_host_sleep_state(void) * G3 | 1 | x | 1| * * S5 is a temp stage, which will be put into G3 after s5_inactivity_timeout. - * is_resetting flag indicate it's resetting chipset, and it's always S0. + * is_resetting flag indicates it's resetting chipset, and always S0. + * is_held flag indicates the AP reset is held by servo or GSC, and always S0. * is_shutdown flag indicates it's shutting down the AP, it goes for S5. * is_s5g3_passed flag indicates it has shutdown from S5 to G3 since last * shutdown. */ static enum power_state power_get_signal_state(void) { + if (is_shutdown) + return POWER_S5; /* - * We are processing a chipset reset(S0->S0), so we don't check the + * - We are processing a chipset reset(S0->S0), so we don't check the * power signals until the reset is finished. This is because * while the chipset is resetting, the intermediate power signal state * is not reflecting the current power state. + * + * - GSC or Servo is holding the SYS_RST, in this case, we should stay + * at S0. */ - if (is_resetting) + if (is_resetting || is_held) return POWER_S0; - if (is_shutdown) - return POWER_S5; if (power_get_signals() & IN_AP_RST) { /* If it has been put to G3 from S5 idle, then stay at G3.*/ if (is_s5g3_passed) @@ -462,6 +490,10 @@ enum power_state power_handle_state(enum power_state state) hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); is_shutdown = false; + /* AP down and PMIC off, the servo and GSC is unable to hold the + * AP for S0. + */ + is_held = false; return POWER_S5; case POWER_S5G3: diff --git a/test/build.mk b/test/build.mk index 923c141d33..d03ae345cb 100644 --- a/test/build.mk +++ b/test/build.mk @@ -71,6 +71,7 @@ test-list-host += kb_scan_strict test-list-host += lid_sw test-list-host += lightbar test-list-host += mag_cal +test-list-host += malloc test-list-host += math_util test-list-host += motion_angle test-list-host += motion_angle_tablet @@ -90,6 +91,7 @@ test-list-host += rollback_secret test-list-host += rsa test-list-host += rsa3 test-list-host += rtc +test-list-host += sbrk test-list-host += sbs_charging_v2 test-list-host += sha256 test-list-host += sha256_unrolled @@ -220,6 +222,7 @@ kb_scan_strict-y=kb_scan.o lid_sw-y=lid_sw.o lightbar-y=lightbar.o mag_cal-y=mag_cal.o +malloc-y=malloc.o math_util-y=math_util.o motion_angle-y=motion_angle.o motion_angle_data_literals.o motion_common.o motion_angle_tablet-y=motion_angle_tablet.o motion_angle_data_literals_tablet.o motion_common.o @@ -252,6 +255,7 @@ rsa-y=rsa.o rsa3-y=rsa.o rtc-y=rtc.o scratchpad-y=scratchpad.o +sbrk-y=sbrk.o sbs_charging-y=sbs_charging.o sbs_charging_v2-y=sbs_charging_v2.o sha256-y=sha256.o diff --git a/test/fpsensor.c b/test/fpsensor.c index d7ddcbebcb..a1947f7844 100644 --- a/test/fpsensor.c +++ b/test/fpsensor.c @@ -53,7 +53,7 @@ test_static int test_host_command_protocol_info( struct ec_response_get_protocol_info info; int rv; - mock_ctrl_fpsensor_detect.get_fp_sensor_type_return = + mock_ctrl_fpsensor_detect.fpsensor_detect_get_type_return = FP_SENSOR_TYPE_FPC; mock_ctrl_fpsensor_detect.get_fp_transport_type_return = transport_type; diff --git a/test/fpsensor.mocklist b/test/fpsensor.mocklist index 3f2c60c583..84972487c9 100644 --- a/test/fpsensor.mocklist +++ b/test/fpsensor.mocklist @@ -5,7 +5,7 @@ #ifdef BOARD_HOST #define CONFIG_TEST_MOCK_LIST \ - MOCK(FP_SENSOR) \ + MOCK(FPSENSOR) \ MOCK(FPSENSOR_CRYPTO) \ MOCK(FPSENSOR_DETECT) \ MOCK(FPSENSOR_STATE) \ diff --git a/test/malloc.c b/test/malloc.c new file mode 100644 index 0000000000..0a498acb82 --- /dev/null +++ b/test/malloc.c @@ -0,0 +1,119 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" +#include "shared_mem.h" +#include "stdlib.h" +#include "test_util.h" + +#include <malloc.h> + +struct malloc_data { + uint32_t size; + uint8_t val; + uint8_t *data; +}; + +static struct malloc_data test_data[] = { + { .size = 15, .val = 1, .data = NULL }, + { .size = 1024, .val = 2, .data = NULL }, + { .size = 86096, .val = 3, .data = NULL } +}; + +test_static int test_malloc_different_sizes(void) +{ + /* Trim to make sure that previous tests haven't fragmented the heap. */ + malloc_trim(0); + + for (int i = 0; i < ARRAY_SIZE(test_data); i++) { + uint8_t *volatile ptr = malloc(test_data[i].size); + TEST_NE(ptr, NULL, "%p"); + test_data[i].data = ptr; + for (int j = 0; j < test_data[i].size; j++) { + ptr[j] = test_data[i].val; + } + } + + for (int i = 0; i < ARRAY_SIZE(test_data); i++) { + uint8_t *ptr = test_data[i].data; + /* Using TEST_EQ results in too much logging. */ + for (int j = 0; j < test_data[i].size; j++) { + if (ptr[j] != test_data[i].val) { + TEST_ASSERT(false); + } + } + } + + for (int i = 0; i < ARRAY_SIZE(test_data); i++) { + free(test_data[i].data); + } + + return EC_SUCCESS; +} + +test_static int test_free_null(void) +{ + free(NULL); + return EC_SUCCESS; +} + +test_static int test_malloc_large(void) +{ + /* Trim to make sure that previous tests haven't fragmented the heap. */ + malloc_trim(0); + uint8_t *volatile ptr = malloc(shared_mem_size() * 0.8); + TEST_NE(ptr, NULL, "%p"); + free(ptr); + return EC_SUCCESS; +} + +test_static int test_malloc_too_large(void) +{ + /* Trim to make sure that previous tests haven't fragmented the heap. */ + malloc_trim(0); + uint8_t *volatile ptr = malloc(shared_mem_size() + 1); + TEST_EQ(ptr, NULL, "%p"); + free(ptr); + return EC_SUCCESS; +} + +/** + * Useful for manually testing the behavior of double frees. + * + * For example, if you compile the malloc implementation provided by newlib + * with the patch in https://crrev.com/c/4406822, you'll get something like: + * + * assertion "inuse(p)" failed: file "newlib/libc/stdlib/mallocr.c", + * line 1841, function: do_check_inuse_chunk + * _exit called with rc: 1 + * + * If you run the host tests you'll get something like: + * + * free(): double free detected in tcache 2 + * Aborted + */ +test_static int test_malloc_double_free(void) +{ + uint8_t *volatile ptr = malloc(10); + TEST_NE(ptr, NULL, "%p"); + free(ptr); + free(ptr); + + return EC_SUCCESS; +} + +void run_test(int argc, const char **argv) +{ + test_reset(); + + RUN_TEST(test_free_null); + RUN_TEST(test_malloc_different_sizes); + RUN_TEST(test_malloc_large); + + if (!IS_ENABLED(BOARD_HOST)) + RUN_TEST(test_malloc_too_large); + + test_print_result(); +} diff --git a/test/malloc.tasklist b/test/malloc.tasklist new file mode 100644 index 0000000000..d1920322a9 --- /dev/null +++ b/test/malloc.tasklist @@ -0,0 +1,9 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * See CONFIG_TASK_LIST in config.h for details. + */ +#define CONFIG_TEST_TASK_LIST diff --git a/test/run_device_tests.py b/test/run_device_tests.py index 4661d57b74..f385441f6d 100755 --- a/test/run_device_tests.py +++ b/test/run_device_tests.py @@ -275,6 +275,7 @@ class AllTests: ), TestConfig(test_name="global_initialization"), TestConfig(test_name="libcxx"), + TestConfig(test_name="malloc", imagetype_to_use=ImageType.RO), TestConfig( config_name="mpu_ro", test_name="mpu", @@ -308,6 +309,7 @@ class AllTests: test_name="rollback_entropy", imagetype_to_use=ImageType.RO ), TestConfig(test_name="rtc"), + TestConfig(test_name="sbrk", imagetype_to_use=ImageType.RO), TestConfig(test_name="sha256"), TestConfig(test_name="sha256_unrolled"), TestConfig(test_name="static_if"), diff --git a/test/sbrk.c b/test/sbrk.c new file mode 100644 index 0000000000..a5cbd2e41b --- /dev/null +++ b/test/sbrk.c @@ -0,0 +1,86 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "link_defs.h" +#include "shared_mem.h" +#include "test_util.h" + +#include <errno.h> + +#include <unistd.h> + +test_static int test_sbrk_overflow(void) +{ + /* Requesting the maximum possible amount should succeed. */ + uint8_t *ptr = sbrk(shared_mem_size()); + TEST_NE(ptr, (void *)-1, "%p"); + + /* Requesting any more should fail. */ + ptr = sbrk(1); + TEST_EQ(ptr, (void *)-1, "%p"); + TEST_EQ(errno, ENOMEM, "%d"); + + return EC_SUCCESS; +} + +test_static int test_sbrk_underflow(void) +{ + uint8_t *const start = sbrk(0); + TEST_EQ(start, (uint8_t *)__shared_mem_buf, "%p"); + + /* + * We're already at the start of the shared mem buffer, so requesting + * less should fail. + */ + uint8_t *ptr = sbrk(-1); + TEST_EQ(ptr, (void *)-1, "%p"); + TEST_EQ(errno, ENOMEM, "%d"); + + ptr = sbrk(0); + TEST_EQ(ptr, (uint8_t *)__shared_mem_buf, "%p"); + + return EC_SUCCESS; +} + +test_static int test_sbrk(void) +{ + uint8_t *const start = sbrk(0); + if (!IS_ENABLED(BOARD_HOST)) + TEST_EQ(start, (uint8_t *)__shared_mem_buf, "%p"); + + uint8_t *prev = sbrk(100); + TEST_EQ(prev, start, "%p"); + + uint8_t *cur = sbrk(0); + TEST_EQ(cur, prev + 100, "%p"); + + prev = sbrk(-100); + TEST_EQ(prev, cur, "%p"); + + cur = sbrk(0); + TEST_EQ(cur, start, "%p"); + + return EC_SUCCESS; +} + +void run_test(int argc, const char **argv) +{ + test_reset(); + + RUN_TEST(test_sbrk); + if (!IS_ENABLED(BOARD_HOST)) { + if (IS_ENABLED(SECTION_IS_RW)) { + ccprintf("The following tests only work in RO, since " + "RW performs dynamic memory allocation " + "before the test starts.\n"); + test_fail(); + return; + } + RUN_TEST(test_sbrk_underflow); + RUN_TEST(test_sbrk_overflow); + } + + test_print_result(); +} diff --git a/test/sbrk.tasklist b/test/sbrk.tasklist new file mode 100644 index 0000000000..d1920322a9 --- /dev/null +++ b/test/sbrk.tasklist @@ -0,0 +1,9 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * See CONFIG_TASK_LIST in config.h for details. + */ +#define CONFIG_TEST_TASK_LIST diff --git a/util/compare_build.sh b/util/compare_build.sh index 10399d410b..9f689ea9b7 100755 --- a/util/compare_build.sh +++ b/util/compare_build.sh @@ -232,7 +232,7 @@ LINKS ?= ${LINKS[*]} all: build-${OLD_REF} build-${NEW_REF} ec-%: - git clone --quiet --no-checkout \$(ORIGIN) \$@ + git clone --quiet --no-checkout --shared \$(ORIGIN) \$@ git -C \$@ checkout --quiet \$(@:ec-%=%) ifneq (\$(LINKS),) ln -s \$(addprefix \$(ORIGIN)/,\$(LINKS)) \$@ diff --git a/util/config_allowed.txt b/util/config_allowed.txt index cb51945821..081d05d7e3 100644 --- a/util/config_allowed.txt +++ b/util/config_allowed.txt @@ -406,7 +406,6 @@ CONFIG_FLASH_WRITE_SIZE CONFIG_FMAP CONFIG_FOO CONFIG_FORCE_CONSOLE_RESUME -CONFIG_FPU CONFIG_FPU_WARNINGS CONFIG_FP_SENSOR_ELAN515 CONFIG_FP_SENSOR_ELAN80 @@ -550,13 +549,11 @@ CONFIG_KEYBOARD_BOOT_KEYS CONFIG_KEYBOARD_IRQ_GPIO CONFIG_KEYBOARD_KSO_BASE CONFIG_KEYBOARD_KSO_HIGH_DRIVE -CONFIG_KEYBOARD_LANGUAGE_ID CONFIG_KEYBOARD_MULTIPLE CONFIG_KEYBOARD_POST_SCAN_CLOCKS CONFIG_KEYBOARD_PRINT_SCAN_TIMES CONFIG_KEYBOARD_RUNTIME_KEYS CONFIG_KEYBOARD_SCANCODE_CALLBACK -CONFIG_KEYBOARD_SUPPRESS_NOISE CONFIG_KEYBOARD_TABLET_MODE_SWITCH CONFIG_KEYBOARD_TEST CONFIG_KX022_ORIENTATION_SENSOR @@ -641,12 +638,10 @@ CONFIG_MOTION_MIN_SENSE_WAIT_TIME CONFIG_MOTION_SENSE_RESUME_DELAY_US CONFIG_MOTION_SENSE_SUSPEND_DELAY_US CONFIG_MP4245 -CONFIG_MPU CONFIG_NAME CONFIG_NB7V904M_LPM_OVERRIDE CONFIG_NO_PINHOLD CONFIG_NUM_FIXED_BATTERIES -CONFIG_NUM_IRQS CONFIG_ONEWIRE CONFIG_ONLINE_CALIB CONFIG_ONLINE_CALIB_SPOOF_MODE @@ -749,7 +744,6 @@ CONFIG_RW_SIG_ADDR CONFIG_RW_SIG_SIZE CONFIG_RW_SIZE CONFIG_RW_STORAGE_OFF -CONFIG_SB_PASSTHROUGH CONFIG_SCI_GPIO CONFIG_SENSORHUB_LSM6DSM CONFIG_SENSOR_ORIENTATION @@ -889,7 +883,6 @@ CONFIG_USART_HOST_COMMAND CONFIG_USB CONFIG_USBC_BACKWARDS_COMPATIBLE_DFP CONFIG_USBC_DISABLE_CHARGE_FROM_RP_DEF -CONFIG_USBC_PPC_NX20P3481 CONFIG_USBC_RETIMER_NB7V904M CONFIG_USBC_RETIMER_PI3DPX1207 CONFIG_USBC_RETIMER_PI3HDX1204 diff --git a/util/ec_openocd.py b/util/ec_openocd.py index 4d114d4343..5da0479ed9 100755 --- a/util/ec_openocd.py +++ b/util/ec_openocd.py @@ -3,43 +3,55 @@ # Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. +""" +Flashes and debugs the EC through openocd +""" import argparse import dataclasses +import distutils.spawn +import os import pathlib +import signal import socket import subprocess import sys import time -""" -Flashes and debugs the EC through openocd -""" +EC_BASE = pathlib.Path(__file__).parent.parent + +# GDB variant to use if the board specific one is not found +FALLBACK_GDB_VARIANT = "gdb-multiarch" @dataclasses.dataclass class BoardInfo: + """Holds the board specific parameters.""" + gdb_variant: str num_breakpoints: int num_watchpoints: int # Debuggers for each board, OpenOCD currently only supports GDB -boards = {"skyrim": BoardInfo("arm-none-eabi-gdb", 6, 4)} +boards = { + "rex": BoardInfo("arm-none-eabi-gdb", 6, 4), + "skyrim": BoardInfo("arm-none-eabi-gdb", 6, 4), +} def create_openocd_args(interface, board): + """Return a list of arguments for initializing OpenOCD.""" if not board in boards: raise RuntimeError(f"Unsupported board {board}") - board_info = boards[board] args = [ "openocd", "-f", f"interface/{interface}.cfg", "-c", - "add_script_search_dir openocd", + f"add_script_search_dir {EC_BASE}/util/openocd", "-f", f"board/{board}.cfg", ] @@ -47,13 +59,26 @@ def create_openocd_args(interface, board): return args -def create_gdb_args(board, port, executable): +def create_gdb_args(board, port, executable, attach): + """Return a list of arguments for initializing GDB.""" if not board in boards: raise RuntimeError(f"Unsupported board {board}") board_info = boards[board] + + if distutils.spawn.find_executable(board_info.gdb_variant): + gdb_path = board_info.gdb_variant + elif distutils.spawn.find_executable(FALLBACK_GDB_VARIANT): + print( + f"GDB executable {board_info.gdb_variant} not found, " + f"using {FALLBACK_GDB_VARIANT} instead" + ) + gdb_path = FALLBACK_GDB_VARIANT + else: + raise RuntimeError("No GDB executable found in the system") + args = [ - board_info.gdb_variant, + gdb_path, executable, # GDB can't autodetect these according to OpenOCD "-ex", @@ -65,100 +90,122 @@ def create_gdb_args(board, port, executable): f"target extended-remote localhost:{port}", ] + if not attach: + args.extend(["-ex", "load"]) + return args def flash(interface, board, image, verify): + """Run openocd to flash the specified image file.""" print(f"Flashing image {image}") # Run OpenOCD and pipe its output to stdout # OpenOCD will shutdown after the flashing is completed args = create_openocd_args(interface, board) args += ["-c", f'init; flash_target "{image}" {int(verify)}; shutdown'] - subprocess.run(args, stdout=sys.stdout, stderr=subprocess.STDOUT) + subprocess.run( + args, stdout=sys.stdout, stderr=subprocess.STDOUT, check=True + ) -def debug(interface, board, port, executable): +def debug(interface, board, port, executable, attach): + """Start OpenOCD and connect GDB to it.""" # Start OpenOCD in the background openocd_args = create_openocd_args(interface, board) openocd_args += ["-c", f"gdb_port {port}"] + openocd_out = "" - openocd = subprocess.Popen( + with subprocess.Popen( # pylint: disable=subprocess-popen-preexec-fn openocd_args, encoding="utf-8", stdout=subprocess.PIPE, stderr=subprocess.STDOUT, - ) - - # Wait for OpenOCD to start, it'll open a port for GDB connections - sock = socket.socket(socket.AF_INET, socket.SOCK_STREAM) - connected = False - for i in range(0, 10): - print("Waiting for OpenOCD to start...") - connected = sock.connect_ex(("localhost", port)) - if connected: - break + preexec_fn=os.setsid, + ) as openocd: + + # Wait for OpenOCD to start, it'll open a port for GDB connections + sock = socket.socket(socket.AF_INET, socket.SOCK_STREAM) + connected = False + for _ in range(0, 10): + print("Waiting for OpenOCD to start...") + connected = sock.connect_ex(("localhost", port)) + if connected: + break + + time.sleep(1000) + + if not connected: + print(f"Failed to connect to OpenOCD on port {port}") + return + + sock.close() + + old_sigint = signal.signal(signal.SIGINT, signal.SIG_IGN) + + # Start GDB + gdb_args = create_gdb_args(board, port, executable, attach) + with subprocess.Popen( + gdb_args, + stdout=sys.stdout, + stderr=subprocess.STDOUT, + stdin=sys.stdin, + ) as gdb: + while gdb.poll() is None and openocd.poll() is None: + (output, _) = openocd.communicate() + openocd_out += output + + signal.signal(signal.SIGINT, old_sigint) + + # Wait for OpenOCD to shutdown + print("Waiting for OpenOCD to finish...") + if openocd.poll() is None: + try: + # Read the last bit of stdout + (output, _) = openocd.communicate(timeout=3) + openocd_out += output + except subprocess.TimeoutExpired: + # OpenOCD didn't shutdown, kill it + openocd.kill() + + if openocd.returncode != 0: + print("OpenOCD failed to shutdown cleanly: ") + print(openocd_out) - time.sleep(1000) - if not connected: - print(f"Failed to connect to OpenOCD on port {port}") - return +def debug_external(board, port, executable, attach): + """Run GDB against an external gdbserver.""" + gdb_args = create_gdb_args(board, port, executable, attach) - sock.close() + old_sigint = signal.signal(signal.SIGINT, signal.SIG_IGN) - gdb_args = create_gdb_args(board, port, executable) - # Start GDB - gdb = subprocess.Popen( - gdb_args, stdout=sys.stdout, stderr=subprocess.STDOUT, stdin=sys.stdin + subprocess.run( + gdb_args, + stdout=sys.stdout, + stderr=subprocess.STDOUT, + stdin=sys.stdin, + check=True, ) - openocd_out = "" - while gdb.poll() == None and openocd.poll() == None: - (output, _) = openocd.communicate() - openocd_out += output - - # Wait for OpenOCD to shutdown - print("Waiting for OpenOCD to finish...") - if openocd.poll() == None: - try: - # Read the last bit of stdout - (output, _) = openocd.communicate(timeout=3) - openocd_out += output - except subprocess.TimeoutExpired: - # OpenOCD didn't shutdown, kill it - openocd.kill() - - if openocd.returncode != 0: - print("OpenOCD failed to shutdown cleanly: ") - print(openocd_out) + signal.signal(signal.SIGINT, old_sigint) def get_flash_file(board): + """Returns the path of the main output file for the board.""" return ( - pathlib.Path(__file__).parent - / ".." - / "build" - / "zephyr" - / board - / "output" - / "ec.bin" + EC_BASE / "build" / "zephyr" / board / "output" / "ec.bin" ).resolve() def get_executable_file(board): + """Returns the path of the main RO executable file for the board.""" return ( - pathlib.Path(__file__).parent - / ".." - / "build" - / "zephyr" - / board - / "output" - / "zephyr.ro.elf" + EC_BASE / "build" / "zephyr" / board / "output" / "zephyr.ro.elf" ).resolve() def main(): + """Main function.""" parser = argparse.ArgumentParser() parser.add_argument( "--board", @@ -198,8 +245,8 @@ def main(): debug_parser = sub_parsers.add_parser( "debug", - help="Debugs the target EC through GDB, \ - FILE selects the executable to load debug info from, defaults to using the zephyr RO executable", + help="Debugs the target EC through GDB, FILE selects the executable to \ + load debug info from, defaults to using the zephyr RO executable", ) debug_parser.set_defaults(command="debug") debug_parser.add_argument( @@ -209,25 +256,51 @@ def main(): type=int, default=3333, ) + debug_parser.add_argument( + "--external-gdbserver", + "-x", + help="Do not run openocd, use an already running external gdb server", + action="store_true", + ) + debug_parser.add_argument( + "--attach", + "-a", + help="Do not load the binary after starting gdb, attach to the running instance instead", + action="store_true", + ) args = parser.parse_args() # Get the image path if we were given one target_file = None - if args.file != None: + if args.file is not None: target_file = args.file.resolve() if args.command == "flash": image_file = ( - get_flash_file(args.board) if target_file == None else target_file + get_flash_file(args.board) if target_file is None else target_file ) flash(args.interface, args.board, image_file, args.verify) elif args.command == "debug": executable_file = ( get_executable_file(args.board) - if target_file == None + if target_file is None else target_file ) - debug(args.interface, args.board, args.port, executable_file) + if args.external_gdbserver: + debug_external( + args.board, + args.port, + executable_file, + args.attach, + ) + else: + debug( + args.interface, + args.board, + args.port, + executable_file, + args.attach, + ) else: parser.print_usage() diff --git a/util/ectool.cc b/util/ectool.cc index 1f67d271cc..055ac9e4ba 100644 --- a/util/ectool.cc +++ b/util/ectool.cc @@ -9131,37 +9131,6 @@ static int cmd_kbinfo(int argc, char *argv[]) return 0; } -static int cmd_kbid(int argc, char *argv[]) -{ - struct ec_response_keyboard_id response; - int rv; - - if (argc > 1) { - fprintf(stderr, "Too many args\n"); - return -1; - } - - rv = ec_command(EC_CMD_GET_KEYBOARD_ID, 0, NULL, 0, &response, - sizeof(response)); - if (rv < 0) - return rv; - switch (response.keyboard_id) { - case KEYBOARD_ID_UNSUPPORTED: - /* Keyboard ID was not supported */ - printf("Keyboard doesn't support ID\n"); - break; - case KEYBOARD_ID_UNREADABLE: - /* Ghosting ID was detected */ - printf("Reboot and keep hands off the keyboard during" - " next boot-up\n"); - break; - default: - /* Valid keyboard ID value was reported*/ - printf("%x\n", response.keyboard_id); - } - return rv; -} - static int cmd_keyconfig(int argc, char *argv[]) { struct ec_params_mkbp_set_config req; @@ -11497,7 +11466,6 @@ const struct command commands[] = { { "led", cmd_led }, { "lightbar", cmd_lightbar }, { "kbfactorytest", cmd_keyboard_factory_test }, - { "kbid", cmd_kbid }, { "kbinfo", cmd_kbinfo }, { "kbpress", cmd_kbpress }, { "keyconfig", cmd_keyconfig }, diff --git a/util/flash_fp_mcu b/util/flash_fp_mcu index e383186a9f..2d859f3dba 100644 --- a/util/flash_fp_mcu +++ b/util/flash_fp_mcu @@ -524,24 +524,24 @@ config_hatch() { # Examine `cat /sys/kernel/debug/pinctrl/INT34BB:00/gpio-ranges` on a hatch # device to determine gpio number from pin number. - local gpiochip="gpiochip712" - # Support kernel version 4.x, 5.4 and 5.10 during transition to 5.15+ - match_kernel_regex "^((4\..)|(5\.4\.)|(5\.10\.))" && gpiochip="gpiochip200" - readonly GPIO_CHIP="${gpiochip}" - local offset=0 - # Support kernel version 4.x, 5.4 and 5.10 during transition to 5.15+ - # v4.4 has GPIOs that are offset by -512 - match_kernel_regex "^((4\..)|(5\.4\.)|(5\.10\.))" && offset=512 - - # FPMCU RST_ODL is on GPP_A12 = 712 + 12 = 724 - local gpionrst=724 - readonly GPIO_NRST=$(( gpionrst - offset )) - # FPMCU BOOT0 is on GPP_A22 = 712 + 22 = 734 - local gpioboot=734 - readonly GPIO_BOOT0=$(( gpioboot - offset )) - # FP_PWR_EN is on GPP_C11 = 968 + (192 - 181) = 968 + 11 = 979 - local gpiopwren=979 - readonly GPIO_PWREN=$(( gpiopwren - offset )) + local gpiochip_dev_path="*/pci0000\:00/INT34BB\:00/gpio/*" + local gpiobase + if ! gpiobase=$(get_sysfs_gpiochip_base "${gpiochip_dev_path}"); then + echo "Unable to find gpio chip base" + return "${EXIT_PRECONDITION}" + fi + + local GPIO_CHIP="gpiochip${gpiobase}" + + # FPMCU RST_ODL is on GPP_A12 = 12 + local gpionrst=12 + readonly GPIO_NRST=$(( gpionrst + gpiobase )) + # FPMCU BOOT0 is on GPP_A22 = 22 + local gpioboot=22 + readonly GPIO_BOOT0=$(( gpioboot + gpiobase )) + # FP_PWR_EN is on GPP_C11 = 256 + 11 = 267 + local gpiopwren=267 + readonly GPIO_PWREN=$(( gpiopwren + gpiobase )) } config_herobrine() { diff --git a/util/flash_jlink.py b/util/flash_jlink.py index 9f4a55e544..3bfa26bd9c 100755 --- a/util/flash_jlink.py +++ b/util/flash_jlink.py @@ -160,6 +160,8 @@ def flash(jlink_exe, remote, device, interface, cmd_file): "auto", "-autoconnect", "1", + "-NoGui", + "1", "-CommandFile", cmd_file, ] diff --git a/util/kconfig_check.py b/util/kconfig_check.py index 1b67f0c846..48060f6782 100755 --- a/util/kconfig_check.py +++ b/util/kconfig_check.py @@ -2,6 +2,7 @@ # Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. + """Kconfig checker Checks that the .config file provided does not introduce any new ad-hoc CONFIG @@ -21,6 +22,7 @@ Use the -d flag to select the second format. """ import argparse +import glob import os import pathlib import re @@ -118,6 +120,9 @@ a corresponding Kconfig option for Zephyr""" subparsers.add_parser("build", help="Build new list of ad-hoc CONFIGs") subparsers.add_parser("check", help="Check for new ad-hoc CONFIGs") + subparsers.add_parser( + "check_undef", help="Verify #undef directives in ec headers" + ) return parser.parse_args(argv) @@ -285,21 +290,37 @@ class KconfigCheck: List of config and menuconfig options found """ if USE_KCONFIGLIB and try_kconfiglib: - os.environ["srctree"] = srcdir - kconf = kconfiglib.Kconfig( - "Kconfig", - warn=False, - search_paths=search_paths, - allow_empty_macros=True, + os.environ.update( + { + "srctree": srcdir, + "SOC_DIR": "soc", + "ARCH_DIR": "arch", + "BOARD_DIR": "boards/*/*", + "ARCH": "*", + } ) - - # There is always a MODULES config, since kconfiglib is designed for - # linux, but we don't want it - kconfigs = [name for name in kconf.syms if name != "MODULES"] - - if prefix: - re_drop_prefix = re.compile(r"^%s" % prefix) - kconfigs = [re_drop_prefix.sub("", name) for name in kconfigs] + kconfigs = [] + for filename in [ + "Kconfig", + os.path.join(os.environ["ZEPHYR_BASE"], "Kconfig.zephyr"), + ]: + kconf = kconfiglib.Kconfig( + filename, + warn=False, + search_paths=search_paths, + allow_empty_macros=True, + ) + + symbols = [ + node.item.name + for node in kconf.node_iter() + if isinstance(node.item, kconfiglib.Symbol) + ] + + if prefix: + re_drop_prefix = re.compile(r"^%s" % prefix) + symbols = [re_drop_prefix.sub("", name) for name in symbols] + kconfigs += symbols else: kconfigs = [] # Remove the prefix if present @@ -479,6 +500,68 @@ update in your CL: print(f"CONFIG_{config}", file=out) print(f"New list is in {NEW_ALLOWED_FNAME}") + def check_undef( + self, + srcdir, + search_paths, + ): + """Parse the ec header files and find zephyr Kconfigs that are + incorrectly undefined or defined to a default value. + + Args: + srcdir: Source directory to scan for Kconfig files + search_paths: List of project paths to search for Kconfig files, in + addition to the current directory + + Returns: + Exit code: 0 if OK, 1 if a problem was found + """ + kconfigs = set(self.scan_kconfigs(srcdir, "", search_paths)) + + if_re = re.compile(r"^\s*#\s*if(ndef CONFIG_ZEPHYR)?") + endif_re = re.compile(r"^\s*#\s*endif") + modify_config_re = re.compile(r"^\s*#\s*(define|undef)\s+CONFIG_(\S*)") + exit_code = 0 + files_to_check = glob.glob( + os.path.join(srcdir, "include/**/*.h"), recursive=True + ) + files_to_check += glob.glob( + os.path.join(srcdir, "common/**/public/*.h"), recursive=True + ) + files_to_check += glob.glob( + os.path.join(srcdir, "driver/**/*.h"), recursive=True + ) + for filename in files_to_check: + with open(filename, "r") as config_h: + depth = 0 + ignore_depth = 0 + line_count = 0 + for line in config_h.readlines(): + line_count += 1 + line = line.strip("\n") + match = if_re.match(line) + if match: + depth += 1 + if match[1] or ignore_depth > 0: + ignore_depth += 1 + if endif_re.match(line): + if depth > 0: + depth -= 1 + if ignore_depth > 0: + ignore_depth -= 1 + if ignore_depth == 0: + match = modify_config_re.match(line) + if match: + if match[2] in kconfigs: + print( + f"ERROR: Modifying CONFIG_{match[2]} " + "outside of #ifndef CONFIG_ZEPHYR not " + f"allowed at {filename}:{line_count}", + file=sys.stderr, + ) + exit_code = 1 + return exit_code + def main(argv): """Main function""" @@ -505,6 +588,11 @@ def main(argv): use_defines=args.use_defines, search_paths=args.search_path, ) + if args.cmd == "check_undef": + return checker.check_undef( + srcdir=args.srctree, + search_paths=args.search_path, + ) return 2 diff --git a/util/openocd/board/rex.cfg b/util/openocd/board/rex.cfg new file mode 100644 index 0000000000..9c0f2c8153 --- /dev/null +++ b/util/openocd/board/rex.cfg @@ -0,0 +1,7 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +transport select swd + +source [find target/npcx993f.cfg] diff --git a/util/openocd/board/skyrim.cfg b/util/openocd/board/skyrim.cfg index 11f31c22ef..a13e24c3fb 100644 --- a/util/openocd/board/skyrim.cfg +++ b/util/openocd/board/skyrim.cfg @@ -5,7 +5,3 @@ transport select swd source [find target/npcx993f.cfg] - -proc flash_board { image verify } { - flash_target $image $verify -}
\ No newline at end of file diff --git a/util/test_kconfig_check.py b/util/test_kconfig_check.py index e30df416fb..12721cc7ef 100644 --- a/util/test_kconfig_check.py +++ b/util/test_kconfig_check.py @@ -1,6 +1,7 @@ # Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. + """Test for Kconfig checker""" import contextlib @@ -120,6 +121,32 @@ rsource "subdir/Kconfig.wibble" with open(os.path.join(bad_subdir, "Kconfig.bad"), "w") as out: out.write("menuconfig %sBAD_KCONFIG" % PREFIX) + @classmethod + def setup_zephyr_base(cls, zephyr_base): + """Set up some Kconfig files in a directory and subdirs + + Args: + zephyr_base: Directory to write to + """ + with open(os.path.join(zephyr_base, "Kconfig.zephyr"), "w") as out: + out.write( + """config ZCONFIG +\tbool "zephyr kconfig" + +rsource "subdir/Kconfig.wobble" +""" + ) + subdir = os.path.join(zephyr_base, "subdir") + os.mkdir(subdir) + with open(os.path.join(subdir, "Kconfig.wobble"), "w") as out: + out.write("menuconfig WOBBLE_MENU_KCONFIG\n") + + # Add a directory which should be ignored + bad_subdir = os.path.join(subdir, "Kconfig") + os.mkdir(bad_subdir) + with open(os.path.join(bad_subdir, "Kconfig.bad"), "w") as out: + out.write("menuconfig BAD_KCONFIG") + def test_find_kconfigs(self): """Test KconfigCheck.find_kconfigs()""" checker = kconfig_check.KconfigCheck() @@ -133,11 +160,19 @@ rsource "subdir/Kconfig.wibble" """Test KconfigCheck.scan_configs()""" checker = kconfig_check.KconfigCheck() with tempfile.TemporaryDirectory() as srctree: - self.setup_srctree(srctree) - self.assertEqual( - ["MENU_KCONFIG", "MY_KCONFIG"], - checker.scan_kconfigs(srctree, PREFIX), - ) + with tempfile.TemporaryDirectory() as zephyr_path: + self.setup_zephyr_base(zephyr_path) + os.environ["ZEPHYR_BASE"] = str(zephyr_path) + self.setup_srctree(srctree) + self.assertEqual( + [ + "MENU_KCONFIG", + "MY_KCONFIG", + "WOBBLE_MENU_KCONFIG", + "ZCONFIG", + ], + checker.scan_kconfigs(srctree, PREFIX), + ) @classmethod def setup_allowed_and_configs( @@ -166,25 +201,35 @@ rsource "subdir/Kconfig.wibble" self.setup_srctree(srctree) with tempfile.NamedTemporaryFile() as allowed: with tempfile.NamedTemporaryFile() as configs: - self.setup_allowed_and_configs(allowed.name, configs.name) - ( - new_adhoc, - unneeded_adhoc, - updated_adhoc, - ) = checker.check_adhoc_configs( - configs.name, srctree, allowed.name, PREFIX - ) - self.assertEqual(["NEW_ONE"], new_adhoc) - self.assertEqual(["MENU_KCONFIG"], unneeded_adhoc) - self.assertEqual(["OLD_ONE"], updated_adhoc) + with tempfile.TemporaryDirectory() as zephyr_path: + self.setup_zephyr_base(zephyr_path) + os.environ["ZEPHYR_BASE"] = str(zephyr_path) + self.setup_allowed_and_configs( + allowed.name, configs.name + ) + ( + new_adhoc, + unneeded_adhoc, + updated_adhoc, + ) = checker.check_adhoc_configs( + configs.name, srctree, allowed.name, PREFIX + ) + self.assertEqual(["NEW_ONE"], new_adhoc) + self.assertEqual(["MENU_KCONFIG"], unneeded_adhoc) + self.assertEqual(["OLD_ONE"], updated_adhoc) def test_check(self): """Test running the 'check' subcommand""" - with capture_sys_output() as (stdout, stderr): - with tempfile.TemporaryDirectory() as srctree: - self.setup_srctree(srctree) - with tempfile.NamedTemporaryFile() as allowed: - with tempfile.NamedTemporaryFile() as configs: + with capture_sys_output() as ( + stdout, + stderr, + ), tempfile.TemporaryDirectory() as srctree: + with tempfile.NamedTemporaryFile() as allowed: + with tempfile.NamedTemporaryFile() as configs: + with tempfile.TemporaryDirectory() as zephyr_path: + self.setup_srctree(srctree) + self.setup_zephyr_base(zephyr_path) + os.environ["ZEPHYR_BASE"] = str(zephyr_path) self.setup_allowed_and_configs( allowed.name, configs.name ) @@ -228,14 +273,8 @@ rsource "subdir/Kconfig.wibble" # List of things missing from the Kconfig missing = sorted(list(set(adhoc_version) - set(kc_version))) - # Some items are defined in files that are not included - # in all cases, only for particular values of $(ARCH) - self.assertEqual( - [ - "TRAP_UNALIGNED_ACCESS", - ], - missing, - ) + # There should be no differences between adhoc and kconfig versions + self.assertListEqual([], missing) def test_check_unneeded(self): """Test running the 'check' subcommand with unneeded ad-hoc configs""" @@ -244,23 +283,26 @@ rsource "subdir/Kconfig.wibble" self.setup_srctree(srctree) with tempfile.NamedTemporaryFile() as allowed: with tempfile.NamedTemporaryFile() as configs: - self.setup_allowed_and_configs( - allowed.name, configs.name, False - ) - ret_code = kconfig_check.main( - [ - "-c", - configs.name, - "-s", - srctree, - "-a", - allowed.name, - "-p", - PREFIX, - "check", - ] - ) - self.assertEqual(1, ret_code) + with tempfile.TemporaryDirectory() as zephyr_path: + self.setup_zephyr_base(zephyr_path) + os.environ["ZEPHYR_BASE"] = str(zephyr_path) + self.setup_allowed_and_configs( + allowed.name, configs.name, False + ) + ret_code = kconfig_check.main( + [ + "-c", + configs.name, + "-s", + srctree, + "-a", + allowed.name, + "-p", + PREFIX, + "check", + ] + ) + self.assertEqual(1, ret_code) self.assertEqual("", stderr.getvalue()) found = re.findall("(CONFIG_.*)", stdout.getvalue()) self.assertEqual(["CONFIG_MENU_KCONFIG"], found) diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index a9a8e6c4f0..7b77bcf115 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -2,6 +2,22 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. +if(DEFINED CONFIG_PLATFORM_EC AND EXISTS "${EDT_PICKLE}") + message(STATUS "Performing EC specific devicetree checks") + + # Zephyr's gen_defines.py creates an EDT object of the final devicetree, + # saving it as pickle file in the build directory. + set(NAMED_GPIOS_SCRIPT ${PLATFORM_EC}/zephyr/scripts/named_gpios.py) + set(CMD_NAMED_GPIOS ${PYTHON_EXECUTABLE} ${NAMED_GPIOS_SCRIPT} + --zephyr-base ${ZEPHYR_BASE} + --edt-pickle ${EDT_PICKLE} + ) + execute_process(COMMAND ${CMD_NAMED_GPIOS} RESULT_VARIABLE ret) + if(NOT "${ret}" STREQUAL "0") + message(FATAL_ERROR "named_gpios.py failed with return code: ${ret}") + endif() +endif() + if(DEFINED ZMAKE_INCLUDE_DIR) zephyr_include_directories("${ZMAKE_INCLUDE_DIR}") endif() @@ -544,6 +560,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_AOZ1380 "${PLATFORM_EC}/driver/ppc/aoz1380.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_KTU1125 "${PLATFORM_EC}/driver/ppc/ktu1125.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_NX20P3481 + "${PLATFORM_EC}/driver/ppc/nx20p348x.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483 "${PLATFORM_EC}/driver/ppc/nx20p348x.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_RT1739 diff --git a/zephyr/Kconfig.charger b/zephyr/Kconfig.charger index 131f40e4d3..b340bd7da2 100644 --- a/zephyr/Kconfig.charger +++ b/zephyr/Kconfig.charger @@ -544,6 +544,13 @@ config PLATFORM_EC_CHARGER_MAINTAIN_VBAT all conditions, even when AC is not present. This may be necessary to work around quirks of certain charger chips, such as the BD9995X. +config PLATFORM_EC_CHARGER_BYPASS_MODE + bool + help + Select this option if the charger will be used in a bypass mode in + order to pass the input current from AC directly to the system + power rail for efficiency. + config PLATFORM_EC_CHARGER_NARROW_VDC bool help diff --git a/zephyr/Kconfig.ppc b/zephyr/Kconfig.ppc index a6d376159c..c7108e62a8 100644 --- a/zephyr/Kconfig.ppc +++ b/zephyr/Kconfig.ppc @@ -86,6 +86,14 @@ config PLATFORM_EC_USBC_PPC_KTU1125 solution to USB Type-C applications by eliminating the dependence on external components. +config PLATFORM_EC_USBC_PPC_NX20P3481 + bool "NX20P3481 High Voltage Sink/Source Combo Switch" + depends on DT_HAS_NXP_NX20P348X_ENABLED + select PLATFORM_EC_USBC_OCP + help + The NX20P3481 is a product with combined multiple power switches + and a LDO for USB PD application. + config PLATFORM_EC_USBC_PPC_NX20P3483 bool "NX20P3483 High Voltage Sink/Source Combo Switch" default y diff --git a/zephyr/dts/bindings/battery/cosmx,ap20cbl-3.yaml b/zephyr/dts/bindings/battery/cosmx,ap20cbl-3.yaml index 9df929182f..412f67ecab 100644 --- a/zephyr/dts/bindings/battery/cosmx,ap20cbl-3.yaml +++ b/zephyr/dts/bindings/battery/cosmx,ap20cbl-3.yaml @@ -14,9 +14,9 @@ properties: device_name: default: "AP20CBL" ship_mode_reg_addr: - default: 0x00 + default: 0x3A ship_mode_reg_data: - default: [0x0010, 0x0010] + default: [0xC574, 0xC574] # Documentation: b/263692236#comment2 # Manufacturer Access 0x00 # b1: D-FET diff --git a/zephyr/dts/bindings/emul/cros,rt1718s-tcpc-emul.yaml b/zephyr/dts/bindings/emul/cros,rt1718s-tcpc-emul.yaml new file mode 100644 index 0000000000..a8276cc159 --- /dev/null +++ b/zephyr/dts/bindings/emul/cros,rt1718s-tcpc-emul.yaml @@ -0,0 +1,21 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: Zephyr RT1718S Emulator + +compatible: "cros,rt1718s-tcpc-emul" + +include: i2c-device.yaml + +properties: + tcpc-flags: + type: int + default: 0 + description: | + TCPC configuration flags + irq-gpios: + type: phandle-array + required: false + description: | + Interrupt from TCPC diff --git a/zephyr/dts/bindings/usbc/ppc-chip.yaml b/zephyr/dts/bindings/usbc/ppc-chip.yaml index 30f71c9d1a..a4e7ad0ec0 100644 --- a/zephyr/dts/bindings/usbc/ppc-chip.yaml +++ b/zephyr/dts/bindings/usbc/ppc-chip.yaml @@ -9,7 +9,7 @@ properties: type: phandles required: false description: | - GPIO interrupt from PPC + GPIO interrupt from PPC using a named-gpios child node is-alt: type: boolean @@ -17,3 +17,9 @@ properties: description: | If present, this node refers to an altnerate PPC device. The PPC device is not used by default, and must be manually enabled at runtime. + + irq-gpios: + type: phandle-array + required: false + description: | + Interrupt line from the PPC (zephyr standard GPIO format) diff --git a/zephyr/dts/board-overlays/native_posix.dts b/zephyr/dts/board-overlays/native_posix.dts index c8bfe02539..6b18a0ec6f 100644 --- a/zephyr/dts/board-overlays/native_posix.dts +++ b/zephyr/dts/board-overlays/native_posix.dts @@ -13,12 +13,26 @@ compatible = "named-gpios"; entering-rw { - gpios = <&gpio0 1 GPIO_OUTPUT_LOW>; + gpios = <&gpio99 0 GPIO_OUTPUT_LOW>; enum-name = "GPIO_ENTERING_RW"; }; }; -}; -&gpio0 { - ngpios = <2>; + /* + * The GPIO_ENTERING_RW signal is used on nearly every board. + * Allocate a dedicated GPIO controller for this signal to avoid + * conflicts with board tests. + */ + gpio99: gpio@9900 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x9900 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <1>; + }; }; diff --git a/zephyr/emul/CMakeLists.txt b/zephyr/emul/CMakeLists.txt index 77a8de3213..523e1e98b0 100644 --- a/zephyr/emul/CMakeLists.txt +++ b/zephyr/emul/CMakeLists.txt @@ -18,10 +18,12 @@ zephyr_library_sources_ifdef(CONFIG_EMUL_CLOCK_CONTROL emul_clock_control.c) zephyr_library_sources_ifdef(CONFIG_EMUL_COMMON_I2C emul_common_i2c.c) zephyr_library_sources_ifdef(CONFIG_EMUL_CROS_FLASH emul_flash.c) zephyr_library_sources_ifdef(CONFIG_EMUL_ISL923X emul_isl923x.c) +zephyr_library_sources_ifdef(CONFIG_EMUL_CHARGER_ISL9241 emul_isl9241.c) zephyr_library_sources_ifdef(CONFIG_EMUL_KB_RAW emul_kb_raw.c) zephyr_library_sources_ifdef(CONFIG_EMUL_LIS2DW12 emul_lis2dw12.c) zephyr_library_sources_ifdef(CONFIG_EMUL_LN9310 emul_ln9310.c) zephyr_library_sources_ifdef(CONFIG_EMUL_PCT2075 emul_pct2075.c) +zephyr_library_sources_ifdef(CONFIG_EMUL_PPC_NX20P348X emul_nx20p348x.c) zephyr_library_sources_ifdef(CONFIG_EMUL_PPC_SYV682X emul_syv682x.c) zephyr_library_sources_ifdef(CONFIG_EMUL_PS8743 emul_ps8743.c) zephyr_library_sources_ifdef(CONFIG_EMUL_RT9490 emul_rt9490.c) diff --git a/zephyr/emul/Kconfig b/zephyr/emul/Kconfig index b7bfc88aa2..b160e430b2 100644 --- a/zephyr/emul/Kconfig +++ b/zephyr/emul/Kconfig @@ -49,6 +49,26 @@ config EMUL_BC12_DETECT_PI3USB9201 detector/advertiser. The emulator supports reading and writing the 4 I2C registers of the PI3USB9201 using the emulated I2C bus. +config EMUL_CHARGER_ISL9241 + bool "Renesas buck-boost battery charger emulator" + default y + depends on ZTEST && DT_HAS_INTERSIL_ISL9241_ENABLED + select EMUL_COMMON_I2C + help + Enable the ISL9241 emulator. This chip is a configurable buck-boost + battery charger which can communicate over I2C, and utilizes the + emulated I2C bus. + +config EMUL_PPC_NX20P348X + bool "NXP PPC emulator" + default y + depends on ZTEST && DT_HAS_NXP_NX20P348X_ENABLED + select EMUL_COMMON_I2C + help + Enable the NX20P348X emulator, which covers both the NX20P3481 and + NX20P3483. It is also register compatible with the SM5360A. This + emulator makes use of the emulated I2C bus. + config EMUL_PPC_SYV682X bool "Silergy SYV682x PPC emulator" default y diff --git a/zephyr/emul/emul_isl9241.c b/zephyr/emul/emul_isl9241.c new file mode 100644 index 0000000000..2b41230e5b --- /dev/null +++ b/zephyr/emul/emul_isl9241.c @@ -0,0 +1,182 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "charger/chg_isl9241.h" +#include "driver/charger/isl9241.h" +#include "emul/emul_common_i2c.h" +#include "emul/emul_stub_device.h" +#include "util.h" + +#include <zephyr/device.h> +#include <zephyr/logging/log.h> +#include <zephyr/ztest.h> + +#define DT_DRV_COMPAT ISL9241_CHG_COMPAT + +#define LOG_LEVEL CONFIG_I2C_LOG_LEVEL +LOG_MODULE_REGISTER(emul_isl9241); + +/* Device ID sits at the end of the register space (0xFF) */ +#define ISL9241_MAX_REG ISL9241_REG_DEVICE_ID + +struct isl9241_emul_data { + struct i2c_common_emul_data common; + uint16_t regs[ISL9241_MAX_REG + 1]; +}; + +/* Note: registers are all 2 bytes */ +struct isl9241_reg_default { + uint8_t offset; + uint16_t val; +}; + +/* Chip defaults for non-zero registers (spec Rev 5.0, Table 1) */ +struct isl9241_reg_default isl9241_defaults[] = { + /* Note: 3s default here */ + { .offset = ISL9241_REG_MAX_SYSTEM_VOLTAGE, .val = 0x3120 }, + { .offset = ISL9241_REG_ADAPTER_CUR_LIMIT2, .val = 0x05DC }, + { .offset = ISL9241_REG_CONTROL1, .val = 0x0103 }, + { .offset = ISL9241_REG_CONTROL2, .val = 0x6000 }, + { .offset = ISL9241_REG_ADAPTER_CUR_LIMIT1, .val = 0x05DC }, + { .offset = ISL9241_REG_CONTROL6, .val = 0x1FFF }, + { .offset = ISL9241_REG_AC_PROCHOT, .val = 0x0C00 }, + { .offset = ISL9241_REG_DC_PROCHOT, .val = 0x1000 }, + { .offset = ISL9241_REG_OTG_VOLTAGE, .val = 0x0D08 }, + { .offset = ISL9241_REG_OTG_CURRENT, .val = 0x0200 }, + { .offset = ISL9241_REG_VIN_VOLTAGE, .val = 0x0C00 }, + { .offset = ISL9241_REG_CONTROL3, .val = 0x0300 }, + { .offset = ISL9241_REG_MANUFACTURER_ID, .val = 0x0049 }, + { .offset = ISL9241_REG_DEVICE_ID, .val = 0x000E }, +}; + +void isl9241_emul_reset_regs(const struct emul *emul) +{ + struct isl9241_emul_data *data = (struct isl9241_emul_data *)emul->data; + + memset(data->regs, 0, sizeof(data->regs)); + + for (int i = 0; i < ARRAY_SIZE(isl9241_defaults); i++) { + struct isl9241_reg_default def = isl9241_defaults[i]; + + data->regs[def.offset] = def.val; + } +} + +uint16_t isl9241_emul_peek(const struct emul *emul, int reg) +{ + __ASSERT_NO_MSG(IN_RANGE(reg, 0, ISL9241_MAX_REG)); + + struct isl9241_emul_data *data = (struct isl9241_emul_data *)emul->data; + + return data->regs[reg]; +} + +void isl9241_emul_set_vbus(const struct emul *emul, int vbus_mv) +{ + struct isl9241_emul_data *data = (struct isl9241_emul_data *)emul->data; + uint16_t adc_reg; + + if (vbus_mv > 0) + data->regs[ISL9241_REG_INFORMATION2] |= + ISL9241_INFORMATION2_ACOK_PIN; + else + data->regs[ISL9241_REG_INFORMATION2] &= + ~ISL9241_INFORMATION2_ACOK_PIN; + + adc_reg = vbus_mv / ISL9241_VIN_ADC_STEP_MV; + adc_reg <<= ISL9241_VIN_ADC_BIT_OFFSET; + data->regs[ISL9241_REG_VIN_ADC_RESULTS] = adc_reg; +} + +void isl9241_emul_set_vsys(const struct emul *emul, int vsys_mv) +{ + struct isl9241_emul_data *data = (struct isl9241_emul_data *)emul->data; + uint16_t adc_reg; + + adc_reg = vsys_mv / ISL9241_VIN_ADC_STEP_MV; + adc_reg <<= ISL9241_VIN_ADC_BIT_OFFSET; + data->regs[ISL9241_REG_VSYS_ADC_RESULTS] = adc_reg; +} + +static int isl9241_emul_read(const struct emul *emul, int reg, uint8_t *val, + int bytes, void *unused_data) +{ + struct isl9241_emul_data *data = (struct isl9241_emul_data *)emul->data; + + if (!IN_RANGE(reg, 0, ISL9241_MAX_REG)) + return -EINVAL; + + if (!IN_RANGE(bytes, 0, 1)) + return -EINVAL; + + if (bytes == 0) + *val = (uint8_t)(data->regs[reg] & 0xFF); + else + *val = (uint8_t)((data->regs[reg] >> 8) & 0xFF); + + return 0; +} + +static int isl9241_emul_write(const struct emul *emul, int reg, uint8_t val, + int bytes, void *unused_data) +{ + struct isl9241_emul_data *data = (struct isl9241_emul_data *)emul->data; + + if (!IN_RANGE(reg, 0, ISL9241_MAX_REG)) + return -EINVAL; + + if (!IN_RANGE(bytes, 1, 2)) + return -EINVAL; + + if (bytes == 1) + data->regs[reg] = val & 0xFF; + else + data->regs[reg] |= val << 8; + + return 0; +} + +static int isl9241_emul_init(const struct emul *emul, + const struct device *parent) +{ + struct isl9241_emul_data *data = (struct isl9241_emul_data *)emul->data; + struct i2c_common_emul_data *common_data = &data->common; + + i2c_common_emul_init(common_data); + i2c_common_emul_set_read_func(common_data, isl9241_emul_read, NULL); + i2c_common_emul_set_write_func(common_data, isl9241_emul_write, NULL); + + isl9241_emul_reset_regs(emul); + + return 0; +} + +#define INIT_ISL9241_EMUL(n) \ + static struct i2c_common_emul_cfg common_cfg_##n; \ + static struct isl9241_emul_data isl9241_emul_data_##n; \ + static struct i2c_common_emul_cfg common_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &isl9241_emul_data_##n.common, \ + .addr = DT_INST_REG_ADDR(n) \ + }; \ + EMUL_DT_INST_DEFINE(n, isl9241_emul_init, &isl9241_emul_data_##n, \ + &common_cfg_##n, &i2c_common_emul_api, NULL) + +DT_INST_FOREACH_STATUS_OKAY(INIT_ISL9241_EMUL) + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +static void isl9241_emul_reset_rule_before(const struct ztest_unit_test *test, + void *data) +{ + ARG_UNUSED(test); + ARG_UNUSED(data); + +#define ISL9241_EMUL_RESET_RULE_BEFORE(n) \ + isl9241_emul_reset_regs(EMUL_DT_GET(DT_DRV_INST(n))) + + DT_INST_FOREACH_STATUS_OKAY(ISL9241_EMUL_RESET_RULE_BEFORE); +} +ZTEST_RULE(isl9241_emul_reset, isl9241_emul_reset_rule_before, NULL); diff --git a/zephyr/emul/emul_nx20p348x.c b/zephyr/emul/emul_nx20p348x.c new file mode 100644 index 0000000000..e7b45531d6 --- /dev/null +++ b/zephyr/emul/emul_nx20p348x.c @@ -0,0 +1,204 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "driver/ppc/nx20p348x.h" +#include "emul/emul_common_i2c.h" +#include "emul/emul_stub_device.h" +#include "usbc/ppc_nx20p348x.h" +#include "usbc_ppc.h" +#include "util.h" + +#include <zephyr/device.h> +#include <zephyr/devicetree/gpio.h> +#include <zephyr/drivers/emul.h> +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/logging/log.h> +#include <zephyr/ztest.h> + +#define DT_DRV_COMPAT NX20P348X_COMPAT + +#define LOG_LEVEL CONFIG_I2C_LOG_LEVEL +LOG_MODULE_REGISTER(emul_nx20p348x); + +/* + * Device control reg marks the end of defined regs for the NX20P3483 (0x0B) + */ +#define NX20P348X_MAX_REG NX20P348X_DEVICE_CONTROL_REG + +struct nx20p348x_emul_data { + struct i2c_common_emul_data common; + struct gpio_dt_spec irq_gpio; + uint8_t regs[NX20P348X_MAX_REG + 1]; +}; + +struct nx20p348x_reg_default { + uint8_t offset; + uint8_t val; +}; + +/* Chip defaults for non-zero registers (spec Rev 0.4 Table 9) */ +struct nx20p348x_reg_default nx20p348x_defaults[] = { + { .offset = NX20P348X_DEVICE_ID_REG, .val = 0x09 }, + { .offset = NX20P348X_OVLO_THRESHOLD_REG, .val = 0x01 }, + { .offset = NX20P348X_HV_SRC_OCP_THRESHOLD_REG, .val = 0x0B }, + { .offset = NX20P348X_5V_SRC_OCP_THRESHOLD_REG, .val = 0x0B }, +}; + +static void nx20p348x_emul_interrupt_set(const struct emul *emul, int val) +{ + struct nx20p348x_emul_data *data = + (struct nx20p348x_emul_data *)emul->data; + + int res = gpio_emul_input_set(data->irq_gpio.port, data->irq_gpio.pin, + val); + __ASSERT_NO_MSG(res == 0); +} + +void nx20p348x_emul_reset_regs(const struct emul *emul) +{ + struct nx20p348x_emul_data *data = + (struct nx20p348x_emul_data *)emul->data; + + memset(data->regs, 0, sizeof(data->regs)); + + for (int i = 0; i < ARRAY_SIZE(nx20p348x_defaults); i++) { + struct nx20p348x_reg_default def = nx20p348x_defaults[i]; + + data->regs[def.offset] = def.val; + } + nx20p348x_emul_interrupt_set(emul, 1); +} + +uint8_t nx20p348x_emul_peek(const struct emul *emul, int reg) +{ + __ASSERT_NO_MSG(IN_RANGE(reg, 0, NX20P348X_MAX_REG)); + + struct nx20p348x_emul_data *data = + (struct nx20p348x_emul_data *)emul->data; + + return data->regs[reg]; +} + +void nx20p348x_emul_set_interrupt1(const struct emul *emul, uint8_t val) +{ + struct nx20p348x_emul_data *data = + (struct nx20p348x_emul_data *)emul->data; + + data->regs[NX20P348X_INTERRUPT1_REG] = val; + + nx20p348x_emul_interrupt_set(emul, 0); +} + +static int nx20p348x_emul_read(const struct emul *emul, int reg, uint8_t *val, + int bytes, void *unused_data) +{ + struct nx20p348x_emul_data *data = + (struct nx20p348x_emul_data *)emul->data; + + if (!IN_RANGE(reg, 0, NX20P348X_MAX_REG)) + return -EINVAL; + + if (bytes != 0) + return -EINVAL; + + *val = data->regs[reg]; + + /* Interrupt registers are clear on read and de-assert when serviced */ + if (reg == NX20P348X_INTERRUPT1_REG || + reg == NX20P348X_INTERRUPT2_REG) { + data->regs[reg] = 0; + + if (data->regs[NX20P348X_INTERRUPT1_REG] == 0 && + data->regs[NX20P348X_INTERRUPT2_REG] == 0) + nx20p348x_emul_interrupt_set(emul, 1); + } + + return 0; +} + +static int nx20p348x_emul_write(const struct emul *emul, int reg, uint8_t val, + int bytes, void *unused_data) +{ + struct nx20p348x_emul_data *data = + (struct nx20p348x_emul_data *)emul->data; + + if (!IN_RANGE(reg, 0, NX20P348X_MAX_REG)) + return -EINVAL; + + if (bytes != 1) + return -EINVAL; + + data->regs[reg] = val; + + if (IS_ENABLED(CONFIG_PLATFORM_EC_USBC_PPC_NX20P3481) && + reg == NX20P348X_SWITCH_CONTROL_REG) { + bool enabled = val & NX20P3481_SWITCH_CONTROL_HVSNK; + + /* Update our status as if we turned on/off Vbus sinking */ + if (enabled) + data->regs[NX20P348X_SWITCH_STATUS_REG] |= + NX20P348X_SWITCH_STATUS_HVSNK; + else + data->regs[NX20P348X_SWITCH_STATUS_REG] &= + ~NX20P348X_SWITCH_STATUS_HVSNK; + + /* Do the same for sourcing */ + enabled = val & NX20P3481_SWITCH_CONTROL_5VSRC; + if (enabled) + data->regs[NX20P348X_SWITCH_STATUS_REG] |= + NX20P348X_SWITCH_STATUS_5VSRC; + else + data->regs[NX20P348X_SWITCH_STATUS_REG] &= + ~NX20P348X_SWITCH_STATUS_5VSRC; + } + + return 0; +} + +static int nx20p348x_emul_init(const struct emul *emul, + const struct device *parent) +{ + struct nx20p348x_emul_data *data = + (struct nx20p348x_emul_data *)emul->data; + struct i2c_common_emul_data *common_data = &data->common; + + i2c_common_emul_init(common_data); + i2c_common_emul_set_read_func(common_data, nx20p348x_emul_read, NULL); + i2c_common_emul_set_write_func(common_data, nx20p348x_emul_write, NULL); + + nx20p348x_emul_reset_regs(emul); + + return 0; +} + +#define INIT_NX20P348X_EMUL(n) \ + static struct nx20p348x_emul_data nx20p348x_emul_data_##n; \ + static struct i2c_common_emul_cfg common_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &nx20p348x_emul_data_##n.common, \ + .addr = DT_INST_REG_ADDR(n) \ + }; \ + static struct nx20p348x_emul_data nx20p348x_emul_data_##n = { \ + .irq_gpio = GPIO_DT_SPEC_INST_GET_OR(n, irq_gpios, {}), \ + }; \ + EMUL_DT_INST_DEFINE(n, nx20p348x_emul_init, &nx20p348x_emul_data_##n, \ + &common_cfg_##n, &i2c_common_emul_api, NULL) + +DT_INST_FOREACH_STATUS_OKAY(INIT_NX20P348X_EMUL) + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +static void nx20p348x_emul_reset_rule_before(const struct ztest_unit_test *test, + void *data) +{ + ARG_UNUSED(test); + ARG_UNUSED(data); + +#define NX20P348X_EMUL_RESET_RULE_BEFORE(n) \ + nx20p348x_emul_reset_regs(EMUL_DT_GET(DT_DRV_INST(n))) + + DT_INST_FOREACH_STATUS_OKAY(NX20P348X_EMUL_RESET_RULE_BEFORE); +} +ZTEST_RULE(nx20p348x_emul_reset, nx20p348x_emul_reset_rule_before, NULL); diff --git a/zephyr/emul/tcpc/CMakeLists.txt b/zephyr/emul/tcpc/CMakeLists.txt index 25031ad658..0dcc5c7743 100644 --- a/zephyr/emul/tcpc/CMakeLists.txt +++ b/zephyr/emul/tcpc/CMakeLists.txt @@ -12,3 +12,4 @@ zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI_PARTNER_SRC emul_tcpci_partner_sr zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI_PARTNER_FAULTY_EXT emul_tcpci_partner_faulty_ext.c) zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI_PARTNER_VPD emul_tcpci_partner_vpd.c) zephyr_library_sources_ifdef(CONFIG_EMUL_ANX7447 emul_anx7447.c) +zephyr_library_sources_ifdef(CONFIG_EMUL_RT1718S emul_rt1718s.c) diff --git a/zephyr/emul/tcpc/Kconfig b/zephyr/emul/tcpc/Kconfig index 147f267113..e1738e6381 100644 --- a/zephyr/emul/tcpc/Kconfig +++ b/zephyr/emul/tcpc/Kconfig @@ -7,6 +7,7 @@ menuconfig EMUL_TCPCI default y depends on DT_HAS_CROS_TCPCI_GENERIC_EMUL_ENABLED depends on I2C_EMUL + select EMUL_COMMON_I2C help Enable the TCPCI emulator. This driver uses the emulated I2C bus. It is used to test tcpci code. It supports reads and writes to all @@ -47,6 +48,15 @@ config EMUL_PS8XXX for TCPCI emulator. PS8XXX specific API is available in zephyr/include/emul/tcpc/emul_ps8xxx.h +config EMUL_RT1718S + bool "Richtek rt1718s emulator" + default y + depends on DT_HAS_CROS_RT1718S_TCPC_EMUL_ENABLED + help + Enable emulator for rt1718s of TCPM. This emulator is extension for + TCPCI emulator. rt1718s specific API is available in + zephyr/include/emul/tcpc/emul_rt1718s.h + config EMUL_TCPCI_PARTNER_SRC bool "USB-C source device emulator" select EMUL_TCPCI_PARTNER_COMMON diff --git a/zephyr/emul/tcpc/emul_rt1718s.c b/zephyr/emul/tcpc/emul_rt1718s.c new file mode 100644 index 0000000000..0d180da44a --- /dev/null +++ b/zephyr/emul/tcpc/emul_rt1718s.c @@ -0,0 +1,445 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "driver/tcpm/rt1718s.h" +#include "emul/emul_common_i2c.h" +#include "emul/emul_stub_device.h" +#include "emul/tcpc/emul_rt1718s.h" +#include "emul/tcpc/emul_tcpci.h" +#include "tcpm/tcpci.h" + +#include <zephyr/device.h> +#include <zephyr/drivers/emul.h> +#include <zephyr/drivers/i2c.h> +#include <zephyr/drivers/i2c_emul.h> +#include <zephyr/logging/log.h> +#include <zephyr/sys/slist.h> +#include <zephyr/ztest.h> + +#define DT_DRV_COMPAT cros_rt1718s_tcpc_emul + +LOG_MODULE_REGISTER(rt1718s_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); + +static bool is_valid_rt1718s_page1_register(int reg) +{ + switch (reg) { + case RT1718S_SYS_CTRL1: + case RT1718S_SYS_CTRL2: + case RT1718S_SYS_CTRL3: + case RT1718S_RT_MASK6: + case RT1718S_VCON_CTRL3: + case 0xCF: /* FOD function */ + case RT1718S_RT_MASK1: + case RT1718S_VCONN_CONTROL_2: + case RT1718S_FRS_CTRL2: + case RT1718S_VBUS_CTRL_EN: + return true; + default: + return false; + } +} + +static bool is_valid_rt1718s_page2_register(int reg) +{ + int combined_reg_address = (RT1718S_RT2 << 8) | reg; + + switch (combined_reg_address) { + case RT1718S_RT2_SBU_CTRL_01: + case RT1718S_RT2_BC12_SNK_FUNC: + case RT1718S_RT2_DPDM_CTR1_DPDM_SET: + case RT1718S_RT2_VBUS_VOL_CTRL: + case RT1718S_VCON_CTRL4: + return true; + default: + return false; + } +} + +static void add_access_history_entry(struct rt1718s_emul_data *rt1718s_data, + int reg, uint8_t val) +{ + struct set_reg_entry_t *entry; + + entry = malloc(sizeof(struct set_reg_entry_t)); + entry->reg = reg; + entry->val = val; + entry->access_time = k_uptime_get(); + sys_slist_append(&rt1718s_data->set_private_reg_history, &entry->node); +} + +/** + * @brief Function called on reset + * + * @param emul Pointer to rt1718s emulator + */ +static void rt1718s_emul_reset(const struct emul *emul) +{ + struct rt1718s_emul_data *rt1718s_data = emul->data; + + tcpci_emul_reset(emul); + memset(rt1718s_data->reg_page1, 0, sizeof(rt1718s_data->reg_page1)); + memset(rt1718s_data->reg_page2, 0, sizeof(rt1718s_data->reg_page2)); +} + +int rt1718s_emul_get_reg(const struct emul *emul, int reg, uint16_t *val) +{ + uint8_t reg_addr; + uint8_t *reference_page; + struct rt1718s_emul_data *rt1718s_data = emul->data; + + if ((reg >> 8) == RT1718S_RT2) { + reg_addr = reg & 0xFF; + reference_page = rt1718s_data->reg_page2; + } else if (is_valid_rt1718s_page1_register(reg)) { + reg_addr = reg; + reference_page = rt1718s_data->reg_page1; + } else { + return tcpci_emul_get_reg(emul, reg, val); + } + + if (val == NULL || reg_addr > RT1718S_EMUL_REG_COUNT_PER_PAGE) { + return -EINVAL; + } + + *val = reference_page[reg_addr]; + return EC_SUCCESS; +} + +void rt1718s_emul_reset_set_history(const struct emul *emul) +{ + struct _snode *iter_node; + struct set_reg_entry_t *iter_entry; + struct rt1718s_emul_data *rt1718s_data = emul->data; + + while (!sys_slist_is_empty(&(rt1718s_data->set_private_reg_history))) { + iter_node = + sys_slist_get(&(rt1718s_data->set_private_reg_history)); + iter_entry = SYS_SLIST_CONTAINER(iter_node, iter_entry, node); + free(iter_entry); + } +} + +void rt1718s_emul_set_device_id(const struct emul *emul, uint16_t device_id) +{ + switch (device_id) { + case RT1718S_DEVICE_ID_ES1: + case RT1718S_DEVICE_ID_ES2: + tcpci_emul_set_reg(emul, TCPC_REG_BCD_DEV, device_id); + break; + default: + break; + } +} + +static int copy_reg_byte(uint8_t *dst, uint8_t src_reg[], int reg, + int read_bytes) +{ + if ((reg + read_bytes) > RT1718S_EMUL_REG_COUNT_PER_PAGE || + dst == NULL) { + return -EIO; + } + *(dst + read_bytes) = src_reg[reg + read_bytes]; + return EC_SUCCESS; +} + +/** + * @brief Function called for each byte of read message from rt1718s emulator + * + * @param emul Pointer to I2C rt1718s emulator + * @param reg First byte of last write message + * @param val Pointer where byte to read should be stored + * @param bytes Number of bytes already read + * + * @return 0 on success + * @return -EIO on invalid read request + */ +static int rt1718s_emul_read_byte(const struct emul *emul, int reg, + uint8_t *val, int read_bytes) +{ + struct rt1718s_emul_data *rt1718s_data = emul->data; + int current_page = rt1718s_data->current_page; + + rt1718s_data->current_page = 1; + + if (current_page == 2) { + if (reg != RT1718S_RT2) { + LOG_ERR("The page2 register is selected in previous " + "transaction, but the following read is to reg " + "%x instead of %x", + reg, RT1718S_RT2); + return -EIO; + } + return copy_reg_byte(val, rt1718s_data->reg_page2, + rt1718s_data->current_page2_register, + read_bytes); + } else if (is_valid_rt1718s_page1_register(reg)) { + return copy_reg_byte(val, rt1718s_data->reg_page1, reg, + read_bytes); + } else { + return tcpci_emul_read_byte(emul, reg, val, read_bytes); + } +} + +/** + * @brief Function called for each byte of read message from rt1718s emulator + * + * @param emul Pointer to I2C rt1718s emulator + * @param reg First byte of last write message + * @param val Pointer where byte to read should be stored + * @param bytes Number of bytes already read + * + * @return 0 on success + * @return -EIO on invalid read request + */ + +static int rt1718s_emul_write_byte_page1(const struct emul *emul, int reg, + uint8_t val, int bytes) +{ + struct rt1718s_emul_data *rt1718s_data = emul->data; + + if (bytes == 2) { + /* + * All register in page1 only has 1 byte, so the write should + * not more than 2 bytes. + */ + return -EIO; + } + rt1718s_data->reg_page1[reg] = val; + add_access_history_entry(rt1718s_data, reg, val); + + /* Software reset is triggered */ + if (reg == RT1718S_SYS_CTRL3 && (val & RT1718S_SWRESET_MASK)) { + rt1718s_emul_reset(emul); + } + + return EC_SUCCESS; +} + +static int rt1718s_emul_write_byte_page2(const struct emul *emul, int reg, + uint8_t val, int bytes) +{ + struct rt1718s_emul_data *rt1718s_data = emul->data; + + if (bytes == 1) { + rt1718s_data->current_page = 2; + + if (!is_valid_rt1718s_page2_register(val)) { + return -EIO; + } + rt1718s_data->current_page2_register = val; + } else if (bytes == 2) { + rt1718s_data->reg_page2[rt1718s_data->current_page2_register] = + val; + add_access_history_entry( + rt1718s_data, + (reg << 8) | rt1718s_data->current_page2_register, val); + } else { + /* + * All register in page2 only has 1 byte, so the write should + * not more than 3 bytes. + */ + return -EIO; + } + + return EC_SUCCESS; +} + +/** + * @brief Function called for each byte of write message to rt1718s emulator + * + * @param emul Pointer to I2C rt1718s emulator + * @param reg First byte of write message + * @param val Received byte of write message + * @param bytes Number of bytes already received + * + * @return 0 on success + * @return -EIO on invalid write request + */ +static int rt1718s_emul_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) +{ + struct rt1718s_emul_data *rt1718s_data = emul->data; + + if (reg == RT1718S_RT2) { + return rt1718s_emul_write_byte_page2(emul, reg, val, bytes); + } + + if (rt1718s_data->current_page == 2) { + return -EIO; + } + + if (is_valid_rt1718s_page1_register(reg)) { + return rt1718s_emul_write_byte_page1(emul, reg, val, bytes); + } else { + return tcpci_emul_write_byte(emul, reg, val, bytes); + } +} + +/** + * @brief Wrapper function of rt1718s_emul_write_byte which reset the current + * register page if encounter error. + * + * @param emul Pointer to I2C rt1718s emulator + * @param reg First byte of write message + * @param val Received byte of write message + * @param bytes Number of bytes already received + * + * @return 0 on success + * @return -EIO on invalid write request + */ +static int rt1718s_emul_write_byte_wrapper(const struct emul *emul, int reg, + uint8_t val, int bytes) +{ + int err; + struct rt1718s_emul_data *rt1718s_data = emul->data; + + err = rt1718s_emul_write_byte(emul, reg, val, bytes); + if (err != EC_SUCCESS) { + rt1718s_data->current_page = 1; + } + return err; +} + +/** + * @brief Function called on the end of write message to rt1718s emulator + * + * @param emul Pointer to I2C rt1718s emulator + * @param reg Register which is written + * @param msg_len Length of handled I2C message + * + * @return 0 on success + * @return -EIO on error + */ +static int rt1718s_emul_finish_write(const struct emul *emul, int reg, + int msg_len) +{ + struct rt1718s_emul_data *rt1718s_data = emul->data; + + if (rt1718s_data->current_page == 2) { + /* msg_len = 2 is selecting the register in page2. */ + if (msg_len != 2) { + rt1718s_data->current_page = 1; + } + return EC_SUCCESS; + } else if (is_valid_rt1718s_page1_register(reg)) { + return EC_SUCCESS; + } else { + return tcpci_emul_handle_write(emul, reg, msg_len); + } +} + +/** + * @brief Get currently accessed register. + * + * @param emul Pointer to I2C rt1718s emulator + * @param reg First byte of last write message + * @param bytes Number of bytes already handled from current message + * @param read If currently handled is read message + * + * @return Currently accessed register + */ +static int rt1718s_emul_access_reg(const struct emul *emul, int reg, int bytes, + bool read) +{ + struct rt1718s_emul_data *rt1718s_data = emul->data; + + if (rt1718s_data->current_page == 2) { + return rt1718s_data->current_page2_register; + } else { + return reg; + } +} + +/** + * @brief Set up a new rt1718s emulator + * + * This should be called for each rt1718s device that needs to be + * emulated. + * + * @param emul Emulation information + * @param parent Device to emulate + * + * @return 0 indicating success (always) + */ +static int rt1718s_emul_init(const struct emul *emul, + const struct device *parent) +{ + struct tcpc_emul_data *tcpc_data = emul->data; + struct rt1718s_emul_data *rt1718s_data = emul->data; + struct tcpci_ctx *tcpci_ctx = tcpc_data->tcpci_ctx; + const struct device *i2c_dev; + + i2c_dev = parent; + + tcpci_ctx->common.write_byte = rt1718s_emul_write_byte_wrapper; + tcpci_ctx->common.finish_write = rt1718s_emul_finish_write; + tcpci_ctx->common.read_byte = rt1718s_emul_read_byte; + tcpci_ctx->common.access_reg = rt1718s_emul_access_reg; + + tcpci_emul_i2c_init(emul, i2c_dev); + + rt1718s_emul_reset(emul); + sys_slist_init(&(rt1718s_data->set_private_reg_history)); + + return 0; +} + +static int i2c_rt1718s_emul_transfer(const struct emul *target, + struct i2c_msg *msgs, int num_msgs, + int addr) +{ + struct tcpc_emul_data *tcpc_data = target->data; + struct tcpci_ctx *tcpci_ctx = tcpc_data->tcpci_ctx; + + return i2c_common_emul_transfer_workhorse(target, &tcpci_ctx->common, + &tcpc_data->i2c_cfg, msgs, + num_msgs, addr); +} + +struct i2c_emul_api i2c_rt1718s_emul_api = { + .transfer = i2c_rt1718s_emul_transfer, +}; + +#define RT1718S_EMUL(n) \ + static uint8_t tcpci_emul_tx_buf_##n[128]; \ + static struct tcpci_emul_msg tcpci_emul_tx_msg_##n = { \ + .buf = tcpci_emul_tx_buf_##n, \ + }; \ + static struct tcpci_ctx tcpci_ctx##n = { \ + .tx_msg = &tcpci_emul_tx_msg_##n, \ + .error_on_ro_write = true, \ + .error_on_rsvd_write = true, \ + .irq_gpio = GPIO_DT_SPEC_INST_GET_OR(n, irq_gpios, {}), \ + }; \ + static struct rt1718s_emul_data rt1718s_emul_data_##n = { \ + .embedded_tcpc_emul_data = { \ + .tcpci_ctx = &tcpci_ctx##n, \ + .i2c_cfg = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)),\ + .data = &tcpci_ctx##n.common,\ + .addr = DT_INST_REG_ADDR(n), \ + } \ + }, \ + .current_page = 1, \ + }; \ + EMUL_DT_INST_DEFINE(n, rt1718s_emul_init, &rt1718s_emul_data_##n, \ + NULL, &i2c_rt1718s_emul_api, NULL) + +DT_INST_FOREACH_STATUS_OKAY(RT1718S_EMUL) + +#ifdef CONFIG_ZTEST_NEW_API +#define RT1718S_EMUL_RESET_RULE_BEFORE(n) \ + rt1718s_emul_reset(EMUL_DT_GET(DT_DRV_INST(n))) +static void rt1718s_emul_reset_rule_before(const struct ztest_unit_test *test, + void *data) +{ + ARG_UNUSED(test); + ARG_UNUSED(data); + DT_INST_FOREACH_STATUS_OKAY(RT1718S_EMUL_RESET_RULE_BEFORE); +} +ZTEST_RULE(RT1718S_emul_reset, rt1718s_emul_reset_rule_before, NULL); +#endif /* CONFIG_ZTEST_NEW_API */ + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); diff --git a/zephyr/include/emul/emul_isl9241.h b/zephyr/include/emul/emul_isl9241.h new file mode 100644 index 0000000000..2838687731 --- /dev/null +++ b/zephyr/include/emul/emul_isl9241.h @@ -0,0 +1,36 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef EMUL_ISL9241_H +#define EMUL_ISL9241_H + +#include <zephyr/drivers/emul.h> + +/** + * Peek an internal register value + * + * @param emul - ISL9241 emulator data + * @param reg - which register to peek + * @return register contents + */ +uint16_t isl9241_emul_peek(const struct emul *emul, int reg); + +/** + * Fake a Vbus voltage presence + * + * @param emul - ISL9241 emulator data + * @param vbus_mv - desired Vbus mV to set + */ +void isl9241_emul_set_vbus(const struct emul *emul, int vbus_mv); + +/** + * Fake a specific Vsys voltage + * + * @param emul - ISL9241 emulator data + * @param vsys_mv - desired Vsys mV to set + */ +void isl9241_emul_set_vsys(const struct emul *emul, int vsys_mv); + +#endif diff --git a/zephyr/include/emul/emul_nx20p348x.h b/zephyr/include/emul/emul_nx20p348x.h new file mode 100644 index 0000000000..a8435ee530 --- /dev/null +++ b/zephyr/include/emul/emul_nx20p348x.h @@ -0,0 +1,27 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef EMUL_NX20P348X_H +#define EMUL_NX20P348X_H + +#include <zephyr/drivers/emul.h> + +/** + * Peek an internal register value + * + * @param emul - NX20P383X emulator data + * @param reg - which register to peek + * @return register contents + */ +uint8_t nx20p348x_emul_peek(const struct emul *emul, int reg); + +/** + * Set an interrupt in the first interrupt register + * + * @param emul - NX20P383X emulator data + * @param val - value for interrupt register + */ +void nx20p348x_emul_set_interrupt1(const struct emul *emul, uint8_t val); +#endif diff --git a/zephyr/include/emul/tcpc/emul_rt1718s.h b/zephyr/include/emul/tcpc/emul_rt1718s.h new file mode 100644 index 0000000000..09614bc02c --- /dev/null +++ b/zephyr/include/emul/tcpc/emul_rt1718s.h @@ -0,0 +1,64 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __EMUL_RT1718S_H +#define __EMUL_RT1718S_H + +#include "emul/tcpc/emul_tcpci.h" + +#include <zephyr/drivers/emul.h> +#include <zephyr/sys/slist.h> + +#define RT1718S_EMUL_REG_COUNT_PER_PAGE 0x100 + +struct set_reg_entry_t { + struct _snode node; + int reg; + uint16_t val; + int64_t access_time; +}; + +/** Run-time data used by the emulator */ +struct rt1718s_emul_data { + /* Composite with the tcpc_emul_data to extend it. */ + struct tcpc_emul_data embedded_tcpc_emul_data; + uint8_t reg_page1[RT1718S_EMUL_REG_COUNT_PER_PAGE]; + uint8_t reg_page2[RT1718S_EMUL_REG_COUNT_PER_PAGE]; + uint8_t current_page; + uint8_t current_page2_register; + struct _slist set_private_reg_history; +}; + +/** + * @brief Getting each byte of register from rt1718s emulator + * + * @param emul Pointer to I2C rt1718s emulator + * @param reg First byte of last write message + * @param val Pointer where byte to read should be stored + * + * @return 0 on success + * @return -EINVAL when register is out of range defined in rt1718s private + * register or val is NULL + */ +int rt1718s_emul_get_reg(const struct emul *emul, int reg, uint16_t *val); + +/** + * @brief Reset the register set history + * + * @param emul Pointer to I2C rt1718s emulator + * + */ +void rt1718s_emul_reset_set_history(const struct emul *emul); + +/** + * @brief Set the device id of + * + * @param emul Pointer to I2C rt1718s emulator + * @param device_id the 16 bits device id + * + */ +void rt1718s_emul_set_device_id(const struct emul *emul, uint16_t device_id); + +#endif /* __EMUL_RT1718S_H */ diff --git a/zephyr/program/brya/BUILD.py b/zephyr/program/brya/BUILD.py index 9991335ca7..6395cbc68b 100644 --- a/zephyr/program/brya/BUILD.py +++ b/zephyr/program/brya/BUILD.py @@ -33,6 +33,7 @@ def register_npcx9_variant( # Project-specific KConfig customization. *extra_kconfig_files, ], + inherited_from=["brya"], ) diff --git a/zephyr/program/brya/i2c.dts b/zephyr/program/brya/i2c.dts index b87a53f600..8dbacc2119 100644 --- a/zephyr/program/brya/i2c.dts +++ b/zephyr/program/brya/i2c.dts @@ -136,7 +136,7 @@ * "named-gpios". This is the Zephyr preferred style, * the "named-gpios" node will be dealt with at a later date. */ - irq-gpios = <&gpioe 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; nct38xx-dev = <&nct3808_0_P1 &nct3808_0_P2>; label = "NCT3808_ALERT_1"; }; diff --git a/zephyr/program/corsola/BUILD.py b/zephyr/program/corsola/BUILD.py index f145953e0d..d0ef4132bc 100644 --- a/zephyr/program/corsola/BUILD.py +++ b/zephyr/program/corsola/BUILD.py @@ -27,6 +27,7 @@ def register_corsola_project( here / f"{chip_kconfig}_program.conf", here / project_name / "project.conf", ], + inherited_from=["corsola"], ) diff --git a/zephyr/program/corsola/ite_interrupts.dtsi b/zephyr/program/corsola/ite_interrupts.dtsi index b99effb9eb..d3f718ec8c 100644 --- a/zephyr/program/corsola/ite_interrupts.dtsi +++ b/zephyr/program/corsola/ite_interrupts.dtsi @@ -44,7 +44,7 @@ int_ap_in_rst: ap_in_rst { irq-pin = <&ap_sysrst_odl_r>; flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; + handler = "chipset_warm_reset_interrupt"; }; int_ap_wdtrst: ap_wdtrst { irq-pin = <&ap_ec_wdtrst_l>; diff --git a/zephyr/program/corsola/npcx_interrupts.dtsi b/zephyr/program/corsola/npcx_interrupts.dtsi index 130f4501dd..c59d4b257e 100644 --- a/zephyr/program/corsola/npcx_interrupts.dtsi +++ b/zephyr/program/corsola/npcx_interrupts.dtsi @@ -48,7 +48,7 @@ int_ap_in_rst: ap_in_rst { irq-pin = <&ap_sysrst_odl_r>; flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; + handler = "chipset_warm_reset_interrupt"; }; int_ap_wdtrst: ap_wdtrst { irq-pin = <&ap_ec_wdtrst_l>; diff --git a/zephyr/program/geralt/BUILD.py b/zephyr/program/geralt/BUILD.py index f41948506a..cc4c2b1946 100644 --- a/zephyr/program/geralt/BUILD.py +++ b/zephyr/program/geralt/BUILD.py @@ -17,6 +17,7 @@ def register_geralt_project( here / "program.conf", here / project_name / "project.conf", ], + inherited_from=["geralt"], ) diff --git a/zephyr/program/herobrine/BUILD.py b/zephyr/program/herobrine/BUILD.py index 0bee6ffe2a..302262fc21 100644 --- a/zephyr/program/herobrine/BUILD.py +++ b/zephyr/program/herobrine/BUILD.py @@ -21,6 +21,7 @@ def register_variant( # Project-specific KConfig customization. here / project_name / "project.conf", ], + inherited_from=["herobrine"], ) diff --git a/zephyr/program/intelrvp/BUILD.py b/zephyr/program/intelrvp/BUILD.py index 7a79480a61..32a2eb5e97 100644 --- a/zephyr/program/intelrvp/BUILD.py +++ b/zephyr/program/intelrvp/BUILD.py @@ -37,6 +37,7 @@ def register_intelrvp_project( zephyr_board=chip, dts_overlays=dts_overlays, kconfig_files=kconfig_files, + inherited_from=["intelrvp"], ) diff --git a/zephyr/program/intelrvp/mtlrvp/mtlrvpp_mchp/gpio.dts b/zephyr/program/intelrvp/mtlrvp/mtlrvpp_mchp/gpio.dts index 2c8c925a26..d351bb87f3 100644 --- a/zephyr/program/intelrvp/mtlrvp/mtlrvpp_mchp/gpio.dts +++ b/zephyr/program/intelrvp/mtlrvp/mtlrvpp_mchp/gpio.dts @@ -62,8 +62,24 @@ gpios = <&gpio_140_176 14 GPIO_INPUT>; enum-name = "GPIO_AC_PRESENT"; }; /* GPIO156 */ + + /* + * Note - the Intel boards implement their own handlers + * for tcpc_get_alert_status(). These handlers use + * gpio_get_level(), which returns the raw state of the pin, + * ignoring the GPIO_ACTIVE_LOW flag. + * + * However, the interrupt pin is shared with the upstream + * driver gpio_nct38xx_alert.c, which does use the logical + * level of the pin and requires that the signal is active low. + * + * Mark the signal active low here as well which ensures there + * is no conflict between the gpio_pin_configure_dt() run by + * the named-gpios driver and the gpio_nct38xx_alert.c driver. + */ usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - gpios = <&gpio_140_176 3 GPIO_INPUT>; + gpios = <&gpio_140_176 3 (GPIO_INPUT | \ + GPIO_ACTIVE_LOW)>; }; /* GPIO143 */ /* NOTE: Netname is USBC_TCPC_PPC_ALRT_P0 */ usb_c0_c1_tcpc_rst_odl: usb-c0-c1-tcpc-rst-odl { diff --git a/zephyr/program/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts b/zephyr/program/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts index 77b4cf0573..8dbb684b56 100644 --- a/zephyr/program/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts +++ b/zephyr/program/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts @@ -61,8 +61,22 @@ gpios = <&gpio0 2 GPIO_INPUT>; enum-name = "GPIO_AC_PRESENT"; }; - usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { - gpios = <&gpio4 0 GPIO_INPUT>; + /* + * Note - the Intel boards implement their own handlers + * for tcpc_get_alert_status(). These handlers use + * gpio_get_level(), which returns the raw state of the pin, + * ignoring the GPIO_ACTIVE_LOW flag. + * + * However, the interrupt pin is shared with the upstream + * driver gpio_nct38xx_alert.c, which does use the logical + * level of the pin and requires that the signal is active low. + * + * Mark the signal active low here as well which ensures there + * is no conflict between the gpio_pin_configure_dt() run by + * the named-gpios driver and the gpio_nct38xx_alert.c driver. + */ + usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { + gpios = <&gpio4 0 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; }; /* NOTE: Netname is USBC_TCPC_PPC_ALRT_P0 */ usb_c0_c1_tcpc_rst_odl: usb-c0-c1-tcpc-rst-odl { diff --git a/zephyr/program/myst/BUILD.py b/zephyr/program/myst/BUILD.py new file mode 100644 index 0000000000..27e4009c1c --- /dev/null +++ b/zephyr/program/myst/BUILD.py @@ -0,0 +1,30 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +"""Define zmake projects for myst.""" + + +def register_myst_project( + project_name, +): + """Register a variant of myst.""" + register_npcx_project( + project_name=project_name, + zephyr_board="npcx9m7f", + dts_overlays=[ + here / project_name / "project.overlay", + ], + kconfig_files=[ + # Common to all projects. + here / "program.conf", + # Project-specific KConfig customization. + here / project_name / "project.conf", + ], + inherited_from=["myst"], + ) + + +register_myst_project( + project_name="myst", +) diff --git a/zephyr/program/myst/CMakeLists.txt b/zephyr/program/myst/CMakeLists.txt new file mode 100644 index 0000000000..c339dbeef7 --- /dev/null +++ b/zephyr/program/myst/CMakeLists.txt @@ -0,0 +1,21 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.20.5) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") + + +zephyr_library_sources("src/common.c") +zephyr_library_sources("src/power_signals.c") + +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC + "src/usb_pd_policy.c" + "src/usbc_config.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_COMMON "src/led.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_AMD_STT "src/stt.c") + +if(DEFINED CONFIG_BOARD_MYST) + project(myst) + add_subdirectory(myst) +endif() diff --git a/zephyr/program/myst/Kconfig b/zephyr/program/myst/Kconfig new file mode 100644 index 0000000000..db33f73668 --- /dev/null +++ b/zephyr/program/myst/Kconfig @@ -0,0 +1,15 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +config BOARD_MYST + bool "Google Myst Board" + help + Build Google Myst reference board. This board uses an AMD SoC + and NPCX9 EC + +module = MYST +module-str = Myst board-specific code +source "subsys/logging/Kconfig.template.log_config" + +source "Kconfig.zephyr" diff --git a/zephyr/program/myst/adc.dtsi b/zephyr/program/myst/adc.dtsi new file mode 100644 index 0000000000..613d57e8ab --- /dev/null +++ b/zephyr/program/myst/adc.dtsi @@ -0,0 +1,60 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros/thermistor/thermistor.dtsi> + +/ { + temp_charger_thermistor: charger-thermistor { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_temp_chg>; + }; + + temp_memory_thermistor: memory-thermistor { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_temp_mem>; + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + temp_sensor_charger: charger-thermistor { + temp_host_high = <100>; + temp_host_halt = <105>; + temp_host_release_high = <80>; + sensor = <&temp_charger_thermistor>; + }; + + temp_sensor_memory: memory-thermistor { + temp_host_high = <100>; + temp_host_halt = <105>; + temp_host_release_high = <80>; + power-good-pin = <&gpio_pg_pwr_s5>; + sensor = <&temp_memory_thermistor>; + }; + + temp_sensor_cpu: cpu { + temp_host_high = <100>; + temp_host_halt = <105>; + temp_host_release_high = <80>; + temp_fan_off = <60>; + temp_fan_max = <90>; + power-good-pin = <&gpio_pg_pcore_s0_r_od>; + sensor = <&temp_cpu>; + }; + + }; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_chan0_gp45 + &adc0_chan1_gp44>; + pinctrl-names = "default"; +}; + +&thermistor_3V3_30K9_47K_4050B { + status = "okay"; +}; diff --git a/zephyr/program/myst/fan.dtsi b/zephyr/program/myst/fan.dtsi new file mode 100644 index 0000000000..3e725ff4f3 --- /dev/null +++ b/zephyr/program/myst/fan.dtsi @@ -0,0 +1,39 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + fans { + compatible = "cros-ec,fans"; + + fan0: fan_0 { + pwms = <&pwm0 0 PWM_KHZ(25) PWM_POLARITY_NORMAL>; + rpm_min = <3000>; + rpm_start = <3000>; + rpm_max = <5000>; + tach = <&tach1>; + pgood_gpio = <&gpio_pg_groupc_s0_od>; + }; + }; +}; + +/* Tachometer for fan speed measurement */ +&tach1 { + status = "okay"; + pinctrl-0 = <&ta1_1_in_gp40>; + pinctrl-names = "default"; + port = <NPCX_TACH_PORT_A>; /* port-A is selected */ + sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */ + pulses-per-round = <2>; /* number of pulses per round of encoder */ +}; + +&pwm0_gpc3 { + drive-open-drain; +}; + +&pwm0 { + status = "okay"; + pinctrl-0 = <&pwm0_gpc3>; + pinctrl-names = "default"; +}; diff --git a/zephyr/program/myst/generated.dtsi b/zephyr/program/myst/generated.dtsi new file mode 100644 index 0000000000..0e5ed5d944 --- /dev/null +++ b/zephyr/program/myst/generated.dtsi @@ -0,0 +1,235 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * This file is auto-generated - do not edit! + */ + +/ { + + named-adc-channels { + compatible = "named-adc-channels"; + + adc_temp_chg: temp_chg { + enum-name = "ADC_TEMP_SENSOR_CHARGER"; + io-channels = <&adc0 0>; + }; + adc_temp_mem: temp_mem { + enum-name = "ADC_TEMP_SENSOR_MEMORY"; + io-channels = <&adc0 1>; + }; + }; + + named-gpios { + compatible = "named-gpios"; + + gpio_3axis_int_l: 3axis_int_l { + gpios = <&gpioa 2 GPIO_INPUT_PULL_UP>; + }; + gpio_6axis_int_l: 6axis_int_l { + gpios = <&gpioa 0 GPIO_INPUT_PULL_UP>; + }; + gpio_acok_od: acok_od { + gpios = <&gpio0 0 GPIO_INPUT>; + enum-name = "GPIO_AC_PRESENT"; + }; + gpio_ccd_mode_odl: ccd_mode_odl { + gpios = <&gpiob 7 GPIO_ODR_LOW>; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + gpio_ec_bat_pres_odl: ec_bat_pres_odl { + gpios = <&gpio9 3 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + gpio_ec_c0_retimer_int_odl: ec_c0_retimer_int_odl { + gpios = <&gpio9 6 GPIO_INPUT_PULL_UP>; + }; + gpio_ec_c0_retimer_rst_l: ec_c0_retimer_rst_l { + gpios = <&gpiof 4 GPIO_OUTPUT>; + }; + gpio_ec_c1_retimer_int_odl: ec_c1_retimer_int_odl { + gpios = <&gpioa 6 GPIO_INPUT>; + }; + gpio_ec_c1_retimer_rst_odl: ec_c1_retimer_rst_odl { + gpios = <&gpio0 3 GPIO_ODR_LOW>; + }; + gpio_ec_disable_disp_bl: ec_disable_disp_bl { + gpios = <&gpiob 1 GPIO_OUTPUT>; + enum-name = "GPIO_ENABLE_BACKLIGHT"; + }; + gpio_ec_fan1_speed: ec_fan1_speed { + gpios = <&gpio4 0 GPIO_INPUT>; + }; + gpio_ec_fan2_speed: ec_fan2_speed { + gpios = <&gpio7 3 GPIO_INPUT>; + }; + gpio_ec_gsc_packet_mode_odl: ec_gsc_packet_mode_odl { + gpios = <&gpioc 0 GPIO_ODR_LOW>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + gpio_ec_kso_02_inv: ec_kso_02_inv { + gpios = <&gpio1 7 (GPIO_OUTPUT | GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_KBD_KSO2"; + }; + gpio_ec_mech_pwr_btn_odl: ec_mech_pwr_btn_odl { + gpios = <&gpiod 2 GPIO_INPUT>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + gpio_ec_prochot_odl: ec_prochot_odl { + gpios = <&gpiod 4 GPIO_ODR_LOW>; + enum-name = "GPIO_CPU_PROCHOT"; + }; + gpio_ec_soc_int: ec_soc_int { + gpios = <&gpio6 0 GPIO_OUTPUT>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_ec_soc_pwr_btn_odl: ec_soc_pwr_btn_odl { + gpios = <&gpiob 0 GPIO_ODR_LOW>; + enum-name = "GPIO_PCH_PWRBTN_L"; + }; + gpio_ec_soc_pwr_good: ec_soc_pwr_good { + gpios = <&gpio9 4 GPIO_ODR_HIGH>; + }; + gpio_ec_soc_rsmrst_l: ec_soc_rsmrst_l { + gpios = <&gpioa 5 GPIO_OUTPUT>; + enum-name = "GPIO_PCH_RSMRST_L"; + }; + gpio_ec_soc_wake_odl: ec_soc_wake_odl { + gpios = <&gpiof 0 GPIO_ODR_LOW>; + }; + gpio_ec_sys_rst_l: ec_sys_rst_l { + gpios = <&gpio7 5 GPIO_OUTPUT>; + enum-name = "GPIO_SYS_RESET_L"; + }; + gpio_ec_wp_l: ec_wp_l { + gpios = <&gpioa 7 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_en_kb_bl: en_kb_bl { + gpios = <&gpio7 4 GPIO_OUTPUT>; + enum-name = "GPIO_EN_KEYBOARD_BACKLIGHT"; + }; + gpio_en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus { + gpios = <&gpio6 6 GPIO_OUTPUT>; + }; + gpio_en_pp5000_usb_a1_vbus: en_pp5000_usb_a1_vbus { + gpios = <&gpio8 3 GPIO_OUTPUT>; + }; + gpio_en_pwr_pcore_s0: en_pwr_pcore_s0 { + gpios = <&gpioe 2 GPIO_OUTPUT>; + }; + gpio_en_pwr_s0: en_pwr_s0 { + gpios = <&gpioe 5 GPIO_OUTPUT>; + }; + gpio_en_pwr_s5: en_pwr_s5 { + gpios = <&gpiod 7 GPIO_OUTPUT>; + enum-name = "GPIO_EN_PWR_A"; + }; + gpio_en_pwr_z1: en_pwr_z1 { + gpios = <&gpio8 5 GPIO_OUTPUT>; + }; + gpio_en_usb_a1_retimer: en_usb_a1_retimer { + gpios = <&gpio3 5 GPIO_OUTPUT>; + }; + gpio_en_usb_c0_tcpc_vbsnk_l: en_usb_c0_tcpc_vbsnk_l { + gpios = <&gpioc 5 GPIO_ODR_LOW>; + }; + gpio_lid_open: lid_open { + gpios = <&gpio0 1 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + }; + gpio_pg_groupc_s0_od: pg_groupc_s0_od { + gpios = <&gpio9 7 GPIO_INPUT>; + }; + gpio_pg_lpddr5_s3_od: pg_lpddr5_s3_od { + gpios = <&gpioe 1 GPIO_INPUT>; + }; + gpio_pg_pcore_s0_r_od: pg_pcore_s0_r_od { + gpios = <&gpiof 1 GPIO_INPUT>; + enum-name = "GPIO_S0_PGOOD"; + }; + gpio_pg_ppvar_mem_od: pg_ppvar_mem_od { + gpios = <&gpio7 6 GPIO_INPUT>; + }; + gpio_pg_pwr_s5: pg_pwr_s5 { + gpios = <&gpiod 5 GPIO_INPUT>; + }; + gpio_pg_vddq_mem_od: pg_vddq_mem_od { + gpios = <&gpioa 4 GPIO_INPUT_PULL_UP>; + }; + gpio_slp_s3_l: slp_s3_l { + gpios = <&gpio6 1 GPIO_INPUT>; + enum-name = "GPIO_PCH_SLP_S3_L"; + }; + gpio_slp_s5_l: slp_s5_l { + gpios = <&gpio7 2 GPIO_INPUT>; + enum-name = "GPIO_PCH_SLP_S5_L"; + }; + gpio_soc_alert_ec_odl: soc_alert_ec_odl { + gpios = <&gpiod 3 GPIO_INPUT>; + }; + gpio_soc_thermtrip_r_odl: soc_thermtrip_r_odl { + gpios = <&gpio9 5 GPIO_INPUT>; + }; + gpio_soc_usbc_pd_int: soc_usbc_pd_int { + gpios = <&gpioa 3 GPIO_INPUT>; + }; + gpio_tablet_mode: tablet_mode { + gpios = <&gpioc 1 GPIO_INPUT>; + enum-name = "GPIO_TABLET_MODE_L"; + }; + gpio_usb_a1_retimer_rst_l: usb_a1_retimer_rst_l { + gpios = <&gpio3 2 GPIO_OUTPUT>; + }; + gpio_usb_c0_c1_fault_odl: usb_c0_c1_fault_odl { + gpios = <&gpioa 1 GPIO_INPUT_PULL_UP>; + }; + gpio_usb_c0_frs_alert_od: usb_c0_frs_alert_od { + gpios = <&gpioc 6 GPIO_INPUT>; + }; + gpio_usb_c0_hpd: usb_c0_hpd { + gpios = <&gpio6 2 GPIO_OUTPUT>; + enum-name = "GPIO_USB_C0_DP_HPD"; + }; + gpio_usb_c0_ppc_int_odl: usb_c0_ppc_int_odl { + gpios = <&gpio6 7 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_USB_C0_PPC_INT_ODL"; + }; + gpio_usb_c0_ppc_rst_l: usb_c0_ppc_rst_l { + gpios = <&gpioe 0 GPIO_OUTPUT>; + }; + gpio_usb_c0_sbu_flip: usb_c0_sbu_flip { + gpios = <&gpio0 2 GPIO_ODR_LOW>; + }; + gpio_usb_c0_tcpc_int_odl: usb_c0_tcpc_int_odl { + gpios = <&gpio3 7 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_USB_C0_TCPC_INT_ODL"; + }; + gpio_usb_c1_frs_alert_od: usb_c1_frs_alert_od { + gpios = <&gpioc 7 GPIO_INPUT>; + }; + gpio_usb_c1_hpd: usb_c1_hpd { + gpios = <&gpio6 3 GPIO_OUTPUT>; + enum-name = "GPIO_USB_C1_DP_HPD"; + }; + gpio_usb_c1_ppc_int_odl: usb_c1_ppc_int_odl { + gpios = <&gpio7 0 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_USB_C1_PPC_INT_ODL"; + }; + gpio_usb_c1_tcpc_int_odl: usb_c1_tcpc_int_odl { + gpios = <&gpio3 4 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_USB_C1_TCPC_INT_ODL"; + }; + gpio_voldn_btn_odl: voldn_btn_odl { + gpios = <&gpio4 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + gpio_volup_btn_odl: volup_btn_odl { + gpios = <&gpio4 3 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_UP_L"; + }; + }; +}; + +&adc0 { + status = "okay"; +}; diff --git a/zephyr/program/myst/gpio.dtsi b/zephyr/program/myst/gpio.dtsi new file mode 100644 index 0000000000..4980b066f0 --- /dev/null +++ b/zephyr/program/myst/gpio.dtsi @@ -0,0 +1,52 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + aliases { + gpio-wp = &gpio_ec_wp_l; + /* There is no CBI WP on myst... remove this ASAP */ + gpio-cbi-wp = &gpio_usb_c0_sbu_flip; + gpio-kbd-kso2 = &gpio_ec_kso_02_inv; + }; +}; + +/* PSL input pads */ +&psl_in1_gpd2 { + /* MECH_PWR_BTN_ODL */ + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; +}; + +&psl_in2_gp00 { + /* ACOK_OD */ + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; +}; + +&psl_in4_gp02 { + /* LID_OPEN */ + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; +}; + +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in4_gp02>; +}; + +/* host interface */ +&espi0 { + status = "okay"; + pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; + pinctrl-names = "default"; +}; + +/* Required node label that is named differently on Myst */ +gpio_ec_pch_wake_odl: &gpio_ec_soc_wake_odl {}; +gpio_slp_s0_l: &gpio_slp_s3_l { + alias = "GPIO_PCH_SLP_S0_L"; +}; diff --git a/zephyr/program/myst/i2c.dtsi b/zephyr/program/myst/i2c.dtsi new file mode 100644 index 0000000000..58ba31911b --- /dev/null +++ b/zephyr/program/myst/i2c.dtsi @@ -0,0 +1,246 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + + #include <dt-bindings/usb_pd_tcpm.h> + #include <dt-bindings/usbc_mux.h> + +/ { + aliases { + i2c-0 = &i2c0_0; + i2c-1 = &i2c1_0; + i2c-2 = &i2c2_0; + i2c-3 = &i2c3_0; + i2c-4 = &i2c4_1; + i2c-5 = &i2c5_0; + i2c-6 = &i2c6_0; + i2c-7 = &i2c7_0; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + i2c_tcpc0: tcpc0 { + i2c-port = <&i2c0_0>; + enum-names = "I2C_PORT_TCPC0"; + }; + + i2c_tcpc1: tcpc1 { + i2c-port = <&i2c1_0>; + enum-names = "I2C_PORT_TCPC1"; + }; + + battery { + i2c-port = <&i2c2_0>; + remote-port = <0>; + enum-names = "I2C_PORT_BATTERY"; + }; + + usb-mux { + i2c-port = <&i2c3_0>; + enum-names = "I2C_PORT_USB_MUX"; + }; + + i2c_charger: charger { + i2c-port = <&i2c4_1>; + enum-names = "I2C_PORT_CHARGER"; + }; + + eeprom { + i2c-port = <&i2c5_0>; + enum-names = "I2C_PORT_EEPROM"; + }; + + i2c_sensor: sensor { + i2c-port = <&i2c6_1>; + enum-names = "I2C_PORT_SENSOR"; + }; + + i2c_soc_thermal: soc-thermal { + i2c-port = <&i2c7_0>; + enum-names = "I2C_PORT_THERMAL_AP"; + }; + }; + + +}; + +&i2c0_0 { + status = "okay"; + label = "I2C_TCPC0"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; + pinctrl-names = "default"; + + tcpc_port0: rt1716@70 { + compatible = "richtek,rt1716"; + reg = <0x70>; + tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; + /* TBD */ + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; + }; + + ppc_port0: ktu1125@78 { + compatible = "kinetic,ktu1125"; + status = "okay"; + reg = <0x78>; + }; +}; + +&i2c_ctrl0 { + status = "okay"; +}; + +&i2c1_0 { + status = "okay"; + label = "I2C_TCPC1"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; + pinctrl-names = "default"; + + bc12_port1: rt1718s-bc12@40 { + compatible = "richtek,rt1718s-bc12"; + status = "okay"; + reg = <0x40>; + }; + + tcpc_port1: rt1718s-tcpc@40 { + compatible = "richtek,rt1718s-tcpc"; + reg = <0x40>; + tcpc-flags = <( + TCPC_FLAGS_ALERT_OD | + TCPC_FLAGS_CONTROL_VCONN | + TCPC_FLAGS_CONTROL_FRS)>; + /* a duplicate of the <&gpio_usb_c1_tcpc_int_odl> node in + * "named-gpios". This is the Zephyr preferred style, + * the "named-gpios" node will be dealt with at a later date. + */ + irq-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; + }; + + ppc_port1: nx20p348x@71 { + compatible = "nxp,nx20p348x"; + status = "okay"; + reg = <0x71>; + }; + + /* TODO: add SKU-B DB b/275610001 */ +}; + +&i2c_ctrl1 { + status = "okay"; +}; + +&i2c2_0 { + status = "okay"; + label = "I2C_BATTERY"; + clock-frequency = <I2C_BITRATE_STANDARD>; + pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; + pinctrl-names = "default"; +}; + +&i2c_ctrl2 { + status = "okay"; +}; + +&i2c3_0 { + status = "okay"; + label = "I2C_USB_MUX"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; + pinctrl-names = "default"; + + amd_fp6_port0: amd_fp6@5c { + compatible = "amd,usbc-mux-amd-fp6"; + status = "okay"; + reg = <0x5c>; + }; + amd_fp6_port1: amd_fp6@52 { + compatible = "amd,usbc-mux-amd-fp6"; + status = "okay"; + reg = <0x52>; + }; +}; + +&i2c_ctrl3 { + status = "okay"; +}; + +&i2c4_1 { + status = "okay"; + label = "I2C_CHARGER"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c4_1_sda_scl_gpf2_f3>; + pinctrl-names = "default"; + + charger: isl9241@9 { + compatible = "intersil,isl9241"; + status = "okay"; + reg = <0x9>; + }; +}; + +&i2c_ctrl4 { + status = "okay"; +}; + +&i2c5_0 { + status = "okay"; + label = "I2C_EEPROM"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c5_0_sda_scl_gp33_36>; + pinctrl-names = "default"; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; +}; + +&i2c_ctrl5 { + status = "okay"; +}; + +&i2c6_1 { + status = "okay"; + label = "I2C_SENSOR"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c6_1_sda_scl_gpe3_e4>; + pinctrl-names = "default"; + + soc_pct2075: soc-pct2075@48 { + compatible = "nxp,pct2075"; + reg = <0x48>; + }; + + amb_pct2075: amb-pct2075@4f { + compatible = "nxp,pct2075"; + reg = <0x4f>; + }; +}; + +&i2c_ctrl6 { + status = "okay"; +}; + +&i2c7_0 { + status = "okay"; + label = "I2C_THERMAL_AP"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; + pinctrl-names = "default"; + + temp_cpu: cpu@4c { + compatible = "amd,sb-tsi"; + reg = <0x4c>; + }; +}; + +&i2c_ctrl7 { + status = "okay"; +}; diff --git a/zephyr/program/myst/interrupts.dtsi b/zephyr/program/myst/interrupts.dtsi new file mode 100644 index 0000000000..eb2c9aec92 --- /dev/null +++ b/zephyr/program/myst/interrupts.dtsi @@ -0,0 +1,106 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + gpio-interrupts { + compatible = "cros-ec,gpio-interrupts"; + + int_lid_open: lid_open { + irq-pin = <&gpio_lid_open>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "lid_interrupt"; + }; + int_ac_present: ac_present { + irq-pin = <&gpio_acok_od>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "extpower_interrupt"; + }; + int_power_button: power_button { + irq-pin = <&gpio_ec_mech_pwr_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_button_interrupt"; + }; + int_slp_s3: slp_s3 { + irq-pin = <&gpio_slp_s3_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "baseboard_en_pwr_s0"; + }; + int_slp_s5: slp_s5 { + irq-pin = <&gpio_slp_s5_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "baseboard_set_en_pwr_s3"; + }; + int_s5_pgood: s5_pgood { + irq-pin = <&gpio_pg_pwr_s5>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "baseboard_s5_pgood"; + }; + int_pg_groupc_s0: pg_groupc_s0 { + irq-pin = <&gpio_pg_groupc_s0_od>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "baseboard_set_en_pwr_pcore"; + }; + int_pg_lpddr_s3: pg_lpddr_s3 { + irq-pin = <&gpio_pg_lpddr5_s3_od>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "baseboard_set_en_pwr_pcore"; + }; + int_s0_pgood: s0_pgood { + irq-pin = <&gpio_pg_groupc_s0_od>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "baseboard_s0_pgood"; + }; + int_soc_thermtrip: soc_thermtrip { + irq-pin = <&gpio_soc_thermtrip_r_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "baseboard_soc_thermtrip"; + }; + int_volume_up: volume_up { + irq-pin = <&gpio_volup_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_volume_down: volume_down { + irq-pin = <&gpio_voldn_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_usb_c0_c1_sbu_fault: c0_c1_sbu_fault { + irq-pin = <&gpio_usb_c0_c1_fault_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "sbu_fault_interrupt"; + }; + int_usb_c0_ppc: usb_c0_ppc { + irq-pin = <&gpio_usb_c0_ppc_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "ppc_interrupt"; + }; + int_usb_c1_ppc: usb_c1_ppc { + irq-pin = <&gpio_usb_c1_ppc_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "ppc_interrupt"; + }; + int_usb_pd_soc: usb_pd_soc { + irq-pin = <&gpio_ec_c0_retimer_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_pd_soc_interrupt"; + }; + int_lid_accel: lid_accel { + irq-pin = <&gpio_3axis_int_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "bma4xx_interrupt"; + }; + int_accel_gyro: accel_gyro { + irq-pin = <&gpio_6axis_int_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "bmi3xx_interrupt"; + }; + int_prochot: prochot { + irq-pin = <&gpio_ec_prochot_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "throttle_ap_prochot_input_interrupt"; + }; + }; +}; diff --git a/zephyr/program/myst/keyboard.dtsi b/zephyr/program/myst/keyboard.dtsi new file mode 100644 index 0000000000..79cf33d4fc --- /dev/null +++ b/zephyr/program/myst/keyboard.dtsi @@ -0,0 +1,48 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + kblight { + compatible = "cros-ec,kblight-pwm"; + pwms = <&pwm1 0 PWM_HZ(100) PWM_POLARITY_NORMAL>; + }; +}; + +&pwm1 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm1_gpc2>; + pinctrl-names = "default"; +}; + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = < + &ksi0_gp31 + &ksi1_gp30 + &ksi2_gp27 + &ksi3_gp26 + &ksi4_gp25 + &ksi5_gp24 + &ksi6_gp23 + &ksi7_gp22 + &kso00_gp21 + &kso01_gp20 + &kso03_gp16 + &kso04_gp15 + &kso05_gp14 + &kso06_gp13 + &kso07_gp12 + &kso08_gp11 + &kso09_gp10 + &kso10_gp07 + &kso11_gp06 + &kso12_gp05 + &kso13_gp04 + &kso14_gp82 + >; + pinctrl-names = "default"; +}; diff --git a/zephyr/program/myst/myst.csv b/zephyr/program/myst/myst.csv new file mode 100644 index 0000000000..7296853547 --- /dev/null +++ b/zephyr/program/myst/myst.csv @@ -0,0 +1,69 @@ +Signal Name,Pin Number,Type,Enum +USB_C0_PPC_RST_L,F4,OUTPUT, +USB_C0_TCPC_INT_ODL,C1,INPUT_L,GPIO_USB_C0_TCPC_INT_ODL +USB_C0_PPC_INT_ODL,J3,INPUT_L,GPIO_USB_C0_PPC_INT_ODL +USB_C0_C1_FAULT_ODL,L12,INPUT_PU, +USB_C0_HPD,H2,OUTPUT,GPIO_USB_C0_DP_HPD +SOC_USBC_PD_INT,K12,INPUT, +USB_C1_TCPC_INT_ODL,B2,INPUT_L,GPIO_USB_C1_TCPC_INT_ODL +USB_C1_PPC_INT_ODL,J4,INPUT_L,GPIO_USB_C1_PPC_INT_ODL +USB_C1_HPD,J2,OUTPUT,GPIO_USB_C1_DP_HPD +EC_FAN1_PWM,G9,PWM, +EC_FAN1_SPEED,E5,INPUT, +EC_FAN2_PWM,H10,PWM, +EC_FAN2_SPEED,G5,INPUT, +EC_PWM_KB_BL,G8,PWM, +EC_PWM_LED_CHRG_L,K5,PWM_INVERT, +EC_PWM_LED_FULL_L,L9,PWM_INVERT, +EC_BAT_PRES_ODL,E11,INPUT,GPIO_BATT_PRES_ODL +CCD_MODE_ODL,J7,OUTPUT_ODL,GPIO_CCD_MODE_ODL +EC_GSC_PACKET_MODE_ODL,H8,OUTPUT_ODL,GPIO_PACKET_MODE_EN +3AXIS_INT_L,F12,INPUT_PU, +6AXIS_INT_L,G11,INPUT_PU, +TABLET_MODE,H9,INPUT,GPIO_TABLET_MODE_L +VOLUP_BTN_ODL,E2,INPUT_PU,GPIO_VOLUME_UP_L +VOLDN_BTN_ODL,D3,INPUT_PU,GPIO_VOLUME_DOWN_L +EN_KB_BL,H5,OUTPUT,GPIO_EN_KEYBOARD_BACKLIGHT +EC_SOC_PWR_GOOD,M11,OUTPUT_ODR, +PG_GROUPC_S0_OD,L10,INPUT, +PG_LPDDR5_S3_OD,F3,INPUT, +PG_VDDQ_MEM_OD,H11,INPUT_PU, +PG_PWR_S5,A10,INPUT, +PG_PCORE_S0_R_OD,G3,INPUT,GPIO_S0_PGOOD +EN_PWR_PCORE_S0,A11,OUTPUT, +EN_PWR_S0,A12,OUTPUT, +EN_PWR_S5,H6,OUTPUT,GPIO_EN_PWR_A +SLP_S3_L,K4,INPUT,GPIO_PCH_SLP_S3_L +SLP_S5_L,M4,INPUT,GPIO_PCH_SLP_S5_L +EC_PROCHOT_ODL,A9,OUTPUT_ODL,GPIO_CPU_PROCHOT +SOC_ALERT_EC_ODL,E10,INPUT, +SOC_THERMTRIP_R_ODL,M12,INPUT, +EC_SYS_RST_L,J6,OUTPUT,GPIO_SYS_RESET_L +EC_SOC_RSMRST_L,K11,OUTPUT,GPIO_PCH_RSMRST_L +EC_SOC_INT,G6,OUTPUT,GPIO_EC_INT_L +EC_SOC_WAKE_ODL,D2,OUTPUT_ODL, +EC_SOC_PWR_BTN_ODL,L11,OUTPUT_ODL,GPIO_PCH_PWRBTN_L +EC_DISABLE_DISP_BL,D8,OUTPUT,GPIO_ENABLE_BACKLIGHT +EC_WP_L,J11,INPUT_L, +TEMP_CHG,F2,ADC,ADC_TEMP_SENSOR_CHARGER +TEMP_MEM,E3,ADC,ADC_TEMP_SENSOR_MEMORY +UART_EC_TX_DBG_RX_R,H4,OTHER, +UART_EC_RX_DBG_TX_R,G4,OTHER, +EC_C1_RETIMER_INT_ODL,F11,INPUT, +EC_C1_RETIMER_RST_ODL,D9,OUTPUT_ODL, +EC_C0_RETIMER_INT_ODL,G12,INPUT_PU, +EC_C0_RETIMER_RST_L,E9,OUTPUT, +USB_C0_FRS_ALERT_OD,D10,INPUT, +EN_PP5000_USB_A0_VBUS,G2,OUTPUT, +EN_PP5000_USB_A1_VBUS,D7,OUTPUT, +USB_C0_SBU_FLIP,F7,OUTPUT_ODL, +EN_USB_A1_RETIMER,K2,OUTPUT, +USB_A1_RETIMER_RST_L,E4,OUTPUT, +USB_C1_FRS_ALERT_OD,F10,INPUT, +EN_USB_C0_TCPC_VBSNK_L,H7,OUTPUT_ODL, +ACOK_OD,E7,INPUT,GPIO_AC_PRESENT +LID_OPEN,E6,INPUT,GPIO_LID_OPEN +EC_MECH_PWR_BTN_ODL,G7,INPUT,GPIO_POWER_BUTTON_L +PG_PPVAR_MEM_OD,J5,INPUT, +EN_PWR_Z1,J8,OUTPUT, +EC_KSO_02_INV,B7,OUTPUT_L,GPIO_KBD_KSO2 diff --git a/zephyr/program/myst/myst/CMakeLists.txt b/zephyr/program/myst/myst/CMakeLists.txt new file mode 100644 index 0000000000..9dc79f913e --- /dev/null +++ b/zephyr/program/myst/myst/CMakeLists.txt @@ -0,0 +1,9 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cros_ec_library_include_directories_ifdef(CONFIG_BOARD_MYST include) +zephyr_library_sources( + "src/ppc_config.c" + "src/keyboard.c" +) diff --git a/zephyr/program/myst/myst/led_pins.dtsi b/zephyr/program/myst/myst/led_pins.dtsi new file mode 100644 index 0000000000..29c33f7457 --- /dev/null +++ b/zephyr/program/myst/myst/led_pins.dtsi @@ -0,0 +1,59 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + pwmleds { + compatible = "pwm-leds"; + pwm_y: pwm_y { + pwms = <&pwm2 0 PWM_HZ(100) PWM_POLARITY_INVERTED>; + }; + pwm_w: pwm_w { + pwms = <&pwm3 0 PWM_HZ(100) PWM_POLARITY_INVERTED>; + }; + }; + + pwm-led-pins { + compatible = "cros-ec,pwm-led-pins"; + + color_off: color-off { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pwms = <&pwm_y &pwm_w>; + led-values = <0 0>; + }; + + color_amber: color-amber { + led-color = "LED_AMBER"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_AMBER"; + led-pwms = <&pwm_y &pwm_w>; + led-values = <100 0>; + }; + + color_white: color-white { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_WHITE"; + led-pwms = <&pwm_y &pwm_w>; + led-values = <0 100>; + }; + }; +}; + +/* Amber "battery charging" LED */ +&pwm2 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm3_gp80>; + pinctrl-names = "default"; +}; + +/* White "battery full" LED */ +&pwm3 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm4_gpb6>; + pinctrl-names = "default"; +}; diff --git a/zephyr/program/myst/myst/led_policy.dtsi b/zephyr/program/myst/myst/led_policy.dtsi new file mode 100644 index 0000000000..2215c9fda7 --- /dev/null +++ b/zephyr/program/myst/myst/led_policy.dtsi @@ -0,0 +1,108 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/battery.h> + +/ { + led-colors { + compatible = "cros-ec,led-policy"; + + power-state-charge { + charge-state = "PWR_STATE_CHARGE"; + + color-0 { + led-color = <&color_amber>; + }; + }; + + power-state-discharge-s0 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (> Low, <= Full) */ + batt-lvl = <(BATTERY_LEVEL_LOW + 1) BATTERY_LEVEL_FULL>; + + color-0 { + led-color = <&color_white>; + }; + }; + + power-state-discharge-s0-batt-low { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (>= Empty, <= Low) */ + batt-lvl = <BATTERY_LEVEL_EMPTY BATTERY_LEVEL_LOW>; + + /* White 2 sec, off 1 sec */ + color-0 { + led-color = <&color_white>; + period-ms = <2000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + + power-state-discharge-s3 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S3"; + + /* White 1 sec, off 1 sec */ + color-0 { + led-color = <&color_white>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + + power-state-discharge-s5 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S5"; + + color-0 { + led-color = <&color_off>; + }; + }; + + power-state-error { + charge-state = "PWR_STATE_ERROR"; + + /* Amber 1 sec, off 1 sec */ + color-0 { + led-color = <&color_amber>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + + power-state-near-full { + charge-state = "PWR_STATE_CHARGE_NEAR_FULL"; + + color-0 { + led-color = <&color_white>; + }; + }; + + power-state-forced-idle { + charge-state = "PWR_STATE_FORCED_IDLE"; + + /* Amber 2 sec, White 2 sec */ + color-0 { + led-color = <&color_amber>; + period-ms = <2000>; + }; + color-1 { + led-color = <&color_white>; + period-ms = <2000>; + }; + }; + }; +}; diff --git a/zephyr/program/myst/myst/motionsense.dtsi b/zephyr/program/myst/myst/motionsense.dtsi new file mode 100644 index 0000000000..d2119f4942 --- /dev/null +++ b/zephyr/program/myst/myst/motionsense.dtsi @@ -0,0 +1,136 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/motionsense/utils.h> + + +/ { + aliases { + /* + * motion sense's <>_INT_EVENT is handled + * by alias. Using the alias, each driver creates + * its own <>_INT_EVENT. + */ + bmi3xx-int = &base_accel; + bma4xx-int = &lid_accel; + }; + + /* + * Declare mutexes used by sensor drivers. + * A mutex node is used to create an instance of mutex_t. + * A mutex node is referenced by a sensor node if the + * corresponding sensor driver needs to use the + * instance of the mutex. + */ + motionsense-mutex { + compatible = "cros-ec,motionsense-mutex"; + lid_mutex: lid-mutex { + }; + + mutex_bmi3xx: bmi3xx-mutex { + }; + }; + + /* + * Driver specific data. A driver-specific data can be shared with + * different motion sensors while they are using the same driver. + * + * If a node's compatible starts with "cros-ec,accelgyro-", it is for + * a common structure defined in accelgyro.h. + * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for + * "struct als_drv_data_t" in accelgyro.h + */ + motionsense-sensor-data { + bma4xx_data: bma4xx-drv-data { + compatible = "cros-ec,drvdata-bma4xx"; + status = "okay"; + }; + + bmi3xx_data: bmi3xx-drv-data { + compatible = "cros-ec,drvdata-bmi3xx"; + status = "okay"; + }; + }; + + /* + * List of motion sensors that creates motion_sensors array. + * The nodelabel "lid_accel" and "base_accel" are used to indicate + * motion sensor IDs for lid angle calculation. + */ + motionsense-sensor { + lid_accel: lid-accel { + compatible = "cros-ec,bma4xx"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&lid_mutex>; + port = <&i2c_sensor>; + drv-data = <&bma4xx_data>; + rot-standard-ref = <&lid_rot_ref>; + default-range = <2>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(12500 | ROUND_UP_FLAG)>; + ec-rate = <100>; + }; + ec-s3 { + odr = <(12500 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_accel: base-accel { + compatible = "cros-ec,bmi3xx-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&mutex_bmi3xx>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&bmi3xx_data>; + + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(12500 | ROUND_UP_FLAG)>; + ec-rate = <100>; + }; + ec-s3 { + odr = <(12500 | ROUND_UP_FLAG)>; + }; + }; + }; + + base-gyro { + compatible = "cros-ec,bmi3xx-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&mutex_bmi3xx>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&bmi3xx_data>; + }; + }; + + motionsense-sensor-info { + compatible = "cros-ec,motionsense-sensor-info"; + + /* + * list of GPIO interrupts that have to + * be enabled at initial stage + */ + sensor-irqs = <&int_accel_gyro>; + + /* list of sensors in force mode */ + accel-force-mode-sensors = <&lid_accel>; + }; +}; diff --git a/zephyr/program/myst/myst/project.conf b/zephyr/program/myst/myst/project.conf new file mode 100644 index 0000000000..e223c83db6 --- /dev/null +++ b/zephyr/program/myst/myst/project.conf @@ -0,0 +1,27 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Myst reference-board-specific Kconfig settings. +CONFIG_BOARD_MYST=y + +# CBI WP pin present +CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y + +# Myst is capable of sinking 100W +CONFIG_PLATFORM_EC_PD_MAX_POWER_MW=100000 +CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA=5000 +CONFIG_PLATFORM_EC_PD_MAX_VOLTAGE_MV=20000 + +# Enable alternative charger chip +CONFIG_PLATFORM_EC_CHARGER_RUNTIME_CONFIG=y +CONFIG_PLATFORM_EC_CHARGER_ISL9241=y + +# Battery +CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y + +# Disable BC12 +# CONFIG_PLATFORM_EC_USB_CHARGER=n + +# EC Host Commands +CONFIG_PLATFORM_EC_HOSTCMD_AP_RESET=y diff --git a/zephyr/program/myst/myst/project.overlay b/zephyr/program/myst/myst/project.overlay new file mode 100644 index 0000000000..1bdcd595c7 --- /dev/null +++ b/zephyr/program/myst/myst/project.overlay @@ -0,0 +1,209 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Myst program common DTS includes */ +#include "../adc.dtsi" +#include "../fan.dtsi" +#include "../generated.dtsi" +#include "../gpio.dtsi" +#include "../i2c.dtsi" +#include "../interrupts.dtsi" +#include "../keyboard.dtsi" +#include "../usbc.dtsi" + +/* Myst project DTS includes*/ +#include "led_pins.dtsi" +#include "led_policy.dtsi" +#include "motionsense.dtsi" + +/* Myst overrides follow... */ +/ { + /* battery overrides */ + batteries { + default_battery: lgc_ap19b8m { + compatible = "lgc,ap19b8m", "battery-smart"; + }; + }; + + named-gpios { + /* Unimplemented */ + gpio_ec_entering_rw: ec_entering_rw { + enum-name = "GPIO_ENTERING_RW"; + }; + gpio-s5-pgood { + enum-name = "GPIO_S5_PGOOD"; + }; + pch-sys-prwok { + enum-name = "GPIO_PCH_SYS_PWROK"; + }; + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + soc-pct2075 { + temp_host_high = <100>; + temp_host_halt = <105>; + temp_host_release_high = <80>; + temp_host_release_halt = <80>; + temp_fan_off = <35>; + temp_fan_max = <70>; + power-good-pin = <&gpio_pg_pwr_s5>; + sensor = <&soc_pct2075>; + }; + amb-pct2075 { + power-good-pin = <&gpio_pg_pwr_s5>; + sensor = <&amb_pct2075>; + }; + }; + + /* + * Note this is expected to vary per-board, so we keep it in the overlay + * files. + */ + myst-fw-config { + compatible = "cros-ec,cbi-fw-config"; + + form-factor { + enum-name = "FW_FORM_FACTOR"; + start = <0>; + size = <1>; + + ff-clamshell { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FF_CLAMSHELL"; + value = <0>; + }; + ff-convertible { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FF_CONVERTIBLE"; + value = <1>; + default; + }; + }; + + fingerprint { + enum-name = "FW_FINGERPRINT"; + start = <1>; + size = <2>; + + fp-disabled { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FP_DISABLED"; + value = <0>; + default; + }; + fp-uart { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FP_UART"; + value = <1>; + }; + fp-spi { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FP_SPI"; + value = <2>; + }; + }; + + wlan { + enum-name = "FW_WLAN"; + start = <3>; + size = <2>; + + wlan-mt7922 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_WLAN_MT7922"; + value = <0>; + default; + }; + wlan-mt7925 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_WLAN_MT7925"; + value = <1>; + }; + }; + + wwan { + enum-name = "FW_WWAN"; + start = <5>; + size = <2>; + + wwan-disabled { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_WWAN_DISABLED"; + value = <0>; + default; + }; + wwan-fm101-gl { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_WWAN_FM101_GL"; + value = <1>; + }; + }; + + io-db { + enum-name = "FW_IO_DB"; + start = <7>; + size = <3>; + + io-db-none { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_IO_DB_NONE"; + value = <0>; + default; + }; + io-db-sku-a { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_IO_DB_SKU_A"; + value = <1>; + }; + io-db-sku-b { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_IO_DB_SKU_B"; + value = <2>; + }; + }; + + kb-bl { + enum-name = "FW_KB_BL"; + start = <10>; + size = <1>; + + kb-bl-disabled { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_BL_DISABLED"; + value = <0>; + default; + }; + kb-bl-enabled { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_BL_ENABLED"; + value = <1>; + }; + }; + }; + + /* Rotation matrices for motion sensors. */ + motionsense-rotation-ref { + compatible = "cros-ec,motionsense-rotation-ref"; + lid_rot_ref: lid-rotation-ref { + mat33 = <0 (-1) 0 + 1 0 0 + 0 0 1>; + }; + + lid_rot_ref1: lid-rotation-ref1 { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + + base_rot_ref: base-rotation-ref { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + }; + +}; diff --git a/zephyr/program/myst/myst/src/keyboard.c b/zephyr/program/myst/myst/src/keyboard.c new file mode 100644 index 0000000000..90e60fb0d7 --- /dev/null +++ b/zephyr/program/myst/myst/src/keyboard.c @@ -0,0 +1,29 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ec_commands.h" + +static const struct ec_response_keybd_config myst_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) +{ + return &myst_kb; +} diff --git a/zephyr/program/myst/myst/src/ppc_config.c b/zephyr/program/myst/myst/src/ppc_config.c new file mode 100644 index 0000000000..a16e38a25d --- /dev/null +++ b/zephyr/program/myst/myst/src/ppc_config.c @@ -0,0 +1,29 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Myst board-specific PPC code */ + +#include "driver/ppc/aoz1380_public.h" +#include "driver/ppc/nx20p348x.h" +#include "usbc_ppc.h" + +#include <zephyr/drivers/gpio.h> + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + break; + + case GPIO_USB_C1_PPC_INT_ODL: + break; + + default: + break; + } +} diff --git a/zephyr/program/myst/program.conf b/zephyr/program/myst/program.conf new file mode 100644 index 0000000000..49d4cc00ad --- /dev/null +++ b/zephyr/program/myst/program.conf @@ -0,0 +1,145 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_CROS_EC=y +CONFIG_PLATFORM_EC=y +CONFIG_SHIMMED_TASKS=y +CONFIG_ESPI=y + +# Shell features +CONFIG_SHELL_HISTORY=y +CONFIG_SHELL_TAB=y +CONFIG_SHELL_TAB_AUTOCOMPLETION=y +CONFIG_KERNEL_SHELL=y + +# Power sequencing +CONFIG_AP=y +CONFIG_AP_X86_AMD=y +CONFIG_PLATFORM_EC_POWERSEQ=y +CONFIG_PLATFORM_EC_POWER_BUTTON_TO_PCH_CUSTOM=y +CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION=y +CONFIG_PLATFORM_EC_POWERSEQ_RSMRST_DELAY=y +CONFIG_PLATFORM_EC_POWERSEQ_S0IX=y +CONFIG_PLATFORM_EC_POWERSEQ_CPU_PROCHOT_ACTIVE_LOW=y +CONFIG_PLATFORM_EC_PORT80=y + +# Power button +CONFIG_PLATFORM_EC_POWER_BUTTON=y + +# CBI EEPROM support - to be removed in favor of CBI in EC +CONFIG_EEPROM=y +CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y +CONFIG_PLATFORM_EC_BYPASS_CBI_EEPROM_WP_CHECK=y + +# Temperature Sensors +CONFIG_PLATFORM_EC_AMD_SB_RMI=y +CONFIG_PLATFORM_EC_AMD_STT=y +CONFIG_PLATFORM_EC_THROTTLE_AP=y +# An external prochot can only be triggered by the charger +# and during on the fan would increase current draw and make it worse. +CONFIG_PLATFORM_EC_THROTTLE_AP_NO_FAN=y +CONFIG_PLATFORM_EC_THROTTLE_AP_SINGLE_PIN=y + +# External power +CONFIG_PLATFORM_EC_HOSTCMD=y +CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y +CONFIG_PLATFORM_EC_BACKLIGHT_LID=y + +# Lid switch +CONFIG_PLATFORM_EC_LID_ANGLE=y +CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y +CONFIG_PLATFORM_EC_LID_SWITCH=y + +# Keyboard +CONFIG_PLATFORM_EC_KBLIGHT_ENABLE_PIN=y +CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y +CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y +CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y + +# Syscon +CONFIG_SYSCON=y + +# Battery +CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y +CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y +CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT=y + +# Charger +CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y +CONFIG_PLATFORM_EC_CHARGER_DEFAULT_CURRENT_LIMIT=512 +CONFIG_PLATFORM_EC_CHARGER_MIN_INPUT_CURRENT_LIMIT=512 +CONFIG_PLATFORM_EC_CHARGER_ISL9241=y +CONFIG_PLATFORM_EC_CHARGER_DUMP_PROCHOT=y +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20 +CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON=50000 + +# USB-C +CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815=y +CONFIG_PLATFORM_EC_USBC_SS_MUX_DFP_ONLY=y +CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=y +CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y +CONFIG_PLATFORM_EC_USB_PID=0x505F +CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO=y +CONFIG_PLATFORM_EC_USB_PD_LOGGING=y +CONFIG_PLATFORM_EC_USB_PD_REV30=y +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n +CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y +CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n +CONFIG_PLATFORM_EC_USB_PD_USB4=n +CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y + +# Disable FRS for bringup +CONFIG_PLATFORM_EC_USB_PD_FRS=n +CONFIG_PLATFORM_EC_USB_PD_FRS_TCPC=n + +# Temporary hack to enable bc12 driver +CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n + +# Give ourselves enough task space to use i2ctrace +CONFIG_TASK_PD_STACK_SIZE=1280 + +# Motion sense +CONFIG_PLATFORM_EC_ACCEL_FIFO=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y +CONFIG_PLATFORM_EC_LID_ANGLE=y +CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y +CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y + +CONFIG_PLATFORM_EC_MKBP_EVENT=y +CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y +CONFIG_PLATFORM_EC_MKBP_USE_GPIO=y + +CONFIG_PLATFORM_EC_TABLET_MODE=y +CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=y +CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y + +CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y + +# Misc. +CONFIG_PLATFORM_EC_AMD_STB_DUMP=y +CONFIG_PLATFORM_EC_I2C_DEBUG=y +CONFIG_PLATFORM_EC_PORT80_4_BYTE=y + +# System safe mode for improved panic debugging +CONFIG_PLATFORM_EC_SYSTEM_SAFE_MODE=y # 576 bytes + 56 bytes RAM + +# These are debug options that happen to be expensive in terms of flash space. +# Turn off as needed based on demand. +CONFIG_FLASH_PAGE_LAYOUT=y # 1876 bytes +CONFIG_FLASH_SHELL=y # 1852 bytes +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y # 656 bytes +CONFIG_PLATFORM_EC_CONSOLE_CMD_MEM=y # 896 bytes +CONFIG_PLATFORM_EC_CONSOLE_CMD_TCPC_DUMP=y # 1180 bytes +CONFIG_PLATFORM_EC_CONSOLE_CMD_PPC_DUMP=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_USB_PD_CABLE=y # 1104 bytes +CONFIG_SHELL_HELP=y # 3432 bytes +CONFIG_THREAD_MONITOR=y # 1548 bytes diff --git a/zephyr/program/myst/src/common.c b/zephyr/program/myst/src/common.c new file mode 100644 index 0000000000..c78d28bdaa --- /dev/null +++ b/zephyr/program/myst/src/common.c @@ -0,0 +1,8 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> + +LOG_MODULE_REGISTER(myst, CONFIG_MYST_LOG_LEVEL); diff --git a/zephyr/program/myst/src/power_signals.c b/zephyr/program/myst/src/power_signals.c new file mode 100644 index 0000000000..83b27cf87e --- /dev/null +++ b/zephyr/program/myst/src/power_signals.c @@ -0,0 +1,215 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ap_power/ap_power.h" +#include "charger.h" +#include "chipset.h" +#include "config.h" +#include "driver/amd_stb.h" +#include "gpio/gpio_int.h" +#include "gpio_signal.h" +#include "hooks.h" +#include "i2c.h" +#include "ioexpander.h" +#include "power.h" +#include "power/amd_x86.h" +#include "throttle_ap.h" +#include "timer.h" + +/* Power Signal Input List */ +/* TODO: b/218904113: Convert to using Zephyr GPIOs */ +const struct power_signal_info power_signal_list[] = { + [X86_SLP_S3_N] = { + .gpio = GPIO_PCH_SLP_S3_L, + .flags = POWER_SIGNAL_ACTIVE_HIGH, + .name = "SLP_S3_DEASSERTED", + }, + [X86_SLP_S5_N] = { + .gpio = GPIO_PCH_SLP_S5_L, + .flags = POWER_SIGNAL_ACTIVE_HIGH, + .name = "SLP_S5_DEASSERTED", + }, + [X86_S0_PGOOD] = { + .gpio = GPIO_S0_PGOOD, + .flags = POWER_SIGNAL_ACTIVE_HIGH, + .name = "S0_PGOOD", + }, +/* looks like we don't have this on Myst.. but POWER_SIGNAL_COUNT is needed */ + [X86_S5_PGOOD] = { + .gpio = GPIO_S5_PGOOD, + .flags = POWER_SIGNAL_ACTIVE_HIGH, + .name = "S5_PGOOD", + }, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + +static void handle_prochot(bool asserted, void *data); + +const struct prochot_cfg prochot_cfg = { + .gpio_prochot_in = GPIO_CPU_PROCHOT, + .callback = handle_prochot, +}; + +/* Chipset hooks */ +static void baseboard_suspend_change(struct ap_power_ev_callback *cb, + struct ap_power_ev_data data) +{ + switch (data.event) { + default: + return; + + case AP_POWER_SUSPEND: + /* Disable display backlight and retimer */ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_disable_disp_bl), + 1); + break; + + case AP_POWER_RESUME: + /* Enable retimer and display backlight */ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_disable_disp_bl), + 0); + /* Any retimer tuning can be done after the retimer turns on */ + break; + } +} + +static void check_charger_prochot(void) +{ + print_charger_prochot(CHARGER_SOLO); +} +DECLARE_DEFERRED(check_charger_prochot); + +static void handle_prochot(bool asserted, void *data) +{ + if (asserted) { + ccprints("Prochot asserted externally"); + hook_call_deferred(&check_charger_prochot_data, 0); + } else + ccprints("Prochot deasserted externally"); +} + +static void baseboard_init(void) +{ + static struct ap_power_ev_callback cb; + + /* Setup a suspend/resume callback */ + ap_power_ev_init_callback(&cb, baseboard_suspend_change, + AP_POWER_RESUME | AP_POWER_SUSPEND); + ap_power_ev_add_callback(&cb); + /* Enable Power Group interrupts. */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_pg_groupc_s0)); + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_pg_lpddr_s3)); + + /* Enable thermtrip interrupt */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_soc_thermtrip)); + + /* Enable prochot interrupt */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_prochot)); + throttle_ap_config_prochot(&prochot_cfg); +} +DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_POST_I2C); + +/** + * b/275949288: On G3->S5, wait for RSMRST_L to be deasserted before asserting + * PCH_PWRBTN_L. This can be as long as ~65ms after cold boot. Then wait an + * additional delay of T1a defined in the EDS before changing the power button. + */ +#define RSMRST_WAIT_DELAY 65 +#define EDS_PWR_BTN_RSMRST_T1A_DELAY 16 +void board_pwrbtn_to_pch(int level) +{ + timestamp_t start; + + /* Add delay for G3 exit if asserting PWRBTN_L and RSMRST_L is low. */ + if (!level && + !gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l))) { + start = get_time(); + do { + usleep(500); + if (gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL( + gpio_ec_soc_rsmrst_l))) + break; + } while (time_since32(start) < (RSMRST_WAIT_DELAY * MSEC)); + + if (!gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l))) + ccprints("Error pwrbtn: RSMRST_L still low"); + + msleep(EDS_PWR_BTN_RSMRST_T1A_DELAY); + } + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_mech_pwr_btn_odl), + level); +} + +/* Note: signal parameter unused */ +void baseboard_set_soc_pwr_pgood(enum gpio_signal unused) +{ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_soc_pwr_good), + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL( + gpio_pg_pcore_s0_r_od)) && + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL( + gpio_pg_groupc_s0_od))); +} + +void baseboard_s0_pgood(enum gpio_signal signal) +{ + baseboard_set_soc_pwr_pgood(signal); + + /* Chain off power signal interrupt handler for PG_PCORE_S0_R_OD */ + power_signal_interrupt(signal); +} + +/* Note: signal parameter unused */ +void baseboard_set_en_pwr_pcore(enum gpio_signal unused) +{ + /* + * EC must AND signals PG_LPDDR5_S3_OD, PG_GROUPC_S0_OD, and + * EN_PWR_S0_R + */ + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_pg_pcore_s0_r_od), + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr5_s3_od)) && + gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_pg_groupc_s0_od)) && + gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s0))); + + /* Update EC_SOC_PWR_GOOD based on our results */ + baseboard_set_soc_pwr_pgood(unused); +} + +void baseboard_en_pwr_s0(enum gpio_signal signal) +{ + /* EC must AND signals SLP_S3_L and PG_PWR_S5 */ + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s0), + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_slp_s3_l)) && + gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_pg_pwr_s5))); + + /* Change EN_PWR_PCORE_S0_R if needed*/ + baseboard_set_en_pwr_pcore(signal); + + /* Now chain off to the normal power signal interrupt handler. */ + power_signal_interrupt(signal); +} + +void baseboard_s5_pgood(enum gpio_signal signal) +{ + /* Continue to our signal AND-ing and power interrupt */ + baseboard_en_pwr_s0(signal); +} + +void baseboard_set_en_pwr_s3(enum gpio_signal signal) +{ + /* Chain off the normal power signal interrupt handler */ + power_signal_interrupt(signal); +} + +void baseboard_soc_thermtrip(enum gpio_signal signal) +{ + ccprints("SoC thermtrip reported, shutting down"); + chipset_force_shutdown(CHIPSET_SHUTDOWN_THERMAL); +} diff --git a/zephyr/program/myst/src/stt.c b/zephyr/program/myst/src/stt.c new file mode 100644 index 0000000000..f739155ee6 --- /dev/null +++ b/zephyr/program/myst/src/stt.c @@ -0,0 +1,39 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Support code for STT temperature reporting */ + +#include "chipset.h" +#include "driver/temp_sensor/f75303.h" +#include "temp_sensor/pct2075.h" +#include "temp_sensor/temp_sensor.h" + +int board_get_soc_temp_mk(int *temp_mk) +{ + if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) + return EC_ERROR_NOT_POWERED; + +#ifdef CONFIG_TEMP_SENSOR_PCT2075 + return pct2075_get_val_mk(PCT2075_SENSOR_ID(DT_NODELABEL(soc_pct2075)), + temp_mk); +#else + return f75303_get_val_mk(F75303_SENSOR_ID(DT_NODELABEL(soc_f75303)), + temp_mk); +#endif +} + +int board_get_ambient_temp_mk(int *temp_mk) +{ + if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) + return EC_ERROR_NOT_POWERED; + +#ifdef CONFIG_TEMP_SENSOR_PCT2075 + return pct2075_get_val_mk(PCT2075_SENSOR_ID(DT_NODELABEL(amb_pct2075)), + temp_mk); +#else + return f75303_get_val_mk(F75303_SENSOR_ID(DT_NODELABEL(amb_f75303)), + temp_mk); +#endif +} diff --git a/zephyr/program/myst/src/usb_pd_policy.c b/zephyr/program/myst/src/usb_pd_policy.c new file mode 100644 index 0000000000..9e656e815f --- /dev/null +++ b/zephyr/program/myst/src/usb_pd_policy.c @@ -0,0 +1,79 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Shared USB-C policy for Myst boards */ + +#include "charge_manager.h" +#include "chipset.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "ec_commands.h" +#include "ioexpander.h" +#include "system.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usbc_ppc.h" +#include "util.h" + +#include <zephyr/drivers/gpio.h> + +int pd_check_vconn_swap(int port) +{ + /* + * Do not allow vconn swap 5V rail is off + * S5_PGOOD depends on PG_PP5000_S5 being asserted, + * so GPIO_S5_PGOOD is a reasonable proxy for PP5000_S5 + */ + return gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_pwr_s5)); +} + +void pd_power_supply_reset(int port) +{ + /* Disable VBUS. */ + ppc_vbus_source_enable(port, 0); + + /* Enable discharge if we were previously sourcing 5V */ + if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) + pd_set_vbus_discharge(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_set_power_supply_ready(int port) +{ + int rv; + + /* Disable charging. */ + rv = ppc_vbus_sink_enable(port, 0); + if (rv) + return rv; + + if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) + pd_set_vbus_discharge(port, 0); + + /* Provide Vbus. */ + rv = ppc_vbus_source_enable(port, 1); + if (rv) + return rv; + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +/* Used by Vbus discharge common code with CONFIG_USB_PD_DISCHARGE */ +int board_vbus_source_enabled(int port) +{ + return tcpm_get_src_ctrl(port); +} + +/* Used by USB charger task with CONFIG_USB_PD_5V_EN_CUSTOM */ +int board_is_sourcing_vbus(int port) +{ + return board_vbus_source_enabled(port); +} diff --git a/zephyr/program/myst/src/usbc_config.c b/zephyr/program/myst/src/usbc_config.c new file mode 100644 index 0000000000..c3aafd9da9 --- /dev/null +++ b/zephyr/program/myst/src/usbc_config.c @@ -0,0 +1,162 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Myst family-specific USB-C configuration */ + +#include "battery_fuel_gauge.h" +#include "charge_manager.h" +#include "charge_ramp.h" +#include "charge_state.h" +#include "charge_state_v2.h" +#include "charger.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "driver/charger/isl9241.h" +#include "driver/tcpm/rt1718s.h" +#include "driver/usb_mux/amd_fp6.h" +#include "gpio/gpio_int.h" +#include "hooks.h" +#include "power.h" +#include "usb_mux.h" +#include "usb_pd_tcpm.h" +#include "usbc/usb_muxes.h" +#include "usbc_ppc.h" + +#include <zephyr/drivers/gpio.h> + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/* USB-A ports */ +enum usba_port { USBA_PORT_A0 = 0, USBA_PORT_A1, USBA_PORT_COUNT }; + +/* USB-C ports */ +enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; +BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT); + +static void usbc_interrupt_init(void) +{ + /* Enable PPC interrupts. */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc)); + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_ppc)); + + /* Enable SBU fault interrupts */ + gpio_enable_dt_interrupt( + GPIO_INT_FROM_NODELABEL(int_usb_c0_c1_sbu_fault)); +} +DECLARE_HOOK(HOOK_INIT, usbc_interrupt_init, HOOK_PRIO_POST_I2C); + +int board_set_active_charge_port(int port) +{ + int is_valid_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); + int i; + + if (port == CHARGE_PORT_NONE) { + CPRINTSUSB("Disabling all charger ports"); + + /* Disable all ports. */ + for (i = 0; i < ppc_cnt; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("Disabling C%d as sink failed.", i); + } + + return EC_SUCCESS; + } else if (!is_valid_port) { + return EC_ERROR_INVAL; + } + + /* Check if the port is sourcing VBUS. */ + if (tcpm_get_src_ctrl(port)) { + CPRINTSUSB("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + + CPRINTSUSB("New charge port: C%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < ppc_cnt; i++) { + if (i == port) + continue; + + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("C%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (ppc_vbus_sink_enable(port, 1)) { + CPRINTSUSB("C%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +void sbu_fault_interrupt(enum gpio_signal signal) +{ + /* + * TODO: b/275609315 + * Determine if the fault happened on C0 or C1 + */ + int port = 0; + + CPRINTSUSB("C%d: SBU fault", port); + pd_handle_overcurrent(port); +} + +void usb_pd_soc_interrupt(enum gpio_signal signal) +{ + /* + * This interrupt is unexpected with our use of the SoC mux, so just log + * it as a point of interest. + */ + CPRINTSUSB("SOC PD Interrupt"); +} + +/* Round up 3250 max current to multiple of 128mA for ISL9241 AC prochot. */ +static void charger_prochot_init_isl9241(void) +{ + isl9241_set_ac_prochot(CHARGER_SOLO, CONFIG_AC_PROCHOT_CURRENT_MA); +} +DECLARE_HOOK(HOOK_INIT, charger_prochot_init_isl9241, HOOK_PRIO_DEFAULT); + +void board_reset_pd_mcu(void) +{ + /* No reset line for TCPC0 */ + /* No reset line for TCPC1 */ +} + +#define SAFE_RESET_VBUS_DELAY_MS 900 +#define SAFE_RESET_VBUS_MV 5000 +void board_hibernate(void) +{ + int port; + enum ec_error_list ret; + + /* + * If we are charging, then drop the Vbus level down to 5V to ensure + * that we don't get locked out of the 6.8V OVLO for our PPCs in + * dead-battery mode. This is needed when the TCPC/PPC rails go away. + * (b/79218851, b/143778351, b/147007265) + */ + port = charge_manager_get_active_charge_port(); + if (port != CHARGE_PORT_NONE) { + pd_request_source_voltage(port, SAFE_RESET_VBUS_MV); + + /* Give PD task and PPC chip time to get to 5V */ + msleep(SAFE_RESET_VBUS_DELAY_MS); + } + + /* Try to put our battery fuel gauge into sleep mode */ + ret = battery_sleep_fuel_gauge(); + if ((ret != EC_SUCCESS) && (ret != EC_ERROR_UNIMPLEMENTED)) + cprints(CC_SYSTEM, "Failed to send battery sleep command"); +} diff --git a/zephyr/program/myst/usbc.dtsi b/zephyr/program/myst/usbc.dtsi new file mode 100644 index 0000000000..8e8579d328 --- /dev/null +++ b/zephyr/program/myst/usbc.dtsi @@ -0,0 +1,35 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + usbc { + #address-cells = <1>; + #size-cells = <0>; + + usbc_port0: port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + tcpc = <&tcpc_port0>; + chg = <&charger>; + ppc = <&ppc_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port0>; + }; + }; + + usbc_port1: port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + bc12 = <&bc12_port1>; + tcpc = <&tcpc_port1>; + ppc = <&ppc_port1>; + usb-mux-chain-1-anx { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port1>; + }; + }; + }; +}; diff --git a/zephyr/program/nissa/BUILD.py b/zephyr/program/nissa/BUILD.py index 00e4322473..0a10912552 100644 --- a/zephyr/program/nissa/BUILD.py +++ b/zephyr/program/nissa/BUILD.py @@ -4,7 +4,8 @@ """Define zmake projects for nissa.""" -# Nivviks and Craask, Pujjo, Xivu, Xivur, Uldren has NPCX993F, Nereid and Joxer, Yaviks has ITE81302 +# Nivviks and Craask, Pujjo, Xivu, Xivur, Uldren has NPCX993F, Nereid +# and Joxer, Yaviks, Yavilla has ITE81302 def register_nissa_project( @@ -27,6 +28,7 @@ def register_nissa_project( here / f"{chip_kconfig}_program.conf", here / project_name / "project.conf", ], + inherited_from=["nissa"], ) @@ -102,6 +104,11 @@ yaviks = register_nissa_project( chip="it81302bx", ) +yavilla = register_nissa_project( + project_name="yavilla", + chip="it81302bx", +) + uldren = register_nissa_project( project_name="uldren", chip="npcx9m3f", diff --git a/zephyr/program/nissa/CMakeLists.txt b/zephyr/program/nissa/CMakeLists.txt index 0044b05e12..eaaa2ebee1 100644 --- a/zephyr/program/nissa/CMakeLists.txt +++ b/zephyr/program/nissa/CMakeLists.txt @@ -88,6 +88,18 @@ if(DEFINED CONFIG_BOARD_YAVIKS) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "yaviks/src/charger.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "yaviks/src/fan.c") endif() +if(DEFINED CONFIG_BOARD_YAVILLA) + project(yavilla) + zephyr_library_sources( + "yavilla/src/led.c" + "yavilla/src/keyboard.c" + "yavilla/src/board.c" + "yavilla/src/thermal.c" + ) + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "yavilla/src/usbc.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "yavilla/src/charger.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "yavilla/src/fan.c") +endif() if(DEFINED CONFIG_BOARD_XIVUR) project(xivur) zephyr_library_sources( diff --git a/zephyr/program/nissa/Kconfig b/zephyr/program/nissa/Kconfig index 6e23d0a569..5168a112ed 100644 --- a/zephyr/program/nissa/Kconfig +++ b/zephyr/program/nissa/Kconfig @@ -65,6 +65,12 @@ config BOARD_YAVIKS Build Google Yaviks board. Yaviks has Intel ADL-N SoC with IT81302 EC. +config BOARD_YAVILLA + bool "Google Yavilla Board" + help + Build Google Yavilla board. Yavilla has Intel ADL-N SoC + with IT81302 EC. + config BOARD_ULDREN bool "Google Uldren Board" help diff --git a/zephyr/program/nissa/src/sub_board.c b/zephyr/program/nissa/src/sub_board.c index 9c86c9422c..db6788de96 100644 --- a/zephyr/program/nissa/src/sub_board.c +++ b/zephyr/program/nissa/src/sub_board.c @@ -19,7 +19,6 @@ #include "usbc/usb_muxes.h" #include <zephyr/drivers/gpio.h> -#include <zephyr/drivers/pinctrl.h> #include <zephyr/init.h> #include <zephyr/kernel.h> #include <zephyr/sys/printk.h> @@ -39,55 +38,56 @@ __override uint8_t board_get_usb_pd_port_count(void) return cached_usb_pd_port_count; } +test_export_static enum nissa_sub_board_type nissa_cached_sub_board = + NISSA_SB_UNKNOWN; /* * Retrieve sub-board type from FW_CONFIG. */ enum nissa_sub_board_type nissa_get_sb_type(void) { - static enum nissa_sub_board_type sb = NISSA_SB_UNKNOWN; int ret; uint32_t val; /* * Return cached value. */ - if (sb != NISSA_SB_UNKNOWN) - return sb; + if (nissa_cached_sub_board != NISSA_SB_UNKNOWN) + return nissa_cached_sub_board; - sb = NISSA_SB_NONE; /* Defaults to none */ + nissa_cached_sub_board = NISSA_SB_NONE; /* Defaults to none */ ret = cros_cbi_get_fw_config(FW_SUB_BOARD, &val); if (ret != 0) { LOG_WRN("Error retrieving CBI FW_CONFIG field %d", FW_SUB_BOARD); - return sb; + return nissa_cached_sub_board; } switch (val) { default: LOG_WRN("No sub-board defined"); break; case FW_SUB_BOARD_1: - sb = NISSA_SB_C_A; + nissa_cached_sub_board = NISSA_SB_C_A; LOG_INF("SB: USB type C, USB type A"); break; case FW_SUB_BOARD_2: - sb = NISSA_SB_C_LTE; + nissa_cached_sub_board = NISSA_SB_C_LTE; LOG_INF("SB: USB type C, WWAN LTE"); break; case FW_SUB_BOARD_3: - sb = NISSA_SB_HDMI_A; + nissa_cached_sub_board = NISSA_SB_HDMI_A; LOG_INF("SB: HDMI, USB type A"); break; } - return sb; + return nissa_cached_sub_board; } /* * Initialise the USB PD port count, which * depends on which sub-board is attached. */ -static void board_usb_pd_count_init(void) +test_export_static void board_usb_pd_count_init(void) { switch (nissa_get_sb_type()) { default: @@ -181,6 +181,7 @@ __overridable void nissa_configure_hdmi_power_gpios(void) */ #define I2C4_NODE DT_NODELABEL(i2c4) #if DT_NODE_EXISTS(I2C4_NODE) +#include <zephyr/drivers/pinctrl.h> PINCTRL_DT_DEFINE(I2C4_NODE); /* disable i2c4 alternate function */ diff --git a/zephyr/program/nissa/uldren/overlay.dtsi b/zephyr/program/nissa/uldren/overlay.dtsi index ed1611eb58..7ea4ac8580 100644 --- a/zephyr/program/nissa/uldren/overlay.dtsi +++ b/zephyr/program/nissa/uldren/overlay.dtsi @@ -444,6 +444,6 @@ * after waking up automatically for better power consumption. */ &power_leakage_io { - leak-gpios = <&gpioa 4 0 - &gpiof 1 0>; + leak-gpios = <&gpioa 4 GPIO_OPEN_DRAIN + &gpiof 1 GPIO_OPEN_DRAIN>; }; diff --git a/zephyr/program/nissa/yavilla/cbi.dtsi b/zephyr/program/nissa/yavilla/cbi.dtsi new file mode 100644 index 0000000000..0d9d7a95c8 --- /dev/null +++ b/zephyr/program/nissa/yavilla/cbi.dtsi @@ -0,0 +1,100 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + /* Yavilla-specific fw_config fields. */ + nissa-fw-config { + compatible = "cros-ec,cbi-fw-config"; + /* + * FW_CONFIG field for multiple wi-fi SAR. + * + * start = <2>; + * size = <2>; + */ + + /* + * FW_CONFIG field to enable fan or not. + */ + fan { + enum-name = "FW_FAN"; + start = <4>; + size = <1>; + + no-fan { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_NOT_PRESENT"; + value = <0>; + }; + fan-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_PRESENT"; + value = <1>; + /* + * Set as default so that unprovisioned + * configs will run the fan regardless. + */ + default; + }; + }; + + /* + * FW_CONFIG field to indicate which keyboard layout + * should be used. + */ + keyboard { + enum-name = "FW_KB_LAYOUT"; + start = <5>; + size = <1>; + + layout-1 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_LAYOUT_DEFAULT"; + value = <0>; + default; + }; + layout-2 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_LAYOUT_US2"; + value = <1>; + }; + }; + + /* + * FW_CONFIG field to indicate which keyboard layout + * should be used. + */ + keyboard-backlight { + enum-name = "FW_KB_BACKLIGHT"; + start = <6>; + size = <1>; + + without-keyboard-backlight { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_BACKLIGHT_OFF"; + value = <1>; + }; + with-keyboard-backlight { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_BACKLIGHT_ON"; + value = <0>; + default; + }; + }; + + /* + * FW_CONFIG field for multiple touch panel. + * + * start = <7>; + * size = <2>; + */ + + /* + * FW_CONFIG field for multiple storage. + * + * start = <31>; + * size = <1>; + */ + }; +}; diff --git a/zephyr/program/nissa/yavilla/fan.dtsi b/zephyr/program/nissa/yavilla/fan.dtsi new file mode 100644 index 0000000000..6a3fc0288a --- /dev/null +++ b/zephyr/program/nissa/yavilla/fan.dtsi @@ -0,0 +1,71 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/ { + fans { + compatible = "cros-ec,fans"; + fan_0 { + pwms = <&pwm2 PWM_CHANNEL_2 PWM_KHZ(25) PWM_POLARITY_NORMAL>; + tach = <&tach1>; + rpm_min = <2500>; + rpm_start = <2500>; + rpm_max = <4100>; + rpm_deviation = <1>; + enable_gpio = <&gpio_fan_enable>; + }; + }; + fan_steps { + compatible = "cros-ec,fan-steps"; + level_0 { + temp_on = <43 47 0>; + temp_off = <99 99 99>; + rpm_target = <0>; + }; + level_1 { + temp_on = <46 48 0>; + temp_off = <40 45 99>; + rpm_target = <2600>; + }; + level_2 { + temp_on = <49 49 0>; + temp_off = <44 46 99>; + rpm_target = <2800>; + }; + level_3 { + temp_on = <53 50 54>; + temp_off = <47 47 51>; + rpm_target = <3100>; + }; + level_4 { + temp_on = <56 56 60>; + temp_off = <51 48 52>; + rpm_target = <3300>; + }; + level_5 { + temp_on = <60 60 64>; + temp_off = <54 52 56>; + rpm_target = <3600>; + }; + level_6 { + temp_on = <100 100 100>; + temp_off = <58 54 58>; + rpm_target = <4000>; + }; + }; +}; +/* pwm for fan */ +&pwm2 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C6>; + pinctrl-0 = <&pwm2_gpa2_default>; + pinctrl-names = "default"; +}; +/* fan tachometer sensor */ +&tach1 { + status = "okay"; + channel = <IT8XXX2_TACH_CHANNEL_A>; + pulses-per-round = <2>; + pinctrl-0 = <&tach1a_gpd7_default>; + pinctrl-names = "default"; +}; diff --git a/zephyr/program/nissa/yavilla/gpio.dtsi b/zephyr/program/nissa/yavilla/gpio.dtsi new file mode 100644 index 0000000000..d063b897d9 --- /dev/null +++ b/zephyr/program/nissa/yavilla/gpio.dtsi @@ -0,0 +1,242 @@ +/* + * Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + + named-adc-channels { + compatible = "named-adc-channels"; + + adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { + enum-name = "ADC_PP1050_PROC"; + io-channels = <&adc0 14>; + }; + adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { + enum-name = "ADC_PP3300_S5"; + io-channels = <&adc0 0>; + }; + adc_temp_sensor_1: temp_sensor_1 { + enum-name = "ADC_TEMP_SENSOR_1"; + io-channels = <&adc0 2>; + }; + adc_temp_sensor_2: temp_sensor_2 { + enum-name = "ADC_TEMP_SENSOR_2"; + io-channels = <&adc0 3>; + }; + adc_temp_sensor_3: temp_sensor_3 { + enum-name = "ADC_TEMP_SENSOR_3"; + io-channels = <&adc0 13>; + }; + }; + + named-gpios { + compatible = "named-gpios"; + + gpio_all_sys_pwrgd: all_sys_pwrgd { + gpios = <&gpiob 7 GPIO_INPUT>; + }; + gpio_ccd_mode_odl: ccd_mode_odl { + gpios = <&gpioh 5 GPIO_INPUT>; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + gpio_cpu_c10_gate_l: cpu_c10_gate_l { + gpios = <&gpiog 1 GPIO_INPUT>; + }; + gpio_ec_battery_pres_odl: ec_battery_pres_odl { + gpios = <&gpioi 4 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpioj 5 GPIO_OUTPUT>; + }; + gpio_ec_edp_bl_en_od: ec_edp_bl_en_od { + gpios = <&gpiok 4 GPIO_ODR_HIGH>; + enum-name = "GPIO_ENABLE_BACKLIGHT"; + }; + gpio_ec_entering_rw: ec_entering_rw { + gpios = <&gpioc 7 GPIO_OUTPUT>; + enum-name = "GPIO_ENTERING_RW"; + }; + gpio_ec_gsc_packet_mode: ec_gsc_packet_mode { + gpios = <&gpioh 1 GPIO_OUTPUT>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + gpio_ec_pch_wake_odl: ec_pch_wake_odl { + gpios = <&gpiob 2 GPIO_ODR_LOW>; + }; + gpio_ec_prochot_odl: ec_prochot_odl { + gpios = <&gpioi 1 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + }; + gpio_ec_soc_dsw_pwrok: ec_soc_dsw_pwrok { + gpios = <&gpiol 7 GPIO_OUTPUT>; + no-auto-init; + }; + gpio_ec_soc_int_odl: ec_soc_int_odl { + gpios = <&gpiod 5 GPIO_ODR_HIGH>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_ec_soc_pch_pwrok_od: ec_soc_pch_pwrok_od { + gpios = <&gpiod 6 GPIO_ODR_HIGH>; + no-auto-init; + }; + gpio_ec_soc_pwr_btn_odl: ec_soc_pwr_btn_odl { + gpios = <&gpiob 6 GPIO_ODR_HIGH>; + enum-name = "GPIO_PCH_PWRBTN_L"; + }; + gpio_ec_soc_rsmrst_l: ec_soc_rsmrst_l { + gpios = <&gpioh 0 GPIO_OUTPUT>; + no-auto-init; + }; + gpio_ec_soc_rtcrst: ec_soc_rtcrst { + gpios = <&gpiok 2 GPIO_OUTPUT>; + }; + gpio_ec_soc_sys_pwrok: ec_soc_sys_pwrok { + gpios = <&gpiof 2 GPIO_OUTPUT>; + no-auto-init; + }; + gpio_ec_soc_vccst_pwrgd_od: ec_soc_vccst_pwrgd_od { + gpios = <&gpioe 5 GPIO_ODR_HIGH>; + no-auto-init; + }; + gpio_ec_wp_odl: ec_wp_odl { + gpios = <&gpioa 6 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_en_pp3300_s5: en_pp3300_s5 { + gpios = <&gpioc 5 GPIO_OUTPUT>; + enum-name = "GPIO_TEMP_SENSOR_POWER"; + no-auto-init; + }; + gpio_en_pp5000_pen_x: en_pp5000_pen_x { + gpios = <&gpiob 5 GPIO_OUTPUT>; + }; + gpio_en_pp5000_s5: en_pp5000_s5 { + gpios = <&gpiok 5 GPIO_OUTPUT>; + no-auto-init; + }; + gpio_en_slp_z: en_slp_z { + gpios = <&gpiok 3 GPIO_OUTPUT>; + }; + gpio_en_usb_a0_vbus: en_usb_a0_vbus { + gpios = <&gpiol 6 GPIO_OUTPUT>; + }; + gpio_en_usb_a1_vbus: en_usb_a1_vbus { + gpios = <&gpiof 0 GPIO_OUTPUT>; + }; + gpio_en_usb_c0_cc1_vconn: en_usb_c0_cc1_vconn { + gpios = <&gpioh 4 GPIO_OUTPUT>; + }; + gpio_en_usb_c0_cc2_vconn: en_usb_c0_cc2_vconn { + gpios = <&gpioh 6 GPIO_OUTPUT>; + }; + gpio_gsc_ec_pwr_btn_odl: gsc_ec_pwr_btn_odl { + gpios = <&gpioe 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + gpio_imvp91_vrrdy_od: imvp91_vrrdy_od { + gpios = <&gpioj 4 GPIO_INPUT>; + no-auto-init; + }; + gpio_lid_open: lid_open { + gpios = <&gpiof 3 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + }; + gpio_pen_detect_odl: pen_detect_odl { + gpios = <&gpioj 1 GPIO_INPUT_PULL_UP>; + }; + gpio_pg_pp1050_mem_s3_od: pg_pp1050_mem_s3_od { + gpios = <&gpiod 3 GPIO_INPUT>; + }; + gpio_pg_pp5000_s5_od: pg_pp5000_s5_od { + gpios = <&gpioe 3 GPIO_INPUT>; + }; + gpio_rsmrst_pwrgd_l: rsmrst_pwrgd_l { + gpios = <&gpioe 1 GPIO_INPUT_PULL_UP>; + no-auto-init; + }; + gpio_slp_s0_l: slp_s0_l { + gpios = <&gpioe 4 GPIO_INPUT>; + no-auto-init; + }; + gpio_slp_s3_l: slp_s3_l { + gpios = <&gpioh 3 GPIO_INPUT>; + no-auto-init; + }; + gpio_slp_s4_l: slp_s4_l { + gpios = <&gpioi 5 GPIO_INPUT>; + }; + gpio_slp_sus_l: slp_sus_l { + gpios = <&gpiog 2 GPIO_INPUT>; + no-auto-init; + }; + gpio_sub_usb_a1_ilimit_sdp: sub_usb_a1_ilimit_sdp { + gpios = <&gpiof 1 GPIO_OUTPUT>; + enum-name = "GPIO_USB2_ILIM_SEL"; + }; + gpio_sys_rst_odl: sys_rst_odl { + gpios = <&gpiod 1 GPIO_ODR_HIGH>; + no-auto-init; + }; + gpio_usb_a0_ilimit_sdp: usb_a0_ilimit_sdp { + gpios = <&gpiol 5 GPIO_OUTPUT>; + enum-name = "GPIO_USB1_ILIM_SEL"; + }; + gpio_usb_c0_frs: usb_c0_frs { + gpios = <&gpioc 4 GPIO_OUTPUT>; + }; + gpio_usb_c0_int_odl: usb_c0_int_odl { + gpios = <&gpiok 0 GPIO_INPUT_PULL_UP>; + }; + gpio_usb_c1_int_odl: usb_c1_int_odl { + gpios = <&gpioe 6 GPIO_INPUT_PULL_UP>; + }; + gpio_vccin_aux_vid0: vccin_aux_vid0 { + gpios = <&gpiod 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + gpio_vccin_aux_vid1: vccin_aux_vid1 { + gpios = <&gpiok 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + gpio_c1_charger_led_white_l: c1_charger_led_white_l { + gpios = <&gpiol 4 GPIO_OUTPUT_HIGH>; + }; + gpio_c1_charger_led_amber_l: c1_charger_led_amber_l { + gpios = <&gpiod 4 GPIO_OUTPUT_HIGH>; + }; + gpio_c0_charger_led_white_l: c0_charger_led_white_l { + gpios = <&gpioc 3 GPIO_OUTPUT_HIGH>; + }; + gpio_c0_charger_led_amber_l: c0_charger_led_amber_l { + gpios = <&gpioj 7 GPIO_OUTPUT_HIGH>; + }; + gpio_ec_kso_02_inv: ec_kso_02_inv { + gpios = <&gpioksol 2 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_KBD_KSO2"; + }; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + i2c_ec_i2c_eeprom: ec_i2c_eeprom { + i2c-port = <&i2c0>; + enum-names = "I2C_PORT_EEPROM"; + }; + i2c_ec_i2c_batt: ec_i2c_batt { + i2c-port = <&i2c1>; + enum-names = "I2C_PORT_BATTERY"; + }; + i2c_ec_i2c_sensor: ec_i2c_sensor { + i2c-port = <&i2c2>; + enum-names = "I2C_PORT_SENSOR"; + }; + i2c_ec_i2c_sub_usb_c1: ec_i2c_sub_usb_c1 { + i2c-port = <&i2c4>; + enum-names = "I2C_PORT_USB_C1_TCPC"; + }; + i2c_ec_i2c_usb_c0: ec_i2c_usb_c0 { + i2c-port = <&i2c5>; + enum-names = "I2C_PORT_USB_C0_TCPC"; + }; + }; +}; diff --git a/zephyr/program/nissa/yavilla/keyboard.dtsi b/zephyr/program/nissa/yavilla/keyboard.dtsi new file mode 100644 index 0000000000..87d7d718fa --- /dev/null +++ b/zephyr/program/nissa/yavilla/keyboard.dtsi @@ -0,0 +1,72 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + kblight { + compatible = "cros-ec,kblight-pwm"; + /* + * Use 324 Hz so that 32Khz clock source is used, + * which is not gated in power saving mode. + */ + pwms = <&pwm0 0 PWM_HZ(324) PWM_POLARITY_NORMAL>; + }; +}; + +&pwm0 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm0_gpa0_default>; + pinctrl-names = "default"; +}; + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = <&ksi0_default + &ksi1_default + &ksi2_default + &ksi3_default + &ksi4_default + &ksi5_default + &ksi6_default + &ksi7_default + &kso0_default + &kso1_default + &kso3_default + &kso4_default + &kso5_default + &kso6_default + &kso7_default + &kso8_default + &kso9_default + &kso10_default + &kso11_default + &kso12_default + &kso13_default + &kso14_default>; + pinctrl-1 = <&ksi0_sleep + &ksi1_sleep + &ksi2_sleep + &ksi3_sleep + &ksi4_sleep + &ksi5_sleep + &ksi6_sleep + &ksi7_sleep + &kso0_sleep + &kso1_sleep + &kso3_sleep + &kso4_sleep + &kso5_sleep + &kso6_sleep + &kso7_sleep + &kso8_sleep + &kso9_sleep + &kso10_sleep + &kso11_sleep + &kso12_sleep + &kso13_sleep + &kso14_sleep>; + pinctrl-names = "default", "sleep"; +}; diff --git a/zephyr/program/nissa/yavilla/overlay.dtsi b/zephyr/program/nissa/yavilla/overlay.dtsi new file mode 100644 index 0000000000..663b538953 --- /dev/null +++ b/zephyr/program/nissa/yavilla/overlay.dtsi @@ -0,0 +1,376 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros/thermistor/thermistor.dtsi> +#include <dt-bindings/usb_pd_tcpm.h> + +/ { + aliases { + gpio-cbi-wp = &gpio_ec_cbi_wp; + gpio-wp = &gpio_ec_wp_odl; + int-wp = &int_wp_l; + }; + + ec-console { + compatible = "ec-console"; + disabled = "events", "lpc", "hostcmd"; + }; + + batteries { + default_battery: cosmx { + compatible = "cosmx,gh02047xl", "battery-smart"; + }; + dynapack_atl_gh02047xl { + compatible = "dynapack,atl_gh02047xl", "battery-smart"; + }; + dynapack_cosmx_gh02047xl { + compatible = "dynapack,cosmx_gh02047xl", "battery-smart"; + }; + smp_coslight_gh02047xl { + compatible = "smp,coslight_gh02047xl", "battery-smart"; + }; + smp_highpower_gh02047xl { + compatible = "smp,highpower_gh02047xl", "battery-smart"; + }; + default_battery_3s:cosmx_si03058xl { + compatible = "cosmx,si03058xl", "battery-smart"; + }; + smp_highpower_si03058xl { + compatible = "smp,highpower_si03058xl", "battery-smart"; + }; + smp_si03054xl { + compatible = "smp,si03054xl", "battery-smart"; + }; + }; + + hibernate-wake-pins { + compatible = "cros-ec,hibernate-wake-pins"; + wakeup-irqs = < + &int_power_button + &int_lid_open + >; + }; + + gpio-interrupts { + compatible = "cros-ec,gpio-interrupts"; + + int_power_button: power_button { + irq-pin = <&gpio_gsc_ec_pwr_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_button_interrupt"; + }; + int_wp_l: wp_l { + irq-pin = <&gpio_ec_wp_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "switch_interrupt"; + }; + int_lid_open: lid_open { + irq-pin = <&gpio_lid_open>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "lid_interrupt"; + }; + int_usb_c0: usb_c0 { + irq-pin = <&gpio_usb_c0_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_c0_interrupt"; + }; + int_usb_c1: usb_c1 { + irq-pin = <&gpio_usb_c1_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_c1_interrupt"; + }; + }; + + unused-pins { + compatible = "unused-gpios"; + unused-gpios = <&gpioa 7 0>, + <&gpioc 0 0>, + <&gpioc 6 0>, + <&gpiod 7 0>, + <&gpioh 2 0>, + <&gpioi 6 0>, + <&gpioi 7 0>, + <&gpioj 0 0>, + <&gpioj 3 0>, + <&gpiok 7 GPIO_OUTPUT>; + }; + + named-gpios { + /* + * EC doesn't take any specific action on CC/SBU disconnect due to + * fault, but this definition is useful for hardware testing. + */ + gpio_usb_c0_prot_fault_odl: usb_c0_prot_fault_odl { + gpios = <&gpiok 6 GPIO_INPUT_PULL_UP>; + }; + gpio_fan_enable: fan-enable { + gpios = <&gpioa 1 GPIO_OUTPUT>; + no-auto-init; + }; + }; + + temp_cpu_thermistor: cpu { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_1>; + }; + temp_5v_regulator_thermistor: 5v-regulator { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_2>; + }; + temp_charger_thermistor: charger { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_3>; + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + temp_cpu: cpu { + temp_fan_off = <45>; + temp_fan_max = <60>; + temp_host_high = <75>; + temp_host_halt = <85>; + temp_host_release_high = <65>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_cpu_thermistor>; + }; + temp_5v_regulator: 5v-regulator { + temp_fan_off = <50>; + temp_fan_max = <65>; + temp_host_high = <75>; + temp_host_halt = <85>; + temp_host_release_high = <65>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_5v_regulator_thermistor>; + }; + temp_charger: charger { + temp_fan_off = <50>; + temp_fan_max = <65>; + temp_host_high = <80>; + temp_host_halt = <85>; + temp_host_release_high = <75>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_charger_thermistor>; + }; + }; + + usba { + compatible = "cros-ec,usba-port-enable-pins"; + /* + * ILIM_SEL pins are referred to by legacy enum name, + * GPIO_USB*_ILIM_SEL. + */ + enable-pins = <&gpio_en_usb_a0_vbus &gpio_en_usb_a1_vbus>; + status = "okay"; + }; + + usbc { + #address-cells = <1>; + #size-cells = <0>; + + port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + bc12 = <&bc12_port0>; + chg = <&chg_port0>; + tcpc = <&usbpd0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_0>; + }; + }; + port0-muxes { + virtual_mux_0: virtual-mux-0 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + bc12 = <&bc12_port1>; + chg = <&chg_port1>; + tcpc = <&tcpc_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_1 &tcpci_mux_1>; + }; + usb_mux_chain_1_no_mux: usb-mux-chain-1-no-mux { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; + }; + }; + port1-muxes { + virtual_mux_1: virtual-mux-1 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + tcpci_mux_1: tcpci-mux-1 { + compatible = "parade,usbc-mux-ps8xxx"; + }; + }; + }; + + binman { + ec-rw { + size = <0x50000>; + rw-fw { + rw-fwid { + /* Fix the lcoation of the FWID to the + * last 32 bytes of the flash. This + * ensures the RW entries in the FMAP + * stored in the RO section of flash + * are always correct. + */ + offset = <(0x50000 - 32)>; + }; + }; + }; + pad-after = <0x50000>; + }; +}; + +&thermistor_3V3_51K1_47K_4050B { + status = "okay"; +}; + +&adc_ec_vsense_pp3300_s5 { + /* + * Voltage divider on input has 47k upper and 220k lower legs with 3 V + * full-scale reading on the ADC. Apply the largest possible multiplier + * (without overflowing int32) to get the best possible approximation + * of the actual ratio, but derate by a factor of two to ensure + * unexpectedly high values won't overflow. + */ + mul = <(715828 / 2)>; + div = <(589820 / 2)>; +}; + +&adc0 { + pinctrl-0 = <&adc0_ch0_gpi0_default + &adc0_ch2_gpi2_default + &adc0_ch3_gpi3_default + &adc0_ch13_gpl0_default + &adc0_ch14_gpl1_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pinctrl { + i2c4_clk_gpe0_sleep: i2c4_clk_gpe0_sleep { + pinmuxs = <&pinctrle 0 IT8XXX2_ALT_DEFAULT>; + }; + i2c4_data_gpe7_sleep: i2c4_data_gpe7_sleep { + pinmuxs = <&pinctrle 7 IT8XXX2_ALT_DEFAULT>; + }; + i2c2_clk_gpf6_default: i2c2_clk_gpf6_default { + gpio-voltage = "1v8"; + }; + i2c2_data_gpf7_default: i2c2_data_gpf7_default { + gpio-voltage = "1v8"; + }; +}; + +&i2c0 { + label = "I2C_EEPROM"; + clock-frequency = <I2C_BITRATE_FAST>; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + label = "EEPROM_CBI"; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; + pinctrl-0 = <&i2c0_clk_gpb3_default + &i2c0_data_gpb4_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c1 { + label = "I2C_BATTERY"; + clock-frequency = <50000>; + pinctrl-0 = <&i2c1_clk_gpc1_default + &i2c1_data_gpc2_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c2 { + label = "I2C_SENSOR"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c2_clk_gpf6_default + &i2c2_data_gpf7_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c4 { + label = "I2C_SUB_C1_TCPC"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; + pinctrl-0 = <&i2c4_clk_gpe0_default + &i2c4_data_gpe7_default>; + pinctrl-1 = <&i2c4_clk_gpe0_sleep + &i2c4_data_gpe7_sleep>; + pinctrl-names = "default", "sleep"; + status = "okay"; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port1: sm5803@32 { + compatible = "siliconmitus,sm5803"; + status = "okay"; + reg = <0x32>; + }; + + tcpc_port1: ps8745@b { + compatible = "parade,ps8xxx"; + reg = <0xb>; + tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; + }; +}; + +&i2c_ec_i2c_sub_usb_c1 { + /* + * Dynamic speed setting is used for AP-controlled firmware update + * of PS8745 TCPC/redriver: the AP lowers speed to 400 kHz in order + * to use more efficient window programming, then sets it back when + * done. + */ + dynamic-speed; +}; + +&i2c5 { + label = "I2C_USB_C0_TCPC"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; + pinctrl-0 = <&i2c5_clk_gpa4_default + &i2c5_data_gpa5_default>; + pinctrl-names = "default"; + status = "okay"; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port0: sm5803@32 { + compatible = "siliconmitus,sm5803"; + status = "okay"; + reg = <0x32>; + }; +}; + +&usbpd0 { + status = "okay"; +}; diff --git a/zephyr/program/nissa/yavilla/power_signals.dtsi b/zephyr/program/nissa/yavilla/power_signals.dtsi new file mode 100644 index 0000000000..d64ac83150 --- /dev/null +++ b/zephyr/program/nissa/yavilla/power_signals.dtsi @@ -0,0 +1,180 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + chosen { + intel-ap-pwrseq,espi = &espi0; + }; + + common-pwrseq { + compatible = "intel,ap-pwrseq"; + + sys-pwrok-delay = <10>; + all-sys-pwrgd-timeout = <20>; + }; + + pwr-en-pp5000-s5 { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PP5000_S5 enable output to regulator"; + enum-name = "PWR_EN_PP5000_A"; + gpios = <&gpiok 5 0>; + output; + }; + pwr-en-pp3300-s5 { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PP3300_S5 enable output to LS"; + enum-name = "PWR_EN_PP3300_A"; + gpios = <&gpioc 5 0>; + output; + }; + pwr-pg-ec-rsmrst-odl { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST power good from regulator"; + enum-name = "PWR_RSMRST"; + gpios = <&gpioe 1 0>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-ec-pch-rsmrst-odl { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST output to PCH"; + enum-name = "PWR_EC_PCH_RSMRST"; + gpios = <&gpioh 0 0>; + output; + }; + pwr-slp-s0-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_S0_L input from PCH"; + enum-name = "PWR_SLP_S0"; + gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-slp-s3-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_S3_L input from PCH"; + enum-name = "PWR_SLP_S3"; + gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-slp-sus-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_SUS_L input from PCH"; + enum-name = "PWR_SLP_SUS"; + gpios = <&gpiog 2 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-ec-soc-dsw-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "DSW_PWROK output to PCH"; + enum-name = "PWR_EC_SOC_DSW_PWROK"; + gpios = <&gpiol 7 0>; + output; + }; + pwr-vccst-pwrgd-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "VCCST_PWRGD output to PCH"; + enum-name = "PWR_VCCST_PWRGD"; + gpios = <&gpioe 5 (GPIO_OPEN_DRAIN | GPIO_VOLTAGE_1P8)>; + output; + }; + pwr-imvp9-vrrdy-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "VRRDY input from IMVP9"; + enum-name = "PWR_IMVP9_VRRDY"; + gpios = <&gpioj 4 0>; + }; + pwr-pch-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PCH_PWROK output to PCH"; + enum-name = "PWR_PCH_PWROK"; + gpios = <&gpiod 6 GPIO_OPEN_DRAIN>; + output; + }; + pwr-ec-pch-sys-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_PWROK output to PCH"; + enum-name = "PWR_EC_PCH_SYS_PWROK"; + gpios = <&gpiof 2 0>; + output; + }; + pwr-sys-rst-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_RESET# output to PCH"; + enum-name = "PWR_SYS_RST"; + gpios = <&gpiod 1 (GPIO_ACTIVE_LOW|GPIO_OPEN_DRAIN)>; + output; + }; + pwr-slp-s4 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S4 virtual wire input from PCH"; + enum-name = "PWR_SLP_S4"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S4"; + vw-invert; + }; + pwr-slp-s5 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S5 virtual wire input from PCH"; + enum-name = "PWR_SLP_S5"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S5"; + vw-invert; + }; + pwr-all-sys-pwrgd { + /* + * This is a board level signal, since this + * signal needs some special processing. + */ + compatible = "intel,ap-pwrseq-external"; + dbg-label = "Combined all power good"; + enum-name = "PWR_ALL_SYS_PWRGD"; + }; + pwr-adc-pp3300 { + compatible = "intel,ap-pwrseq-adc"; + dbg-label = "PP3300_PROC"; + enum-name = "PWR_DSW_PWROK"; + trigger-high = <&vcmp0>; + trigger-low = <&vcmp1>; + }; + pwr-adc-pp1p05 { + compatible = "intel,ap-pwrseq-adc"; + dbg-label = "PP1P05_PROC"; + enum-name = "PWR_PG_PP1P05"; + trigger-high = <&vcmp2>; + trigger-low = <&vcmp3>; + }; + +}; + +&vcmp0 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_GREATER>; + /* + * This is 90% of nominal voltage considering voltage + * divider on ADC input. + */ + threshold-mv = <2448>; + io-channels = <&adc0 0>; +}; +&vcmp1 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_LESS_OR_EQUAL>; + threshold-mv = <2448>; + io-channels = <&adc0 0>; +}; +&vcmp2 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_GREATER>; + /* Setting at 90% of nominal voltage */ + threshold-mv = <945>; + io-channels = <&adc0 14>; +}; +&vcmp3 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_LESS_OR_EQUAL>; + threshold-mv = <945>; + io-channels = <&adc0 14>; +}; diff --git a/zephyr/program/nissa/yavilla/project.conf b/zephyr/program/nissa/yavilla/project.conf new file mode 100644 index 0000000000..ac4fd6a3d2 --- /dev/null +++ b/zephyr/program/nissa/yavilla/project.conf @@ -0,0 +1,47 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_BOARD_YAVILLA=y + +# FW image +# TODO: Once this configuration is configured with binman's size property +# by default, it can be removed. +CONFIG_CROS_EC_RW_SIZE=0x50000 + +# Ensure recovery key combination (esc+refresh+power) is reliable: b/236580049 +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y +CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y + +# Sensors: disabled; yavilla is clamshell-only +CONFIG_PLATFORM_EC_LID_ANGLE=n +CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=n +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=n +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=n +CONFIG_PLATFORM_EC_ACCEL_FIFO=n +CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=n +CONFIG_PLATFORM_EC_GMR_TABLET_MODE=n +CONFIG_PLATFORM_EC_TABLET_MODE=n +CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=n +CONFIG_PLATFORM_EC_VOLUME_BUTTONS=n +CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ=100000 + +# Keyboard +CONFIG_PLATFORM_EC_KEYBOARD_KEYPAD=y +CONFIG_PLATFORM_EC_KBLIGHT_ENABLE_PIN=n +CONFIG_PLATFORM_EC_KEYBOARD_FACTORY_TEST=y + +# Fan +CONFIG_PLATFORM_EC_CUSTOM_FAN_CONTROL=y + +# LED +CONFIG_PLATFORM_EC_LED_PWM=n + +CONFIG_NISSA_SUB_BOARD=n + +# Both ports use a SLGC55545 smart switch with CTL1..3 fixed high, +# for SDP2 or CDP only. +CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART=y +CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_CDP_SDP_ONLY=y +CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_DEFAULT_CDP=y +CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_INVERTED=y diff --git a/zephyr/program/nissa/yavilla/project.overlay b/zephyr/program/nissa/yavilla/project.overlay new file mode 100644 index 0000000000..97f431022c --- /dev/null +++ b/zephyr/program/nissa/yavilla/project.overlay @@ -0,0 +1,13 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "../shi.dtsi" + +#include "cbi.dtsi" +#include "fan.dtsi" +#include "gpio.dtsi" +#include "keyboard.dtsi" +#include "overlay.dtsi" +#include "power_signals.dtsi" diff --git a/zephyr/program/nissa/yavilla/src/board.c b/zephyr/program/nissa/yavilla/src/board.c new file mode 100644 index 0000000000..f89b92ebd8 --- /dev/null +++ b/zephyr/program/nissa/yavilla/src/board.c @@ -0,0 +1,31 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* yavilla hardware configuration */ +#include "gpio/gpio_int.h" +#include "hooks.h" +#include "task.h" + +#include <zephyr/drivers/gpio.h> +#include <zephyr/drivers/pinctrl.h> +#include <zephyr/init.h> +#include <zephyr/kernel.h> +#include <zephyr/sys/printk.h> +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); +__override uint8_t board_get_usb_pd_port_count(void) +{ + return 2; +} +/* + * Enable interrupts + */ +static void board_init(void) +{ + /* + * Enable USB-C interrupts. + */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0)); + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1)); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); diff --git a/zephyr/program/nissa/yavilla/src/charger.c b/zephyr/program/nissa/yavilla/src/charger.c new file mode 100644 index 0000000000..09484fb86a --- /dev/null +++ b/zephyr/program/nissa/yavilla/src/charger.c @@ -0,0 +1,73 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "battery.h" +#include "battery_fuel_gauge.h" +#include "charger.h" +#include "console.h" +#include "driver/charger/sm5803.h" +#include "extpower.h" +#include "usb_pd.h" + +#include <zephyr/logging/log.h> + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +int extpower_is_present(void) +{ + int port; + int rv; + bool acok; + + for (port = 0; port < board_get_usb_pd_port_count(); port++) { + rv = sm5803_is_acok(port, &acok); + if ((rv == EC_SUCCESS) && acok) + return 1; + } + + return 0; +} + +/* + * Yavilla does not have a GPIO indicating whether extpower is present, + * so detect using the charger(s). + */ +__override void board_check_extpower(void) +{ + static int last_extpower_present; + int extpower_present = extpower_is_present(); + + if (last_extpower_present ^ extpower_present) + extpower_handle_update(extpower_present); + + last_extpower_present = extpower_present; +} + +__override void board_hibernate(void) +{ + /* Shut down the chargers */ + if (board_get_usb_pd_port_count() == 2) + sm5803_hibernate(CHARGER_SECONDARY); + sm5803_hibernate(CHARGER_PRIMARY); + LOG_INF("Charger(s) hibernated"); + cflush(); +} + +__override int board_get_default_battery_type(void) +{ + int type = DEFAULT_BATTERY_TYPE; + int cells; + + if (charger_get_battery_cells(CHARGER_PRIMARY, &cells) == EC_SUCCESS) { + if (cells == 3) + type = DEFAULT_BATTERY_TYPE_3S; + if (cells != 2 && cells != 3) + LOG_ERR("Unexpected number of cells"); + } else { + LOG_ERR("Failed to get default battery type"); + } + + return type; +} diff --git a/zephyr/program/nissa/yavilla/src/fan.c b/zephyr/program/nissa/yavilla/src/fan.c new file mode 100644 index 0000000000..07517abbe9 --- /dev/null +++ b/zephyr/program/nissa/yavilla/src/fan.c @@ -0,0 +1,36 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include "cros_cbi.h" +#include "fan.h" +#include "gpio/gpio.h" +#include "hooks.h" + +#include <zephyr/devicetree.h> +#include <zephyr/drivers/gpio.h> +#include <zephyr/logging/log.h> +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +static void fan_init(void) +{ + int ret; + uint32_t val; + /* + * Retrieve the fan config. + */ + ret = cros_cbi_get_fw_config(FW_FAN, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_FAN); + return; + } + if (val != FW_FAN_PRESENT) { + /* Disable the fan */ + fan_set_count(0); + } else { + /* Configure the fan enable GPIO */ + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_fan_enable), + GPIO_OUTPUT); + } +} +DECLARE_HOOK(HOOK_INIT, fan_init, HOOK_PRIO_POST_FIRST); diff --git a/zephyr/program/nissa/yavilla/src/keyboard.c b/zephyr/program/nissa/yavilla/src/keyboard.c new file mode 100644 index 0000000000..93db22132f --- /dev/null +++ b/zephyr/program/nissa/yavilla/src/keyboard.c @@ -0,0 +1,125 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include "cros_cbi.h" +#include "ec_commands.h" +#include "gpio_it8xxx2.h" +#include "hooks.h" +#include "keyboard_8042_sharedlib.h" +#include "keyboard_scan.h" +#include "timer.h" + +#include <zephyr/logging/log.h> + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +/* Keyboard scan setting */ +__override struct keyboard_scan_config keyscan_config = { + /* Increase from 50 us, because KSO_02 passes through the H1. */ + .output_settle_us = 80, + /* Other values should be the same as the default configuration. */ + .debounce_down_us = 9 * MSEC, + .debounce_up_us = 30 * MSEC, + .scan_period_us = 3 * MSEC, + .min_post_scan_delay_us = 1000, + .poll_timeout_us = 100 * MSEC, + .actual_key_mask = { + 0x1c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xa4, 0xff, 0xf6, 0x55, 0xfe, 0xff, 0xff, 0xff, /* full set */ + }, +}; + +static const struct ec_response_keybd_config yavilla_kb_w_kb_light = { + .num_top_row_keys = 13, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_KBD_BKLIGHT_TOGGLE, /* T8 */ + TK_PLAY_PAUSE, /* T9 */ + TK_MICMUTE, /* T10 */ + TK_VOL_MUTE, /* T11 */ + TK_VOL_DOWN, /* T12 */ + TK_VOL_UP, /* T13 */ + }, + .capabilities = KEYBD_CAP_NUMERIC_KEYPAD, +}; + +static const struct ec_response_keybd_config yavilla_kb_wo_kb_light = { + .num_top_row_keys = 13, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_PLAY_PAUSE, /* T8 */ + TK_MICMUTE, /* T9 */ + TK_VOL_MUTE, /* T10 */ + TK_VOL_DOWN, /* T11 */ + TK_VOL_UP, /* T12 */ + TK_MENU, /* T13 */ + }, + .capabilities = KEYBD_CAP_NUMERIC_KEYPAD, +}; + +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) +{ + uint32_t val; + + cros_cbi_get_fw_config(FW_KB_BACKLIGHT, &val); + + if (val == FW_KB_BACKLIGHT_OFF) + return &yavilla_kb_wo_kb_light; + else + return &yavilla_kb_w_kb_light; +} + +/* + * Keyboard layout decided by FW config. + */ +static void kb_layout_init(void) +{ + int ret; + uint32_t val; + + ret = cros_cbi_get_fw_config(FW_KB_LAYOUT, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", + FW_KB_LAYOUT); + return; + } + /* + * If keyboard is US2(FW_KB_LAYOUT_US2), we need translate right ctrl + * to backslash(\|) key. + */ + if (val == FW_KB_LAYOUT_US2) + set_scancode_set2(4, 0, get_scancode_set2(2, 7)); +} +DECLARE_HOOK(HOOK_INIT, kb_layout_init, HOOK_PRIO_POST_FIRST); + +/* + * Map keyboard connector pins to EC GPIO pins for factory test. + * Pins mapped to {-1, -1} are skipped. + * The connector has 30 pins total, and there is no pin 0. + */ +const int keyboard_factory_scan_pins[][2] = { + { -1, -1 }, { GPIO_KSOH, 4 }, { GPIO_KSOH, 0 }, { GPIO_KSOH, 1 }, + { GPIO_KSOH, 3 }, { GPIO_KSOH, 2 }, { -1, -1 }, { -1, -1 }, + { GPIO_KSOL, 5 }, { GPIO_KSOL, 6 }, { -1, -1 }, { GPIO_KSOL, 3 }, + { GPIO_KSOL, 2 }, { GPIO_KSI, 0 }, { GPIO_KSOL, 1 }, { GPIO_KSOL, 4 }, + { GPIO_KSI, 3 }, { GPIO_KSI, 2 }, { GPIO_KSOL, 0 }, { GPIO_KSI, 5 }, + { GPIO_KSI, 4 }, { GPIO_KSOL, 7 }, { GPIO_KSI, 6 }, { GPIO_KSI, 7 }, + { GPIO_KSI, 1 }, { -1, -1 }, { GPIO_KSOH, 5 }, { -1, -1 }, + { GPIO_KSOH, 6 }, { -1, -1 }, { -1, -1 }, +}; +const int keyboard_factory_scan_pins_used = + ARRAY_SIZE(keyboard_factory_scan_pins); diff --git a/zephyr/program/nissa/yavilla/src/led.c b/zephyr/program/nissa/yavilla/src/led.c new file mode 100644 index 0000000000..a1ae6b24cf --- /dev/null +++ b/zephyr/program/nissa/yavilla/src/led.c @@ -0,0 +1,231 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "battery.h" +#include "charge_manager.h" +#include "charge_state.h" +#include "chipset.h" +#include "ec_commands.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "led_common.h" + +#include <stdint.h> + +#define BAT_LED_ON 0 +#define BAT_LED_OFF 1 + +#define BATT_LOW_BCT 10 + +#define LED_TICKS_PER_CYCLE 4 +#define LED_TICKS_PER_CYCLE_S3 4 +#define LED_ON_TICKS 2 +#define POWER_LED_ON_S3_TICKS 2 + +const enum ec_led_id supported_led_ids[] = { EC_LED_ID_LEFT_LED, + EC_LED_ID_RIGHT_LED }; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +enum led_color { + LED_OFF = 0, + LED_AMBER, + LED_WHITE, + LED_COLOR_COUNT /* Number of colors, not a color itself */ +}; + +enum led_port { LEFT_PORT = 0, RIGHT_PORT }; + +static void led_set_color_battery(int port, enum led_color color) +{ + const struct gpio_dt_spec *amber_led, *white_led; + + if (port == LEFT_PORT) { + amber_led = GPIO_DT_FROM_NODELABEL(gpio_c0_charger_led_amber_l); + white_led = GPIO_DT_FROM_NODELABEL(gpio_c0_charger_led_white_l); + } else if (port == RIGHT_PORT) { + amber_led = GPIO_DT_FROM_NODELABEL(gpio_c1_charger_led_amber_l); + white_led = GPIO_DT_FROM_NODELABEL(gpio_c1_charger_led_white_l); + } + + switch (color) { + case LED_WHITE: + gpio_pin_set_dt(white_led, BAT_LED_ON); + gpio_pin_set_dt(amber_led, BAT_LED_OFF); + break; + case LED_AMBER: + gpio_pin_set_dt(white_led, BAT_LED_OFF); + gpio_pin_set_dt(amber_led, BAT_LED_ON); + break; + case LED_OFF: + gpio_pin_set_dt(white_led, BAT_LED_OFF); + gpio_pin_set_dt(amber_led, BAT_LED_OFF); + break; + default: + break; + } +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + switch (led_id) { + case EC_LED_ID_LEFT_LED: + brightness_range[EC_LED_COLOR_WHITE] = 1; + brightness_range[EC_LED_COLOR_AMBER] = 1; + break; + case EC_LED_ID_RIGHT_LED: + brightness_range[EC_LED_COLOR_WHITE] = 1; + brightness_range[EC_LED_COLOR_AMBER] = 1; + break; + default: + break; + } +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + switch (led_id) { + case EC_LED_ID_LEFT_LED: + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_battery(LEFT_PORT, LED_WHITE); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(LEFT_PORT, LED_AMBER); + else + led_set_color_battery(LEFT_PORT, LED_OFF); + break; + case EC_LED_ID_RIGHT_LED: + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_battery(RIGHT_PORT, LED_WHITE); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(RIGHT_PORT, LED_AMBER); + else + led_set_color_battery(RIGHT_PORT, LED_OFF); + break; + default: + return EC_ERROR_PARAM1; + } + + return EC_SUCCESS; +} + +/* + * Set active charge port color to the parameter, turn off all others. + * If no port is active (-1), turn off all LEDs. + */ +static void set_active_port_color(enum led_color color) +{ + int port = charge_manager_get_active_charge_port(); + + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) + led_set_color_battery(RIGHT_PORT, + (port == RIGHT_PORT) ? color : LED_OFF); + if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) + led_set_color_battery(LEFT_PORT, + (port == LEFT_PORT) ? color : LED_OFF); +} + +static void led_set_battery(void) +{ + static unsigned int battery_ticks; + static int suspend_ticks; + + battery_ticks++; + + /* + * Override battery LEDs for Yavilla, Yavilla is non-power LED + * design, blinking both two side battery white LEDs to indicate + * system suspend with non-charging state. + */ + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && + charge_get_state() != PWR_STATE_CHARGE) { + suspend_ticks++; + + led_set_color_battery(RIGHT_PORT, + suspend_ticks % LED_TICKS_PER_CYCLE_S3 < + POWER_LED_ON_S3_TICKS ? + LED_WHITE : + LED_OFF); + led_set_color_battery(LEFT_PORT, + suspend_ticks % LED_TICKS_PER_CYCLE_S3 < + POWER_LED_ON_S3_TICKS ? + LED_WHITE : + LED_OFF); + return; + } + + suspend_ticks = 0; + + switch (charge_get_state()) { + case PWR_STATE_CHARGE: + /* Always indicate when charging, even in suspend. */ + set_active_port_color(LED_AMBER); + break; + case PWR_STATE_DISCHARGE: + /* + * Blinking amber LEDs slowly if battery is lower 10 + * percentage. + */ + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) { + if (charge_get_percent() < BATT_LOW_BCT) + led_set_color_battery( + RIGHT_PORT, + (battery_ticks % LED_TICKS_PER_CYCLE < + LED_ON_TICKS) ? + LED_AMBER : + LED_OFF); + else + led_set_color_battery(RIGHT_PORT, LED_OFF); + } + + if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) { + if (charge_get_percent() < BATT_LOW_BCT) + led_set_color_battery( + LEFT_PORT, + (battery_ticks % LED_TICKS_PER_CYCLE < + LED_ON_TICKS) ? + LED_AMBER : + LED_OFF); + else + led_set_color_battery(LEFT_PORT, LED_OFF); + } + break; + case PWR_STATE_ERROR: + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) { + led_set_color_battery( + RIGHT_PORT, + (battery_ticks & 0x1) ? LED_AMBER : LED_OFF); + } + + if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) { + led_set_color_battery(LEFT_PORT, (battery_ticks & 0x1) ? + LED_AMBER : + LED_OFF); + } + break; + case PWR_STATE_CHARGE_NEAR_FULL: + set_active_port_color(LED_WHITE); + break; + case PWR_STATE_IDLE: /* External power connected in IDLE */ + set_active_port_color(LED_WHITE); + break; + case PWR_STATE_FORCED_IDLE: + set_active_port_color( + (battery_ticks % LED_TICKS_PER_CYCLE < LED_ON_TICKS) ? + LED_AMBER : + LED_OFF); + break; + default: + /* Other states don't alter LED behavior */ + break; + } +} + +/* Called by hook task every TICK(IT83xx 500ms) */ +static void led_tick(void) +{ + led_set_battery(); +} +DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT); diff --git a/zephyr/program/nissa/yavilla/src/thermal.c b/zephyr/program/nissa/yavilla/src/thermal.c new file mode 100644 index 0000000000..b2e4796837 --- /dev/null +++ b/zephyr/program/nissa/yavilla/src/thermal.c @@ -0,0 +1,108 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" +#include "fan.h" +#include "temp_sensor/temp_sensor.h" +#include "thermal.h" +#include "util.h" + +#include <ap_power/ap_power_interface.h> + +#define TEMP_CPU TEMP_SENSOR_ID(DT_NODELABEL(temp_cpu)) +#define TEMP_5V TEMP_SENSOR_ID(DT_NODELABEL(temp_5v_regulator)) +#define TEMP_CHARGER TEMP_SENSOR_ID(DT_NODELABEL(temp_charger)) + +struct fan_step { + /* + * Sensor 1~3 trigger point, set -1 if we're not using this + * sensor to determine fan speed. + */ + int8_t on[TEMP_SENSOR_COUNT]; + /* + * Sensor 1~3 trigger point, set -1 if we're not using this + * sensor to determine fan speed. + */ + int8_t off[TEMP_SENSOR_COUNT]; + /* Fan rpm */ + uint16_t rpm[FAN_CH_COUNT]; +}; + +#define FAN_TABLE_ENTRY(nd) \ + { \ + .on = DT_PROP(nd, temp_on), \ + .off = DT_PROP(nd, temp_off), \ + .rpm = DT_PROP(nd, rpm_target), \ + }, + +static const struct fan_step fan_step_table[] = { DT_FOREACH_CHILD( + DT_INST(0, cros_ec_fan_steps), FAN_TABLE_ENTRY) }; + +int fan_table_to_rpm(int fan, int *temp) +{ + /* current fan level */ + static int current_level; + /* previous sensor temperature */ + static int prev_tmp[TEMP_SENSOR_COUNT]; + int i; + /* + * Compare the current and previous temperature, we have + * the three paths : + * 1. decreasing path. (check the release point) + * 2. increasing path. (check the trigger point) + * 3. invariant path. (return the current RPM) + * + * Yavilla thermal table V1-1 + * Increase path judgment: CPU || (5V && Charger) + * Decrease path judgment: CPU && 5V && Charger + */ + if (temp[TEMP_CPU] < prev_tmp[TEMP_CPU] || + temp[TEMP_5V] < prev_tmp[TEMP_5V] || + temp[TEMP_CHARGER] < prev_tmp[TEMP_CHARGER]) { + for (i = current_level; i > 0; i--) { + if (temp[TEMP_CPU] < fan_step_table[i].off[TEMP_CPU] && + temp[TEMP_5V] < fan_step_table[i].off[TEMP_5V] && + temp[TEMP_CHARGER] < + fan_step_table[i].off[TEMP_CHARGER]) { + current_level = i - 1; + } else + break; + } + } else if (temp[TEMP_CPU] > prev_tmp[TEMP_CPU] || + temp[TEMP_5V] > prev_tmp[TEMP_5V] || + temp[TEMP_CHARGER] > prev_tmp[TEMP_CHARGER]) { + for (i = current_level; i < ARRAY_SIZE(fan_step_table); i++) { + if (temp[TEMP_CPU] > fan_step_table[i].on[TEMP_CPU] || + (temp[TEMP_5V] > fan_step_table[i].on[TEMP_5V] && + temp[TEMP_CHARGER] > + fan_step_table[i].on[TEMP_CHARGER])) { + current_level = i + 1; + } else + break; + } + } + if (current_level < 0) + current_level = 0; + + if (current_level >= ARRAY_SIZE(fan_step_table)) + current_level = ARRAY_SIZE(fan_step_table) - 1; + + for (i = 0; i < TEMP_SENSOR_COUNT; ++i) + prev_tmp[i] = temp[i]; + + return fan_step_table[current_level].rpm[fan]; +} + +void board_override_fan_control(int fan, int *temp) +{ + /* + * In common/fan.c pwm_fan_stop() will turn off fan + * when chipset suspend or shutdown. + */ + if (ap_power_in_state(AP_POWER_STATE_ON)) { + fan_set_rpm_mode(fan, 1); + fan_set_rpm_target(fan, fan_table_to_rpm(fan, temp)); + } +} diff --git a/zephyr/program/nissa/yavilla/src/usbc.c b/zephyr/program/nissa/yavilla/src/usbc.c new file mode 100644 index 0000000000..fa280615ee --- /dev/null +++ b/zephyr/program/nissa/yavilla/src/usbc.c @@ -0,0 +1,328 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "charge_state_v2.h" +#include "chipset.h" +#include "driver/charger/sm5803.h" +#include "driver/tcpm/it83xx_pd.h" +#include "driver/tcpm/ps8xxx_public.h" +#include "driver/tcpm/tcpci.h" +#include "hooks.h" +#include "system.h" +#include "usb_mux.h" + +#include <zephyr/logging/log.h> + +#include <ap_power/ap_power.h> + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +/* Vconn control for integrated ITE TCPC */ +void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) +{ + /* Vconn control is only for port 0 */ + if (port) + return; + + if (cc_pin == USBPD_CC_PIN_1) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_usb_c0_cc1_vconn), + !!enabled); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_usb_c0_cc2_vconn), + !!enabled); +} + +__override bool pd_check_vbus_level(int port, enum vbus_level level) +{ + return sm5803_check_vbus_level(port, level); +} + +/* + * Putting chargers into LPM when in suspend reduces power draw by about 8mW + * per charger, but also seems critical to correct operation in source mode: + * if chargers are not in LPM when a sink is first connected, VBUS sourcing + * works even if the partner is later removed (causing LPM entry) and + * reconnected (causing LPM exit). If in LPM initially, sourcing VBUS + * consistently causes the charger to report (apparently spurious) overcurrent + * failures. + * + * In short, this is important to making things work correctly but we don't + * understand why. + */ +static void board_chargers_suspend(struct ap_power_ev_callback *const cb, + const struct ap_power_ev_data data) +{ + void (*fn)(int chgnum); + + switch (data.event) { + case AP_POWER_SUSPEND: + fn = sm5803_enable_low_power_mode; + break; + case AP_POWER_RESUME: + fn = sm5803_disable_low_power_mode; + break; + default: + LOG_WRN("%s: power event %d is not recognized", __func__, + data.event); + return; + } + + fn(CHARGER_PRIMARY); + if (board_get_charger_chip_count() > 1) + fn(CHARGER_SECONDARY); +} + +static int board_chargers_suspend_init(const struct device *unused) +{ + static struct ap_power_ev_callback cb = { + .handler = board_chargers_suspend, + .events = AP_POWER_SUSPEND | AP_POWER_RESUME, + }; + ap_power_ev_add_callback(&cb); + return 0; +} +SYS_INIT(board_chargers_suspend_init, APPLICATION, 0); + +int board_set_active_charge_port(int port) +{ + int is_real_port = (port >= 0 && port < board_get_usb_pd_port_count()); + int i; + int old_port; + int rv; + + if (!is_real_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + old_port = charge_manager_get_active_charge_port(); + LOG_INF("Charge update: p%d -> p%d", old_port, port); + + /* Check if port is sourcing VBUS. */ + if (port != CHARGE_PORT_NONE && charger_is_sourcing_otg_power(port)) { + LOG_WRN("Skip enable p%d: already sourcing", port); + return EC_ERROR_INVAL; + } + + /* Disable sinking on all ports except the desired one */ + for (i = 0; i < board_get_usb_pd_port_count(); i++) { + if (i == port) + continue; + + if (sm5803_vbus_sink_enable(i, 0)) + /* + * Do not early-return because this can fail during + * power-on which would put us into a loop. + */ + LOG_WRN("p%d: sink path disable failed.", i); + } + + /* Don't enable anything (stop here) if no ports were requested */ + if ((port == CHARGE_PORT_NONE) || (old_port == port)) + return EC_SUCCESS; + + /* + * Stop the charger IC from switching while changing ports. Otherwise, + * we can overcurrent the adapter we're switching to. (crbug.com/926056) + */ + if (old_port != CHARGE_PORT_NONE) + charger_discharge_on_ac(1); + + /* Enable requested charge port. */ + rv = sm5803_vbus_sink_enable(port, 1); + if (rv) + LOG_WRN("p%d: sink path enable failed: code %d", port, rv); + + /* Allow the charger IC to begin/continue switching. */ + charger_discharge_on_ac(0); + + return rv; +} + +uint16_t tcpc_get_alert_status(void) +{ + /* + * TCPC 0 is embedded in the EC and processes interrupts in the chip + * code (it83xx/intc.c). This function only needs to poll port C1 if + * present. + */ + uint16_t status = 0; + int regval; + + /* Is the C1 port IRQ line asserted? */ + if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_int_odl))) { + /* + * C1 IRQ is shared between BC1.2 and TCPC; poll TCPC to see if + * it asserted the IRQ. + */ + if (!tcpc_read16(1, TCPC_REG_ALERT, ®val)) { + if (regval) + status = PD_STATUS_TCPC_ALERT_1; + } + } + + return status; +} + +void pd_power_supply_reset(int port) +{ + int prev_en; + + if (port < 0 || port >= board_get_usb_pd_port_count()) + return; + + prev_en = charger_is_sourcing_otg_power(port); + + /* Disable Vbus */ + charger_enable_otg_power(port, 0); + + /* Discharge Vbus if previously enabled */ + if (prev_en) + sm5803_set_vbus_disch(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_set_power_supply_ready(int port) +{ + enum ec_error_list rv; + + if (port < 0 || port > board_get_usb_pd_port_count()) { + LOG_WRN("Port C%d does not exist, cannot enable VBUS", port); + return EC_ERROR_INVAL; + } + + /* Disable sinking */ + rv = sm5803_vbus_sink_enable(port, 0); + if (rv) { + LOG_WRN("C%d failed to disable sinking: %d", port, rv); + return rv; + } + + /* Disable Vbus discharge */ + rv = sm5803_set_vbus_disch(port, 0); + if (rv) { + LOG_WRN("C%d failed to clear VBUS discharge: %d", port, rv); + return rv; + } + + /* Provide Vbus */ + rv = charger_enable_otg_power(port, 1); + if (rv) { + LOG_WRN("C%d failed to enable VBUS sourcing: %d", port, rv); + return rv; + } + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +__override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp) +{ + int rv; + const int current = rp == TYPEC_RP_3A0 ? 3000 : 1500; + + rv = charger_set_otg_current_voltage(port, current, 5000); + if (rv != EC_SUCCESS) { + LOG_WRN("Failed to set source ilimit on port %d to %d: %d", + port, current, rv); + } +} + +void board_reset_pd_mcu(void) +{ + /* + * Do nothing. The integrated TCPC for C0 lacks a dedicated reset + * command, and C1 (if present) doesn't have a reset pin connected + * to the EC. + */ +} + +#define INT_RECHECK_US 5000 + +/* C0 interrupt line shared by BC 1.2 and charger */ + +static void check_c0_line(void); +DECLARE_DEFERRED(check_c0_line); + +static void notify_c0_chips(void) +{ + usb_charger_task_set_event(0, USB_CHG_EVENT_BC12); + sm5803_interrupt(0); +} + +static void check_c0_line(void) +{ + /* + * If line is still being held low, see if there's more to process from + * one of the chips + */ + if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl))) { + notify_c0_chips(); + hook_call_deferred(&check_c0_line_data, INT_RECHECK_US); + } +} + +void usb_c0_interrupt(enum gpio_signal s) +{ + /* Cancel any previous calls to check the interrupt line */ + hook_call_deferred(&check_c0_line_data, -1); + + /* Notify all chips using this line that an interrupt came in */ + notify_c0_chips(); + + /* Check the line again in 5ms */ + hook_call_deferred(&check_c0_line_data, INT_RECHECK_US); +} + +/* C1 interrupt line shared by BC 1.2, TCPC, and charger */ +void usb_c1_interrupt(enum gpio_signal s) +{ + /* Charger and BC1.2 are handled in board_process_pd_alert */ + schedule_deferred_pd_interrupt(1); +} + +/* + * Handle charger interrupts in the PD task. Not doing so can lead to a priority + * inversion where we fail to respond to TCPC alerts quickly enough because we + * don't get another edge on a shared IRQ until the other interrupt is cleared + * (or the IRQ is polled again), which happens in lower-priority tasks: the + * high-priority type-C handler is thus blocked on the lower-priority one(s). + * + * To avoid that, we run charger and BC1.2 interrupts synchronously alongside + * PD interrupts so they have the same priority. + */ +void board_process_pd_alert(int port) +{ + /* + * Port 0 doesn't use an external TCPC, so its interrupts don't need + * this special handling. + */ + if (port != 1) + return; + + if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_int_odl))) { + sm5803_handle_interrupt(port); + usb_charger_task_set_event_sync(1, USB_CHG_EVENT_BC12); + } + /* + * Immediately schedule another TCPC interrupt if it seems we haven't + * cleared all pending interrupts. + */ + if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_int_odl))) + schedule_deferred_pd_interrupt(port); +} + +int pd_snk_is_vbus_provided(int port) +{ + int chg_det = 0; + + sm5803_get_chg_det(port, &chg_det); + + return chg_det; +} diff --git a/zephyr/program/nissa/yavilla/yavilla_vif.xml b/zephyr/program/nissa/yavilla/yavilla_vif.xml new file mode 100644 index 0000000000..0df6a844b7 --- /dev/null +++ b/zephyr/program/nissa/yavilla/yavilla_vif.xml @@ -0,0 +1,350 @@ +<?xml version="1.0" encoding="utf-8"?>
+<vif:VIF xmlns:opt="http://usb.org/VendorInfoFileOptionalContent.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:vif="http://usb.org/VendorInfoFile.xsd">
+ <vif:VIF_Specification>3.19</vif:VIF_Specification>
+ <vif:VIF_App>
+ <vif:Vendor>USB-IF</vif:Vendor>
+ <vif:Name>VIF Editor</vif:Name>
+ <vif:Version>3.2.4.0</vif:Version>
+ </vif:VIF_App>
+ <vif:Vendor_Name>Google</vif:Vendor_Name>
+ <vif:Model_Part_Number>Yavilla</vif:Model_Part_Number>
+ <vif:Product_Revision>1</vif:Product_Revision>
+ <vif:TID>0</vif:TID>
+ <vif:VIF_Product_Type value="0">Port Product</vif:VIF_Product_Type>
+ <vif:Certification_Type value="1">Reference Platform</vif:Certification_Type>
+ <vif:Product>
+ <!--Product Level Content:-->
+ </vif:Product>
+ <vif:Component>
+ <!--Component 0: Port 0-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Component-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Port_Label>0</vif:Port_Label>
+ <vif:Connector_Type value="2">Type-C®</vif:Connector_Type>
+ <vif:USB4_Supported value="false" />
+ <vif:USB_PD_Support value="true" />
+ <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type>
+ <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine>
+ <vif:Port_Battery_Powered value="true" />
+ <vif:BC_1_2_Support value="2">Charging Port</vif:BC_1_2_Support>
+ <vif:Captive_Cable value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;General PD-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Spec_Revision_Major value="3" />
+ <vif:PD_Spec_Revision_Minor value="1" />
+ <vif:PD_Spec_Version_Major value="1" />
+ <vif:PD_Spec_Version_Minor value="3" />
+ <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision>
+ <vif:SOP_Capable value="true" />
+ <vif:SOP_P_Capable value="true" />
+ <vif:SOP_PP_Capable value="true" />
+ <vif:SOP_P_Debug_Capable value="false" />
+ <vif:SOP_PP_Debug_Capable value="false" />
+ <vif:Manufacturer_Info_Supported_Port value="true" />
+ <vif:Manufacturer_Info_VID_Port value="6353">18D1</vif:Manufacturer_Info_VID_Port>
+ <vif:Manufacturer_Info_PID_Port value="20570">505A</vif:Manufacturer_Info_PID_Port>
+ <vif:Chunking_Implemented_SOP value="true" />
+ <vif:Unchunked_Extended_Messages_Supported value="false" />
+ <vif:Security_Msgs_Supported_SOP value="false" />
+ <vif:Unconstrained_Power value="false" />
+ <vif:Num_Fixed_Batteries value="1" />
+ <vif:Num_Swappable_Battery_Slots value="0" />
+ <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Capabilities-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:USB_Comms_Capable value="true" />
+ <vif:DR_Swap_To_DFP_Supported value="true" />
+ <vif:DR_Swap_To_UFP_Supported value="false" />
+ <vif:VCONN_Swap_To_On_Supported value="true" />
+ <vif:VCONN_Swap_To_Off_Supported value="true" />
+ <vif:Responds_To_Discov_SOP_UFP value="false" />
+ <vif:Responds_To_Discov_SOP_DFP value="true" />
+ <vif:Attempts_Discov_SOP value="true" />
+ <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available>
+ <vif:Data_Reset_Supported value="false" />
+ <vif:Enter_USB_Supported value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Type-C®-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Type_C_Can_Act_As_Host value="true" />
+ <vif:Type_C_Can_Act_As_Device value="false" />
+ <vif:Type_C_Implements_Try_SRC value="true" />
+ <vif:Type_C_Implements_Try_SNK value="false" />
+ <vif:Type_C_Supports_Audio_Accessory value="false" />
+ <vif:Type_C_Is_VCONN_Powered_Accessory value="false" />
+ <vif:Type_C_Is_Debug_Target_SRC value="true" />
+ <vif:Type_C_Is_Debug_Target_SNK value="true" />
+ <vif:RP_Value value="1">1.5A</vif:RP_Value>
+ <vif:Type_C_Port_On_Hub value="false" />
+ <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source>
+ <vif:Type_C_Sources_VCONN value="true" />
+ <vif:Type_C_Is_Alt_Mode_Controller value="true" />
+ <vif:Type_C_Is_Alt_Mode_Adapter value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Product Power-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW>
+ <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Host-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Host_Supports_USB_Data value="true" />
+ <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed>
+ <vif:Host_Contains_Captive_Retimer value="false" />
+ <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
+ <vif:Host_Is_Embedded value="false" />
+ <vif:Host_Suspend_Supported value="true" />
+ <vif:Is_DFP_On_Hub value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Battery Charging 1.2-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Source-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source>
+ <vif:EPR_Supported_As_Src value="false" />
+ <vif:USB_Suspend_May_Be_Cleared value="false" />
+ <vif:Sends_Pings value="false" />
+ <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
+ <vif:Master_Port value="false" />
+ <vif:Num_Src_PDOs value="1" />
+ <vif:PD_OC_Protection value="true" />
+ <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method>
+ <!--Bundle: SrcPdoList-->
+ <vif:SrcPdoList>
+ <vif:SrcPDO>
+ <!--Source PDO 1-->
+ <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type>
+ <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current>
+ <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage>
+ <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current>
+ <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce>
+ <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold>
+ </vif:SrcPDO>
+ </vif:SrcPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Sink-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Sink value="45000">45000 mW</vif:PD_Power_As_Sink>
+ <vif:EPR_Supported_As_Snk value="false" />
+ <vif:No_USB_Suspend_May_Be_Set value="true" />
+ <vif:GiveBack_May_Be_Set value="false" />
+ <vif:Higher_Capability_Set value="false" />
+ <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source>
+ <vif:Num_Snk_PDOs value="3" />
+ <!--Bundle: SnkPdoList-->
+ <vif:SnkPdoList>
+ <vif:SnkPDO>
+ <!--Sink PDO 1-->
+ <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 2-->
+ <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 3-->
+ <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ </vif:SnkPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Dual Role-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Accepts_PR_Swap_As_Src value="true" />
+ <vif:Accepts_PR_Swap_As_Snk value="true" />
+ <vif:Requests_PR_Swap_As_Src value="true" />
+ <vif:Requests_PR_Swap_As_Snk value="true" />
+ <vif:FR_Swap_Supported_As_Initial_Sink value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;SOP Discover ID-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:XID_SOP value="0" />
+ <vif:Data_Capable_As_USB_Host_SOP value="true" />
+ <vif:Data_Capable_As_USB_Device_SOP value="false" />
+ <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP>
+ <vif:Product_Type_DFP_SOP value="2">PDUSB Host</vif:Product_Type_DFP_SOP>
+ <vif:DFP_VDO_Port_Number value="0" />
+ <vif:Modal_Operation_Supported_SOP value="false" />
+ <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP>
+ <vif:PID_SOP value="20570">505A</vif:PID_SOP>
+ <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP>
+ </vif:Component>
+ <vif:Component>
+ <!--Component 1: Port 1-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Component-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Port_Label>1</vif:Port_Label>
+ <vif:Connector_Type value="2">Type-C®</vif:Connector_Type>
+ <vif:USB4_Supported value="false" />
+ <vif:USB_PD_Support value="true" />
+ <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type>
+ <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine>
+ <vif:Port_Battery_Powered value="true" />
+ <vif:BC_1_2_Support value="2">Charging Port</vif:BC_1_2_Support>
+ <vif:Captive_Cable value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;General PD-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Spec_Revision_Major value="3" />
+ <vif:PD_Spec_Revision_Minor value="1" />
+ <vif:PD_Spec_Version_Major value="1" />
+ <vif:PD_Spec_Version_Minor value="3" />
+ <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision>
+ <vif:SOP_Capable value="true" />
+ <vif:SOP_P_Capable value="true" />
+ <vif:SOP_PP_Capable value="true" />
+ <vif:SOP_P_Debug_Capable value="false" />
+ <vif:SOP_PP_Debug_Capable value="false" />
+ <vif:Manufacturer_Info_Supported_Port value="true" />
+ <vif:Manufacturer_Info_VID_Port value="6353">18D1</vif:Manufacturer_Info_VID_Port>
+ <vif:Manufacturer_Info_PID_Port value="20570">505A</vif:Manufacturer_Info_PID_Port>
+ <vif:Chunking_Implemented_SOP value="true" />
+ <vif:Unchunked_Extended_Messages_Supported value="false" />
+ <vif:Security_Msgs_Supported_SOP value="false" />
+ <vif:Unconstrained_Power value="false" />
+ <vif:Num_Fixed_Batteries value="1" />
+ <vif:Num_Swappable_Battery_Slots value="0" />
+ <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Capabilities-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:USB_Comms_Capable value="true" />
+ <vif:DR_Swap_To_DFP_Supported value="true" />
+ <vif:DR_Swap_To_UFP_Supported value="false" />
+ <vif:VCONN_Swap_To_On_Supported value="true" />
+ <vif:VCONN_Swap_To_Off_Supported value="true" />
+ <vif:Responds_To_Discov_SOP_UFP value="false" />
+ <vif:Responds_To_Discov_SOP_DFP value="true" />
+ <vif:Attempts_Discov_SOP value="true" />
+ <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available>
+ <vif:Data_Reset_Supported value="false" />
+ <vif:Enter_USB_Supported value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Type-C®-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Type_C_Can_Act_As_Host value="true" />
+ <vif:Type_C_Can_Act_As_Device value="false" />
+ <vif:Type_C_Implements_Try_SRC value="true" />
+ <vif:Type_C_Implements_Try_SNK value="false" />
+ <vif:Type_C_Supports_Audio_Accessory value="false" />
+ <vif:Type_C_Is_VCONN_Powered_Accessory value="false" />
+ <vif:Type_C_Is_Debug_Target_SRC value="true" />
+ <vif:Type_C_Is_Debug_Target_SNK value="true" />
+ <vif:RP_Value value="1">1.5A</vif:RP_Value>
+ <vif:Type_C_Port_On_Hub value="false" />
+ <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source>
+ <vif:Type_C_Sources_VCONN value="true" />
+ <vif:Type_C_Is_Alt_Mode_Controller value="true" />
+ <vif:Type_C_Is_Alt_Mode_Adapter value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Product Power-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW>
+ <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Host-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Host_Supports_USB_Data value="true" />
+ <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed>
+ <vif:Host_Contains_Captive_Retimer value="true" />
+ <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
+ <vif:Host_Is_Embedded value="false" />
+ <vif:Host_Suspend_Supported value="true" />
+ <vif:Is_DFP_On_Hub value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Battery Charging 1.2-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Source-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source>
+ <vif:EPR_Supported_As_Src value="false" />
+ <vif:USB_Suspend_May_Be_Cleared value="false" />
+ <vif:Sends_Pings value="false" />
+ <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
+ <vif:Master_Port value="false" />
+ <vif:Num_Src_PDOs value="1" />
+ <vif:PD_OC_Protection value="true" />
+ <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method>
+ <!--Bundle: SrcPdoList-->
+ <vif:SrcPdoList>
+ <vif:SrcPDO>
+ <!--Source PDO 1-->
+ <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type>
+ <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current>
+ <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage>
+ <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current>
+ <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce>
+ <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold>
+ </vif:SrcPDO>
+ </vif:SrcPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Sink-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Sink value="45000">45000 mW</vif:PD_Power_As_Sink>
+ <vif:EPR_Supported_As_Snk value="false" />
+ <vif:No_USB_Suspend_May_Be_Set value="true" />
+ <vif:GiveBack_May_Be_Set value="false" />
+ <vif:Higher_Capability_Set value="false" />
+ <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source>
+ <vif:Num_Snk_PDOs value="3" />
+ <!--Bundle: SnkPdoList-->
+ <vif:SnkPdoList>
+ <vif:SnkPDO>
+ <!--Sink PDO 1-->
+ <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 2-->
+ <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 3-->
+ <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ </vif:SnkPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Dual Role-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Accepts_PR_Swap_As_Src value="true" />
+ <vif:Accepts_PR_Swap_As_Snk value="true" />
+ <vif:Requests_PR_Swap_As_Src value="true" />
+ <vif:Requests_PR_Swap_As_Snk value="true" />
+ <vif:FR_Swap_Supported_As_Initial_Sink value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;SOP Discover ID-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:XID_SOP value="0" />
+ <vif:Data_Capable_As_USB_Host_SOP value="true" />
+ <vif:Data_Capable_As_USB_Device_SOP value="false" />
+ <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP>
+ <vif:Product_Type_DFP_SOP value="2">PDUSB Host</vif:Product_Type_DFP_SOP>
+ <vif:DFP_VDO_Port_Number value="1" />
+ <vif:Modal_Operation_Supported_SOP value="false" />
+ <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP>
+ <vif:PID_SOP value="20570">505A</vif:PID_SOP>
+ <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP>
+ </vif:Component>
+</vif:VIF>
diff --git a/zephyr/program/rex/BUILD.py b/zephyr/program/rex/BUILD.py index 82aa3833ec..89aee8b06d 100644 --- a/zephyr/program/rex/BUILD.py +++ b/zephyr/program/rex/BUILD.py @@ -5,7 +5,7 @@ """Define zmake projects for Rex.""" -def register_variant( +def register_rex_project( project_name, kconfig_files=None, ): @@ -25,14 +25,15 @@ def register_variant( here / project_name / "project.overlay", ], kconfig_files=kconfig_files, + inherited_from=["rex"], ) -register_variant( +register_rex_project( project_name="rex", ) -register_variant( +register_rex_project( project_name="rex-sans-sensors", kconfig_files=[ # Common to all projects. diff --git a/zephyr/program/rex/CMakeLists.txt b/zephyr/program/rex/CMakeLists.txt index 27d7dff068..1962569692 100644 --- a/zephyr/program/rex/CMakeLists.txt +++ b/zephyr/program/rex/CMakeLists.txt @@ -4,9 +4,13 @@ cmake_minimum_required(VERSION 3.20.5) find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") -project(rex) zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ "src/board_power.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/usbc_config.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/usb_pd_policy.c") + +if(DEFINED CONFIG_BOARD_REX) + project(rex) + add_subdirectory(rex) +endif() diff --git a/zephyr/program/rex/rex/CMakeLists.txt b/zephyr/program/rex/rex/CMakeLists.txt new file mode 100644 index 0000000000..74189cbbab --- /dev/null +++ b/zephyr/program/rex/rex/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cros_ec_library_include_directories_ifdef(CONFIG_BOARD_REX include) +zephyr_library_sources("src/usb_mux_config.c") diff --git a/zephyr/program/rex/rex/cbi.dtsi b/zephyr/program/rex/rex/cbi.dtsi new file mode 100644 index 0000000000..4d56d350cb --- /dev/null +++ b/zephyr/program/rex/rex/cbi.dtsi @@ -0,0 +1,46 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + rex-fw-config { + compatible = "cros-ec,cbi-fw-config"; + + /* + * FW_CONFIG field to enable USB DB. + */ + usb-db { + enum-name = "FW_USB_DB"; + start = <12>; + size = <3>; + + io-db-unknown { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_USB_DB_NOT_CONNECTED"; + value = <0>; + }; + io-db-usb3 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_USB_DB_USB3"; + value = <1>; + default; + }; + io-db-usb4-kb8010 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_USB_DB_USB4_KB8010"; + value = <2>; + }; + io-db-usb4-anx7452 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_USB_DB_USB4_ANX7452"; + value = <3>; + }; + io-db-usb4-hayden { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_USB_DB_USB4_HB"; + value = <4>; + }; + }; + }; +}; diff --git a/zephyr/program/rex/rex/project.overlay b/zephyr/program/rex/rex/project.overlay index b9cb51faba..5178aea5ef 100644 --- a/zephyr/program/rex/rex/project.overlay +++ b/zephyr/program/rex/rex/project.overlay @@ -16,5 +16,6 @@ #include "../usbc.dtsi" /* Rex project DTS includes */ +#include "cbi.dtsi" #include "led_pins.dtsi" #include "led_policy.dtsi" diff --git a/zephyr/program/rex/rex/src/usb_mux_config.c b/zephyr/program/rex/rex/src/usb_mux_config.c new file mode 100644 index 0000000000..a549235f3c --- /dev/null +++ b/zephyr/program/rex/rex/src/usb_mux_config.c @@ -0,0 +1,51 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Rex board-specific USB-C mux configuration */ + +#include "console.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "hooks.h" +#include "ioexpander.h" +#include "usb_mux.h" +#include "usbc/usb_muxes.h" + +#include <zephyr/drivers/gpio.h> +#include <zephyr/logging/log.h> + +#ifdef CONFIG_ZTEST + +#undef USB_MUX_ENABLE_ALTERNATIVE +#define USB_MUX_ENABLE_ALTERNATIVE(x) + +#undef TCPC_ENABLE_ALTERNATE_BY_NODELABEL +#define TCPC_ENABLE_ALTERNATE_BY_NODELABEL(x, y) + +#undef PPC_ENABLE_ALTERNATE_BY_NODELABEL +#define PPC_ENABLE_ALTERNATE_BY_NODELABEL(x, y) + +#endif /* CONFIG_ZTEST */ + +LOG_MODULE_DECLARE(rex, CONFIG_REX_LOG_LEVEL); + +static void setup_mux(void) +{ + int ret; + uint32_t val; + + ret = cros_cbi_get_fw_config(FW_USB_DB, &val); + if (ret != 0) { + return; + } + + if (val == FW_USB_DB_NOT_CONNECTED) { + LOG_INF("USB DB: not connected"); + } + if (val == FW_USB_DB_USB3) { + LOG_INF("USB DB: Setting USB3 mux"); + } +} +DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C); diff --git a/zephyr/program/skyrim/BUILD.py b/zephyr/program/skyrim/BUILD.py index ed0f929409..2719375808 100644 --- a/zephyr/program/skyrim/BUILD.py +++ b/zephyr/program/skyrim/BUILD.py @@ -21,6 +21,7 @@ def register_skyrim_project( # Project-specific KConfig customization. here / project_name / "project.conf", ], + inherited_from=["skyrim"], ) diff --git a/zephyr/program/skyrim/markarth/project.overlay b/zephyr/program/skyrim/markarth/project.overlay index 794a8e5151..3d5f8c3fcb 100644 --- a/zephyr/program/skyrim/markarth/project.overlay +++ b/zephyr/program/skyrim/markarth/project.overlay @@ -22,7 +22,7 @@ /* battery overrides */ batteries { default_battery: lgc_ap19b8m-2 { - compatible = "lgc,ap19b8m-2", "battery-smart"; + compatible = "lgc,ap19b8m", "battery-smart"; }; cosmx_ap20cbl-3 { compatible = "cosmx,ap20cbl-3", "battery-smart"; diff --git a/zephyr/scripts/named_gpios.py b/zephyr/scripts/named_gpios.py new file mode 100644 index 0000000000..d71c2483f8 --- /dev/null +++ b/zephyr/scripts/named_gpios.py @@ -0,0 +1,167 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +"""Configure-time checks for the named-gpios node.""" + +import argparse +import inspect +import logging +from pathlib import Path +import pickle +import site +import sys +from typing import List, Optional + + +def verify_no_duplicates(zephyr_base, edt_pickle): + """Verify there are no duplicate GPIOs in the named-gpios node. + + Args: + zephyr_base: pathlib.Path pointing to the Zephyr OS repository. + edt_pickle: pathlib.Path pointing to the EDT object, stored as a pickle + file. + + Returns: + True if no duplicates found. Returns False otherwise. + """ + zephyr_devicetree_path = ( + zephyr_base / "scripts" / "dts" / "python-devicetree" / "src" + ) + + # Add Zephyr's python-devicetree into the source path. + site.addsitedir(zephyr_devicetree_path) + + try: + with open(edt_pickle, "rb") as edt_file: + edt = pickle.load(edt_file) + except FileNotFoundError: + # Skip the GPIOs check if the edt_pickle file doesn't exist. + # UnpicklingErrors will generate a failure. + return True + + # Dictionary of GPIO controllers, indexed by the GPIO controller nodelabel + gpio_ctrls = dict() + duplicates = 0 + count = 0 + + edtlib = inspect.getmodule(edt) + + try: + named_gpios = edt.get_node("/named-gpios") + except edtlib.EDTError: + # If the named-gpios node doesn't exist, return success. + return True + + for node in named_gpios.children.values(): + if "gpios" not in node.props: + continue + + gpios = node.props["gpios"].val + count += 1 + + # edtlib converts a "-gpios" style property to a list of of + # ControllerAndData objects. However, the named-gpios node only + # supports a single GPIO per child, so no need to iterate over + # the list. + gpio = gpios[0] + gpio_pin = gpio.data["pin"] + + # Note that EDT stores the node name (not a nodelabel) in the + # Node.name property. Use the nodelabel, if available as the + # key for gpio_ctrls. + if gpio.controller.labels[0] is not None: + nodelabel = gpio.controller.labels[0] + else: + nodelabel = gpio.controller.name + + if not nodelabel in gpio_ctrls: + # Create a dictionary at each GPIO controller + gpio_ctrls[nodelabel] = dict() + + if gpio_pin in gpio_ctrls[nodelabel]: + logging.error( + "Duplicate GPIOs found at nodes: %s and %s", + gpio_ctrls[nodelabel][gpio_pin], + node.name, + ) + duplicates += 1 + else: + # Store the node name for the new pin + gpio_ctrls[nodelabel][gpio_pin] = node.name + + if duplicates: + logging.error("%d duplicate GPIOs found in %s", duplicates, edt_pickle) + return False + + logging.info("Verified %d GPIOs, no duplicates found", count) + return True + + +# Dictionary used to map log level strings to their corresponding int values. +log_level_map = { + "DEBUG": logging.DEBUG, + "INFO": logging.INFO, + "WARNING": logging.WARNING, + "ERROR": logging.ERROR, + "CRITICAL": logging.CRITICAL, +} + + +def parse_args(argv: Optional[List[str]] = None): + """Returns parsed command-line arguments""" + parser = argparse.ArgumentParser( + prog="named_gpios", + description="Zephyr EC specific devicetree checks", + ) + + parser.add_argument( + "--zephyr-base", + type=Path, + help="Path to Zephyr OS repository", + required=True, + ) + + parser.add_argument( + "--edt-pickle", + type=Path, + help="EDT object file, in pickle format", + required=True, + ) + + parser.add_argument( + "-l", + "--log-level", + choices=log_level_map.values(), + metavar=f"{{{','.join(log_level_map)}}}", + type=lambda x: log_level_map[x], + default=logging.INFO, + help="Set the logging level (default=INFO)", + ) + + return parser.parse_args(argv) + + +def main(argv: Optional[List[str]] = None) -> Optional[int]: + """The main function. + + Args: + argv: Optionally, the command-line to parse, not including argv[0]. + + Returns: + Zero upon success, or non-zero upon failure. + """ + args = parse_args(argv) + + log_format = "%(levelname)s: %(message)s" + + logging.basicConfig(format=log_format, level=args.log_level) + + if not verify_no_duplicates(args.zephyr_base, args.edt_pickle): + return 1 + + return 0 + + +if __name__ == "__main__": + sys.exit(main(sys.argv[1:])) diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index ddc308a4bb..7cfa79cb43 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -9,8 +9,6 @@ #include <zephyr/devicetree.h> #include <zephyr/toolchain.h> -#include <autoconf.h> - #define SENSOR_NODE DT_PATH(motionsense_sensor) #define SENSOR_INFO_NODE DT_PATH(motionsense_sensor_info) #define SENSOR_ALT_NODE DT_PATH(motionsense_sensor_alt) @@ -414,6 +412,11 @@ CONFIG_PLATFORM_EC_RAA489000_TRICKLE_CHARGE_CURRENT #endif +#undef CONFIG_CHARGER_BYPASS_MODE +#ifdef CONFIG_PLATFORM_EC_CHARGER_BYPASS_MODE +#define CONFIG_CHARGER_BYPASS_MODE +#endif + #undef CONFIG_CHARGER_NARROW_VDC #ifdef CONFIG_PLATFORM_EC_CHARGER_NARROW_VDC #define CONFIG_CHARGER_NARROW_VDC @@ -1695,6 +1698,11 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #define CONFIG_USBC_PPC_KTU1125 #endif +#undef CONFIG_USBC_PPC_NX20P3481 +#ifdef CONFIG_PLATFORM_EC_USBC_PPC_NX20P3481 +#define CONFIG_USBC_PPC_NX20P3481 +#endif + #undef CONFIG_USBC_PPC_NX20P3483 #ifdef CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483 #define CONFIG_USBC_PPC_NX20P3483 diff --git a/zephyr/shim/include/usbc/tcpc_generic_emul.h b/zephyr/shim/include/usbc/tcpc_generic_emul.h index 1ce29fd2e5..9fcff480eb 100644 --- a/zephyr/shim/include/usbc/tcpc_generic_emul.h +++ b/zephyr/shim/include/usbc/tcpc_generic_emul.h @@ -4,6 +4,7 @@ */ #include "driver/tcpm/tcpci.h" +#include "i2c/i2c.h" #include <zephyr/devicetree.h> diff --git a/zephyr/shim/include/usbc/tcpc_rt1718s_emul.h b/zephyr/shim/include/usbc/tcpc_rt1718s_emul.h new file mode 100644 index 0000000000..0d9a95cbea --- /dev/null +++ b/zephyr/shim/include/usbc/tcpc_rt1718s_emul.h @@ -0,0 +1,28 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_SHIM_TCPC_RT1718S_EMUL_H +#define __ZEPHYR_SHIM_TCPC_RT1718S_EMUL_H + +#include "driver/tcpm/rt1718s_public.h" + +#include <zephyr/devicetree.h> + +#define RT1718S_EMUL_COMPAT cros_rt1718s_tcpc_emul + +/* clang-format off */ +#define TCPC_CONFIG_RT1718S_EMUL(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &rt1718s_tcpm_drv, \ + .irq_gpio = GPIO_DT_SPEC_GET_OR(id, irq_gpios, {}), \ + } +/* clang-format on */ + +#endif /* __ZEPHYR_SHIM_TPCP_RT1718S_EMUL_H */ diff --git a/zephyr/shim/src/tcpc.c b/zephyr/shim/src/tcpc.c index fcb1d55106..842c2584ab 100644 --- a/zephyr/shim/src/tcpc.c +++ b/zephyr/shim/src/tcpc.c @@ -18,6 +18,7 @@ #include "usbc/tcpc_raa489000.h" #include "usbc/tcpc_rt1715.h" #include "usbc/tcpc_rt1718s.h" +#include "usbc/tcpc_rt1718s_emul.h" #include "usbc/tcpci.h" #include "usbc/utils.h" @@ -48,7 +49,9 @@ LOG_MODULE_REGISTER(tcpc, CONFIG_GPIO_LOG_LEVEL); CHECK_COMPAT(PS8XXX_EMUL_COMPAT, usbc_id, tcpc_id, \ TCPC_CONFIG_PS8XXX_EMUL) \ CHECK_COMPAT(ANX7447_EMUL_COMPAT, usbc_id, tcpc_id, \ - TCPC_CONFIG_ANX7447_EMUL) + TCPC_CONFIG_ANX7447_EMUL) \ + CHECK_COMPAT(RT1718S_EMUL_COMPAT, usbc_id, tcpc_id, \ + TCPC_CONFIG_RT1718S_EMUL) #else #define TCPC_CHIP_FIND_EMUL(...) #endif /* TEST_BUILD */ diff --git a/zephyr/test/ap_power/testcase.yaml b/zephyr/test/ap_power/testcase.yaml index b55e2f3f47..8fbea99560 100644 --- a/zephyr/test/ap_power/testcase.yaml +++ b/zephyr/test/ap_power/testcase.yaml @@ -2,9 +2,12 @@ common: platform_allow: native_posix tests: ap_power.alderlake: - extra_args: CONFIG_EMUL_POWER_SIGNALS=y - CONFIG_X86_NON_DSX_PWRSEQ_ADL=y - CONFIG_AP_X86_INTEL_ADL=y - CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y - CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y - DTC_OVERLAY_FILE="boards/native_posix.overlay";"boards/alderlake.dts" + extra_dtc_overlay_files: + - boards/native_posix.overlay + - boards/alderlake.dts + extra_configs: + - CONFIG_EMUL_POWER_SIGNALS=y + - CONFIG_X86_NON_DSX_PWRSEQ_ADL=y + - CONFIG_AP_X86_INTEL_ADL=y + - CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y + - CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y diff --git a/zephyr/test/drivers/CMakeLists.txt b/zephyr/test/drivers/CMakeLists.txt index 32dcf6408f..2d7fc8a56b 100644 --- a/zephyr/test/drivers/CMakeLists.txt +++ b/zephyr/test/drivers/CMakeLists.txt @@ -27,13 +27,16 @@ add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_COMMON_CHARGER common_charger) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_CHARGESPLASH chargesplash) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_FLASH flash) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_ISL923X isl923x) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_ISL9241 isl9241) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_I2C_CONTROLLER i2c_controller) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_IT8XXX2_HW_SHA256 it8xxx2_hw_sha256) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_KEYBOARD_SCAN keyboard_scan) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_LED_DRIVER led_driver) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_MKBP mkbp) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_NX20P348X nx20p348x) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_PANIC_OUTPUT panic_output) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_POWER_HOST_SLEEP power_host_sleep) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_RT1718S rt1718s) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_RT9490 rt9490) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_SHIM_GPIO_ID shim_gpio_id) add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_SHIM_PWM_HC shim_pwm_hc) diff --git a/zephyr/test/drivers/Kconfig b/zephyr/test/drivers/Kconfig index 5e61d63e60..256e086bd4 100644 --- a/zephyr/test/drivers/Kconfig +++ b/zephyr/test/drivers/Kconfig @@ -68,6 +68,9 @@ config LINK_TEST_SUITE_HOST_COMMAND_READ_MEMMAP config LINK_TEST_SUITE_ISL923X bool "Link and test the isl923x tests" +config LINK_TEST_SUITE_ISL9241 + bool "Link and test the isl9241 tests" + config LINK_TEST_SUITE_I2C_CONTROLLER bool "Link and test the i2c_controller tests" @@ -94,6 +97,11 @@ config LINK_TEST_SUITE_LOCATE_CHIP_ALTS config LINK_TEST_SUITE_MKBP bool "Link and test the mkbp tests" +config LINK_TEST_SUITE_NX20P348X + bool "Link and test the nx20p348x tests" + select PLATFORM_EC_CONSOLE_CMD_PPC_DUMP + select PLATFORM_EC_USB_PD_LOGGING + config LINK_TEST_SUITE_PANIC_OUTPUT bool "Link and test the panic_output tests" @@ -103,6 +111,12 @@ config LINK_TEST_SUITE_POWER_HOST_SLEEP config LINK_TEST_SUITE_PS8XXX bool "Link and test the ps8xxx tests" +config LINK_TEST_SUITE_RT1718S + bool "Link and test the rt1718s tests" + help + Link tests rt1718s test suite for the TCPM driver related function + tests. + config LINK_TEST_SUITE_RT9490 bool "Link and test the rt9490 tests" diff --git a/zephyr/test/drivers/anx7447/src/low_power_mode.c b/zephyr/test/drivers/anx7447/src/low_power_mode.c index cbcea1955c..91f132ef6d 100644 --- a/zephyr/test/drivers/anx7447/src/low_power_mode.c +++ b/zephyr/test/drivers/anx7447/src/low_power_mode.c @@ -20,7 +20,7 @@ static const int tcpm_anx7447_port = USBC_PORT_C0; ZTEST_SUITE(low_power_mode, drivers_predicate_post_main, NULL, NULL, NULL, NULL); -ZTEST(low_power_mode, enter_low_power_in_source_mode) +ZTEST(low_power_mode, test_enter_low_power_in_source_mode) { uint16_t reg_val = 0; const struct emul *anx7447_emul = EMUL_DT_GET(ANX7447_NODE); @@ -40,7 +40,7 @@ ZTEST(low_power_mode, enter_low_power_in_source_mode) "Role register value is not as expected while entering low power mode"); } -ZTEST(low_power_mode, enter_low_power_not_in_source_mode) +ZTEST(low_power_mode, test_enter_low_power_not_in_source_mode) { uint16_t reg_val = 0; const struct emul *anx7447_emul = EMUL_DT_GET(ANX7447_NODE); diff --git a/zephyr/test/drivers/boards/native_posix.overlay b/zephyr/test/drivers/boards/native_posix.overlay index f577b2b618..d4aefdd4cd 100644 --- a/zephyr/test/drivers/boards/native_posix.overlay +++ b/zephyr/test/drivers/boards/native_posix.overlay @@ -127,10 +127,6 @@ * itself instead of device tree. */ - /* <&gpio0 1 x> is reserved as 'entering-rw' in - * src/platform/ec/zephyr/dts/board-overlays/native_posix.dts - */ - /* In test WP is output because CBI use it, but it is also * input, because test_all_tags set it to enable write * protection. diff --git a/zephyr/test/drivers/common/src/utils.c b/zephyr/test/drivers/common/src/utils.c index 03d280cb68..24d3df6b91 100644 --- a/zephyr/test/drivers/common/src/utils.c +++ b/zephyr/test/drivers/common/src/utils.c @@ -124,6 +124,7 @@ void test_set_chipset_to_g3(void) power_get_state()); } +#if DT_HAS_COMPAT_STATUS_OKAY(cros_isl923x_emul) void connect_source_to_port(struct tcpci_partner_data *partner, struct tcpci_src_emul_data *src, int pdo_index, const struct emul *tcpci_emul, @@ -181,6 +182,7 @@ void disconnect_sink_from_port(const struct emul *tcpci_emul) zassert_ok(tcpci_emul_disconnect_partner(tcpci_emul)); k_sleep(K_SECONDS(1)); } +#endif /* DT_HAS_COMPAT_STATUS_OKAY(cros_isl923x_emul) */ uint8_t acpi_read(uint8_t acpi_addr) { diff --git a/zephyr/test/drivers/default/src/console_cmd/vboot_hash.c b/zephyr/test/drivers/default/src/console_cmd/vboot_hash.c index bdc9dddc66..83a14ff46f 100644 --- a/zephyr/test/drivers/default/src/console_cmd/vboot_hash.c +++ b/zephyr/test/drivers/default/src/console_cmd/vboot_hash.c @@ -24,7 +24,7 @@ struct console_cmd_hash_fixture { uint8_t ro_hash[SHA256_DIGEST_SIZE]; }; -ZTEST_F(console_cmd_hash, get_rw) +ZTEST_F(console_cmd_hash, test_get_rw) { const char *outbuffer; size_t buffer_size; @@ -50,7 +50,7 @@ ZTEST_F(console_cmd_hash, get_rw) zassert_ok(!strstr(outbuffer, hash_buf), "Output was: `%s`", outbuffer); } -ZTEST_F(console_cmd_hash, get_ro) +ZTEST_F(console_cmd_hash, test_get_ro) { const char *outbuffer; size_t buffer_size; @@ -76,7 +76,7 @@ ZTEST_F(console_cmd_hash, get_ro) zassert_ok(!strstr(outbuffer, hash_buf), "Output was: `%s`", outbuffer); } -ZTEST_F(console_cmd_hash, abort) +ZTEST_F(console_cmd_hash, test_abort) { const char *outbuffer; size_t buffer_size; @@ -99,7 +99,7 @@ ZTEST_F(console_cmd_hash, abort) "Output was: `%s`", outbuffer); } -ZTEST_F(console_cmd_hash, custom_range) +ZTEST_F(console_cmd_hash, test_custom_range) { char command[256]; uint32_t offset = flash_get_rw_offset(system_get_active_copy()); @@ -140,7 +140,7 @@ ZTEST_F(console_cmd_hash, custom_range) outbuffer, hash_buf); } -ZTEST_F(console_cmd_hash, custom_range_with_nonce) +ZTEST_F(console_cmd_hash, test_custom_range_with_nonce) { char command[256]; uint32_t offset = flash_get_rw_offset(system_get_active_copy()); @@ -183,7 +183,7 @@ ZTEST_F(console_cmd_hash, custom_range_with_nonce) outbuffer, hash_buf); } -ZTEST(console_cmd_hash, invalid) +ZTEST(console_cmd_hash, test_invalid) { /* Invalid subcommand */ zassert_ok(!shell_execute_cmd(get_ec_shell(), "hash foo")); diff --git a/zephyr/test/drivers/default/src/integration/usbc/usb_5v_3a_pd_sink.c b/zephyr/test/drivers/default/src/integration/usbc/usb_5v_3a_pd_sink.c index 6795e72c11..930e393691 100644 --- a/zephyr/test/drivers/default/src/integration/usbc/usb_5v_3a_pd_sink.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_5v_3a_pd_sink.c @@ -224,7 +224,7 @@ ZTEST_F(usb_attach_5v_3a_pd_sink, test_disconnect_power_info) * Expected Results * - Sink completes Goto Min PD negotiation */ -ZTEST_F(usb_attach_5v_3a_pd_sink, verify_goto_min) +ZTEST_F(usb_attach_5v_3a_pd_sink, test_verify_goto_min) { pd_dpm_request(0, DPM_REQUEST_GOTO_MIN); k_sleep(K_SECONDS(1)); @@ -243,7 +243,7 @@ ZTEST_F(usb_attach_5v_3a_pd_sink, verify_goto_min) * Expected Results * - Sink received ping message */ -ZTEST_F(usb_attach_5v_3a_pd_sink, verify_ping_msg) +ZTEST_F(usb_attach_5v_3a_pd_sink, test_verify_ping_msg) { tcpci_snk_emul_clear_ping_received(&fixture->snk_ext); diff --git a/zephyr/test/drivers/default/src/integration/usbc/usb_attach_src_snk.c b/zephyr/test/drivers/default/src/integration/usbc/usb_attach_src_snk.c index 401a89cb11..c53a416f77 100644 --- a/zephyr/test/drivers/default/src/integration/usbc/usb_attach_src_snk.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_attach_src_snk.c @@ -266,7 +266,7 @@ static void integration_usb_attach_snk_then_src_after(void *state) attach_src_snk_common_after(&fixture->my_emulator_state); } -ZTEST_F(integration_usb_attach_src_then_snk, verify_snk_port_pd_info) +ZTEST_F(integration_usb_attach_src_then_snk, test_verify_snk_port_pd_info) { struct ec_response_usb_pd_power_info response; @@ -304,7 +304,7 @@ ZTEST_F(integration_usb_attach_src_then_snk, verify_snk_port_pd_info) response.max_power); } -ZTEST_F(integration_usb_attach_src_then_snk, verify_src_port_pd_info) +ZTEST_F(integration_usb_attach_src_then_snk, test_verify_src_port_pd_info) { struct ec_response_usb_pd_power_info response; @@ -335,7 +335,7 @@ ZTEST_F(integration_usb_attach_src_then_snk, verify_src_port_pd_info) /* current limit */ } -ZTEST_F(integration_usb_attach_snk_then_src, verify_snk_port_pd_info) +ZTEST_F(integration_usb_attach_snk_then_src, test_verify_snk_port_pd_info) { struct ec_response_usb_pd_power_info response; @@ -374,7 +374,7 @@ ZTEST_F(integration_usb_attach_snk_then_src, verify_snk_port_pd_info) response.max_power); } -ZTEST_F(integration_usb_attach_snk_then_src, verify_src_port_pd_info) +ZTEST_F(integration_usb_attach_snk_then_src, test_verify_src_port_pd_info) { struct ec_response_usb_pd_power_info response; @@ -406,7 +406,7 @@ ZTEST_F(integration_usb_attach_snk_then_src, verify_src_port_pd_info) /* current limit */ } -ZTEST_F(integration_usb_attach_src_then_snk, verify_snk_port_typec_status) +ZTEST_F(integration_usb_attach_src_then_snk, test_verify_snk_port_typec_status) { struct ec_response_typec_status response = host_cmd_typec_status(SNK_PORT); @@ -436,7 +436,7 @@ ZTEST_F(integration_usb_attach_src_then_snk, verify_snk_port_typec_status) response.power_role); } -ZTEST_F(integration_usb_attach_src_then_snk, verify_src_port_typec_status) +ZTEST_F(integration_usb_attach_src_then_snk, test_verify_src_port_typec_status) { struct ec_response_typec_status response = host_cmd_typec_status(SRC_PORT); @@ -466,7 +466,7 @@ ZTEST_F(integration_usb_attach_src_then_snk, verify_src_port_typec_status) response.power_role); } -ZTEST_F(integration_usb_attach_snk_then_src, verify_snk_port_typec_status) +ZTEST_F(integration_usb_attach_snk_then_src, test_verify_snk_port_typec_status) { struct ec_response_typec_status response = host_cmd_typec_status(SNK_PORT); @@ -496,7 +496,7 @@ ZTEST_F(integration_usb_attach_snk_then_src, verify_snk_port_typec_status) response.power_role); } -ZTEST_F(integration_usb_attach_snk_then_src, verify_src_port_typec_status) +ZTEST_F(integration_usb_attach_snk_then_src, test_verify_src_port_typec_status) { struct ec_response_typec_status response = host_cmd_typec_status(SRC_PORT); @@ -591,7 +591,7 @@ static void usb_detach_test_after(void *state) attach_src_snk_common_after(&fixture->fixture); } -ZTEST_F(usb_detach_test, verify_detach_src_snk) +ZTEST_F(usb_detach_test, test_verify_detach_src_snk) { struct emul_state *emul_state = &fixture->fixture; struct ec_response_usb_pd_power_info src_power_info = { 0 }; @@ -653,7 +653,7 @@ ZTEST_F(usb_detach_test, verify_detach_src_snk) src_power_info.meas.current_max); } -ZTEST_F(usb_detach_test, verify_detach_snk_src) +ZTEST_F(usb_detach_test, test_verify_detach_snk_src) { struct emul_state *emul_state = &fixture->fixture; struct ec_response_usb_pd_power_info src_power_info = { 0 }; @@ -715,7 +715,7 @@ ZTEST_F(usb_detach_test, verify_detach_snk_src) src_power_info.meas.current_max); } -ZTEST_F(usb_detach_test, verify_detach_sink) +ZTEST_F(usb_detach_test, test_verify_detach_sink) { struct emul_state *emul_state = &fixture->fixture; struct ec_response_usb_pd_power_info pd_power_info = { 0 }; @@ -757,7 +757,7 @@ ZTEST_F(usb_detach_test, verify_detach_sink) pd_power_info.max_power); } -ZTEST_F(usb_detach_test, verify_detach_source) +ZTEST_F(usb_detach_test, test_verify_detach_source) { struct emul_state *emul_state = &fixture->fixture; struct ec_response_usb_pd_power_info pd_power_info = { SNK_PORT }; diff --git a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_bist_shared.c b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_bist_shared.c index 36a417d22c..6284881690 100644 --- a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_bist_shared.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_bist_shared.c @@ -80,7 +80,7 @@ ZTEST_SUITE(usb_pd_bist_shared, drivers_predicate_post_main, usb_pd_bist_shared_setup, usb_pd_bist_shared_before, usb_pd_bist_shared_after, NULL); -ZTEST_F(usb_pd_bist_shared, verify_bist_shared_mode) +ZTEST_F(usb_pd_bist_shared, test_verify_bist_shared_mode) { uint32_t bist_data; uint32_t f5v_cap; @@ -135,7 +135,7 @@ ZTEST_F(usb_pd_bist_shared, verify_bist_shared_mode) "PDO current didn't decrease after BIST exit"); } -ZTEST_F(usb_pd_bist_shared, verify_bist_shared_no_snk_entry) +ZTEST_F(usb_pd_bist_shared, test_verify_bist_shared_no_snk_entry) { uint32_t bist_data; uint32_t f5v_cap; @@ -169,7 +169,7 @@ ZTEST_F(usb_pd_bist_shared, verify_bist_shared_no_snk_entry) "PDO current incorrect after bad BIST entry"); } -ZTEST_F(usb_pd_bist_shared, verify_bist_shared_exit_no_action) +ZTEST_F(usb_pd_bist_shared, test_verify_bist_shared_exit_no_action) { uint32_t bist_data; uint32_t f5v_cap; @@ -193,7 +193,7 @@ ZTEST_F(usb_pd_bist_shared, verify_bist_shared_exit_no_action) zassert_equal(f5v_cap, 0, "Received unexpected source cap"); } -ZTEST_F(usb_pd_bist_shared, verify_control_bist_shared_mode) +ZTEST_F(usb_pd_bist_shared, test_verify_control_bist_shared_mode) { uint32_t f5v_cap; diff --git a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c index 0e5d3eecad..af7564635c 100644 --- a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c @@ -158,7 +158,7 @@ ZTEST_SUITE(usb_pd_ctrl_msg_test_source, drivers_predicate_post_main, usb_pd_ctrl_msg_source_setup, usb_pd_ctrl_msg_before, usb_pd_ctrl_msg_after, NULL); -ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_vconn_swap) +ZTEST_F(usb_pd_ctrl_msg_test_sink, test_verify_vconn_swap) { struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; struct ec_response_typec_status snk_resp = { 0 }; @@ -181,7 +181,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_vconn_swap) "SNK Returned vconn_role=%u", snk_resp.vconn_role); } -ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_pr_swap) +ZTEST_F(usb_pd_ctrl_msg_test_sink, test_verify_pr_swap) { struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; struct ec_response_typec_status snk_resp = { 0 }; @@ -228,7 +228,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_pr_swap) * Expected Results * - TypeC status query returns PD_ROLE_DFP */ -ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_dr_swap) +ZTEST_F(usb_pd_ctrl_msg_test_sink, test_verify_dr_swap) { struct ec_response_typec_status typec_status = host_cmd_typec_status(TEST_USB_PORT); @@ -250,7 +250,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_dr_swap) * Expected Results * - Data role does not change on TEST_USB_PORT after DR Swap request. */ -ZTEST_F(usb_pd_ctrl_msg_test_source, verify_dr_swap_rejected) +ZTEST_F(usb_pd_ctrl_msg_test_source, test_verify_dr_swap_rejected) { struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; struct ec_response_typec_status typec_status = { 0 }; @@ -286,7 +286,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_source, verify_dr_swap_rejected) * Expected Results * - Data role changes after DPM DR Swap request */ -ZTEST_F(usb_pd_ctrl_msg_test_source, verify_dpm_dr_swap) +ZTEST_F(usb_pd_ctrl_msg_test_source, test_verify_dpm_dr_swap) { struct ec_response_typec_status typec_status = { 0 }; @@ -313,7 +313,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_source, verify_dpm_dr_swap) * Expected Results * - TypeC Status Host Command reveals sink capabilility PDOs. */ -ZTEST(usb_pd_ctrl_msg_test_source, verify_dpm_get_sink_cap) +ZTEST(usb_pd_ctrl_msg_test_source, test_verify_dpm_get_sink_cap) { struct ec_response_typec_status typec_status = { 0 }; @@ -334,7 +334,7 @@ ZTEST(usb_pd_ctrl_msg_test_source, verify_dpm_get_sink_cap) * Expected Results * - TypeC Status Host Command reveals sink capabilility PDOs. */ -ZTEST(usb_pd_ctrl_msg_test_sink, verify_get_sink_cap) +ZTEST(usb_pd_ctrl_msg_test_sink, test_verify_get_sink_cap) { struct ec_response_typec_status typec_status = { 0 }; @@ -354,7 +354,7 @@ ZTEST(usb_pd_ctrl_msg_test_sink, verify_get_sink_cap) * Expected Results * - BIST occurs and we transition back to READY state */ -ZTEST_F(usb_pd_ctrl_msg_test_source, verify_bist_tx_mode2) +ZTEST_F(usb_pd_ctrl_msg_test_source, test_verify_bist_tx_mode2) { struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; uint32_t bdo = BDO(BDO_MODE_CARRIER2, 0); @@ -381,7 +381,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_source, verify_bist_tx_mode2) * Expected Results * - Partner remains in BIST_TX state until hard reset is received. */ -ZTEST_F(usb_pd_ctrl_msg_test_source, verify_bist_tx_test_data) +ZTEST_F(usb_pd_ctrl_msg_test_source, test_verify_bist_tx_test_data) { struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; uint32_t bdo = BDO(BDO_MODE_TEST_DATA, 0); diff --git a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_rev3.c b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_rev3.c index 6a93e4704d..0ae92b88b4 100644 --- a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_rev3.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_rev3.c @@ -176,7 +176,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source_rev3, test_batt_cap_invalid) "Invalid battery ref bit should be set"); } -ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_typec_status_using_rmdo) +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, test_verify_typec_status_using_rmdo) { struct ec_params_typec_status params = { .port = TEST_PORT }; struct ec_response_typec_status response; @@ -190,7 +190,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_typec_status_using_rmdo) zassert_equal(response.sop_revision, fixture->source_5v_3a.rmdo >> 16); } -ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_alert_msg) +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, test_verify_alert_msg) { zassert_equal(pd_broadcast_alert_msg(ADO_OTP_EVENT), EC_SUCCESS); @@ -198,7 +198,8 @@ ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_alert_msg) zassert_true(fixture->src_ext.alert_received); } -ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_alert_on_power_state_change) +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, + test_verify_alert_on_power_state_change) { /* Suspend and check partner received Alert and Status messages */ hook_notify(HOOK_CHIPSET_SUSPEND); @@ -238,7 +239,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_alert_on_power_state_change) } ZTEST_F(usb_attach_5v_3a_pd_source_rev3, - verify_simultaneous_alert_status_resolution) + test_verify_simultaneous_alert_status_resolution) { zassert_false(fixture->src_ext.alert_received); zassert_false(fixture->src_ext.status_received); @@ -292,7 +293,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source_rev3, } ZTEST_F(usb_attach_5v_3a_pd_source_rev3, - verify_inaction_on_pd_button_press_while_awake) + test_verify_inaction_on_pd_button_press_while_awake) { uint32_t ado; @@ -311,7 +312,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source_rev3, } ZTEST_F(usb_attach_5v_3a_pd_source_rev3, - verify_inaction_on_invalid_pd_button_press) + test_verify_inaction_on_invalid_pd_button_press) { uint32_t ado; @@ -344,7 +345,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source_rev3, k_sleep(K_SECONDS(10)); } -ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_startup_on_pd_button_press) +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, test_verify_startup_on_pd_button_press) { uint32_t ado; @@ -376,7 +377,8 @@ ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_startup_on_pd_button_press) zassert_true(chipset_in_state(CHIPSET_STATE_ON)); } -ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_chipset_on_pd_button_behavior) +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, + test_verify_chipset_on_pd_button_behavior) { uint32_t ado; @@ -443,7 +445,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_chipset_on_pd_button_behavior) k_sleep(K_SECONDS(10)); } -ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_uvdm_not_supported) +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, test_verify_uvdm_not_supported) { uint32_t vdm_header = VDO(USB_VID_GOOGLE, 0 /* unstructured */, 0); diff --git a/zephyr/test/drivers/default/src/motion_sense/motion_sense.c b/zephyr/test/drivers/default/src/motion_sense/motion_sense.c index 8291e0e1c6..9ea6509fe3 100644 --- a/zephyr/test/drivers/default/src/motion_sense/motion_sense.c +++ b/zephyr/test/drivers/default/src/motion_sense/motion_sense.c @@ -12,7 +12,7 @@ extern enum chipset_state_mask sensor_active; ZTEST_SUITE(motion_sense, drivers_predicate_post_main, NULL, NULL, NULL, NULL); -ZTEST_USER(motion_sense, ec_motion_sensor_fill_values) +ZTEST_USER(motion_sense, test_ec_motion_sensor_fill_values) { struct ec_response_motion_sensor_data dst = { .data = { 1, 2, 3 }, @@ -25,7 +25,7 @@ ZTEST_USER(motion_sense, ec_motion_sensor_fill_values) zassert_equal(dst.data[2], v[2]); } -ZTEST_USER(motion_sense, ec_motion_sensor_clamp_i16) +ZTEST_USER(motion_sense, test_ec_motion_sensor_clamp_i16) { zassert_equal(ec_motion_sensor_clamp_i16(0), 0); zassert_equal(ec_motion_sensor_clamp_i16(200), 200); @@ -36,7 +36,7 @@ ZTEST_USER(motion_sense, ec_motion_sensor_clamp_i16) NULL); } -ZTEST_USER(motion_sense, ec_motion_sense_get_ec_config) +ZTEST_USER(motion_sense, test_ec_motion_sense_get_ec_config) { /* illegal state, should be translated to S5 */ sensor_active = 42; diff --git a/zephyr/test/drivers/default/src/power_common.c b/zephyr/test/drivers/default/src/power_common.c index 58ca3977f9..529258e553 100644 --- a/zephyr/test/drivers/default/src/power_common.c +++ b/zephyr/test/drivers/default/src/power_common.c @@ -448,7 +448,7 @@ ZTEST(power_common, test_power_board_system_is_idle) /** * Test power console command */ -ZTEST(power_common, power_console_cmd) +ZTEST(power_common, test_power_console_cmd) { const char *buffer; size_t buffer_size; @@ -484,7 +484,7 @@ ZTEST(power_common, power_console_cmd) /** * Test powerinfo console command */ -ZTEST_USER(power_common, powerinfo_console_cmd) +ZTEST_USER(power_common, test_powerinfo_console_cmd) { char expected_buffer[32]; diff --git a/zephyr/test/drivers/default/src/util.c b/zephyr/test/drivers/default/src/util.c index 342ce9b971..ac5aed9736 100644 --- a/zephyr/test/drivers/default/src/util.c +++ b/zephyr/test/drivers/default/src/util.c @@ -8,7 +8,7 @@ #include <zephyr/fff.h> #include <zephyr/ztest.h> -ZTEST(util, reverse) +ZTEST(util, test_reverse) { uint8_t input[] = { 0, 1, 2, 3, 4 }; uint8_t expected[] = { 4, 3, 2, 1, 0 }; @@ -18,7 +18,7 @@ ZTEST(util, reverse) zassert_mem_equal(input, expected, sizeof(input), NULL); } -ZTEST(util, parse_offset_size__normal) +ZTEST(util, test_parse_offset_size__normal) { const char *argv[] = { "cmd", "123", "456" }; int argc = ARRAY_SIZE(argv); @@ -30,7 +30,7 @@ ZTEST(util, parse_offset_size__normal) zassert_equal(456, size, NULL); } -ZTEST(util, parse_offset_size__invalid_param1) +ZTEST(util, test_parse_offset_size__invalid_param1) { const char *argv[] = { "cmd", "xyz" /* <- bad */, "456" }; int argc = ARRAY_SIZE(argv); @@ -41,7 +41,7 @@ ZTEST(util, parse_offset_size__invalid_param1) parse_offset_size(argc, argv, 1, &offset, &size), NULL); } -ZTEST(util, parse_offset_size__invalid_param2) +ZTEST(util, test_parse_offset_size__invalid_param2) { const char *argv[] = { "cmd", "123", "xyz" /* <- bad */ }; int argc = ARRAY_SIZE(argv); @@ -52,7 +52,7 @@ ZTEST(util, parse_offset_size__invalid_param2) parse_offset_size(argc, argv, 1, &offset, &size), NULL); } -ZTEST(util, wait_for_ready) +ZTEST(util, test_wait_for_ready) { uint32_t reg; @@ -66,7 +66,7 @@ ZTEST(util, wait_for_ready) wait_for_ready(®, 1, 1); } -ZTEST(util, binary_from_bits) +ZTEST(util, test_binary_from_bits) { int input[] = { 0, @@ -79,7 +79,7 @@ ZTEST(util, binary_from_bits) zassert_equal(0, binary_from_bits(NULL, 0), NULL); } -ZTEST(util, ternary_from_bits) +ZTEST(util, test_ternary_from_bits) { int input[] = { 0, diff --git a/zephyr/test/drivers/dps/src/dps_config.c b/zephyr/test/drivers/dps/src/dps_config.c index a3c7736e31..aaa3ac14ff 100644 --- a/zephyr/test/drivers/dps/src/dps_config.c +++ b/zephyr/test/drivers/dps/src/dps_config.c @@ -69,13 +69,13 @@ ZTEST_F(dps_config, test_config) *config = fixture->saved_config; } -ZTEST(dps_config, console_cmd__print_info) +ZTEST(dps_config, test_console_cmd__print_info) { /* Print current status to console */ zassert_ok(shell_execute_cmd(get_ec_shell(), "dps"), NULL); } -ZTEST(dps_config, console_cmd__enable) +ZTEST(dps_config, test_console_cmd__enable) { /* Disable DPS first, then try enabling */ dps_enable(false); @@ -86,7 +86,7 @@ ZTEST(dps_config, console_cmd__enable) zassert_true(dps_is_enabled(), NULL); } -ZTEST(dps_config, console_cmd__disable) +ZTEST(dps_config, test_console_cmd__disable) { /* Should already by enabled due to before() function */ zassert_true(dps_is_enabled(), NULL); @@ -96,13 +96,13 @@ ZTEST(dps_config, console_cmd__disable) zassert_false(dps_is_enabled(), NULL); } -ZTEST(dps_config, console_cmd__fakepwr_print) +ZTEST(dps_config, test_console_cmd__fakepwr_print) { /* Print current fake power status to console */ zassert_ok(shell_execute_cmd(get_ec_shell(), "dps fakepwr"), NULL); } -ZTEST(dps_config, console_cmd__fakepwr_enable_disable) +ZTEST(dps_config, test_console_cmd__fakepwr_enable_disable) { zassert_false(dps_is_fake_enabled(), "fakepwr shouldn't be enabled by default"); @@ -119,7 +119,7 @@ ZTEST(dps_config, console_cmd__fakepwr_enable_disable) zassert_false(dps_is_fake_enabled(), NULL); } -ZTEST(dps_config, console_cmd__fakepwr_invalid) +ZTEST(dps_config, test_console_cmd__fakepwr_invalid) { /* Various invalid parameters */ zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps fakepwr 100"), NULL); @@ -129,7 +129,7 @@ ZTEST(dps_config, console_cmd__fakepwr_invalid) NULL); } -ZTEST(dps_config, console_cmd__debuglevel) +ZTEST(dps_config, test_console_cmd__debuglevel) { zassert_ok(shell_execute_cmd(get_ec_shell(), "dps debug 999"), NULL); @@ -137,7 +137,7 @@ ZTEST(dps_config, console_cmd__debuglevel) *dps_get_debug_level()); } -ZTEST(dps_config, console_cmd__setkmore) +ZTEST(dps_config, test_console_cmd__setkmore) { struct dps_config_t *config = dps_get_config(); char cmd[32]; @@ -165,7 +165,7 @@ ZTEST(dps_config, console_cmd__setkmore) config->k_less_pwr + 1); } -ZTEST(dps_config, console_cmd__setkless) +ZTEST(dps_config, test_console_cmd__setkless) { struct dps_config_t *config = dps_get_config(); char cmd[32]; @@ -193,7 +193,7 @@ ZTEST(dps_config, console_cmd__setkless) config->k_more_pwr - 1); } -ZTEST(dps_config, console_cmd__setksample) +ZTEST(dps_config, test_console_cmd__setksample) { struct dps_config_t *config = dps_get_config(); @@ -209,7 +209,7 @@ ZTEST(dps_config, console_cmd__setksample) config->k_sample); } -ZTEST(dps_config, console_cmd__setkwindow) +ZTEST(dps_config, test_console_cmd__setkwindow) { struct dps_config_t *config = dps_get_config(); @@ -222,7 +222,7 @@ ZTEST(dps_config, console_cmd__setkwindow) zassert_equal(4, config->k_window, "k_window is %d", config->k_window); } -ZTEST(dps_config, console_cmd__settcheck) +ZTEST(dps_config, test_console_cmd__settcheck) { struct dps_config_t *config = dps_get_config(); @@ -237,7 +237,7 @@ ZTEST(dps_config, console_cmd__settcheck) config->t_check); } -ZTEST(dps_config, console_cmd__settstable) +ZTEST(dps_config, test_console_cmd__settstable) { struct dps_config_t *config = dps_get_config(); @@ -252,7 +252,7 @@ ZTEST(dps_config, console_cmd__settstable) config->t_stable); } -ZTEST(dps_config, console_cmd__invalid) +ZTEST(dps_config, test_console_cmd__invalid) { /* Non-existent subcommand should fail */ zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps foobar xyz"), NULL); diff --git a/zephyr/test/drivers/dps/src/dps_selection.c b/zephyr/test/drivers/dps/src/dps_selection.c index a06aabc67f..4fd0175ffa 100644 --- a/zephyr/test/drivers/dps/src/dps_selection.c +++ b/zephyr/test/drivers/dps/src/dps_selection.c @@ -167,7 +167,7 @@ static void dps_selection_after(void *data) reset(); } -ZTEST_USER_F(dps_selection, dps_pdo_switch) +ZTEST_USER_F(dps_selection, test_dps_pdo_switch) { struct common_fixture *common = &fixture->common; struct tcpci_src_emul_data *src_ext = &common->src_ext; diff --git a/zephyr/test/drivers/gpio_unhook/src/is_not_ready.c b/zephyr/test/drivers/gpio_unhook/src/is_not_ready.c index ad0e41aa57..b0b6e627b0 100644 --- a/zephyr/test/drivers/gpio_unhook/src/is_not_ready.c +++ b/zephyr/test/drivers/gpio_unhook/src/is_not_ready.c @@ -13,7 +13,7 @@ ZTEST_SUITE(not_ready, drivers_predicate_post_main, NULL, NULL, NULL, NULL); -ZTEST(not_ready, bad_tcpc) +ZTEST(not_ready, test_bad_tcpc) { for (int i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { gpio_flags_t flags; diff --git a/zephyr/test/drivers/host_cmd/src/adc.c b/zephyr/test/drivers/host_cmd/src/adc.c index a6e9beb62c..0931f667d3 100644 --- a/zephyr/test/drivers/host_cmd/src/adc.c +++ b/zephyr/test/drivers/host_cmd/src/adc.c @@ -14,7 +14,7 @@ FAKE_VALUE_FUNC(int, adc_read_channel, enum adc_channel); -ZTEST(hc_adc, normal_path) +ZTEST(hc_adc, test_normal_path) { struct ec_params_adc_read params = { .adc_channel = ADC_TEMP_SENSOR_CHARGER, @@ -31,7 +31,7 @@ ZTEST(hc_adc, normal_path) zassert_equal(123, response.adc_value); } -ZTEST(hc_adc, bad_ch_number) +ZTEST(hc_adc, test_bad_ch_number) { struct ec_params_adc_read params = { .adc_channel = ADC_CH_COUNT + 1, /* Invalid */ diff --git a/zephyr/test/drivers/host_cmd/src/battery_display_soc.c b/zephyr/test/drivers/host_cmd/src/battery_display_soc.c index 34a3881b5d..b158051195 100644 --- a/zephyr/test/drivers/host_cmd/src/battery_display_soc.c +++ b/zephyr/test/drivers/host_cmd/src/battery_display_soc.c @@ -10,7 +10,7 @@ #include <zephyr/ztest.h> -ZTEST_USER(battery_display_soc, happy_path) +ZTEST_USER(battery_display_soc, test_happy_path) { const uint32_t full_charge_as_tenths = CONFIG_BATT_HOST_FULL_FACTOR * 10; diff --git a/zephyr/test/drivers/host_cmd/src/host_command.c b/zephyr/test/drivers/host_cmd/src/host_command.c index e1168648d9..7118fbaab1 100644 --- a/zephyr/test/drivers/host_cmd/src/host_command.c +++ b/zephyr/test/drivers/host_cmd/src/host_command.c @@ -9,7 +9,7 @@ #include <zephyr/ztest.h> -ZTEST(host_cmd_host_commands, get_command_versions__v1) +ZTEST(host_cmd_host_commands, test_get_command_versions__v1) { struct ec_response_get_cmd_versions response; struct ec_params_get_cmd_versions_v1 params = { @@ -23,7 +23,7 @@ ZTEST(host_cmd_host_commands, get_command_versions__v1) zassert_equal(EC_VER_MASK(0) | EC_VER_MASK(1), response.version_mask); } -ZTEST(host_cmd_host_commands, get_command_versions__invalid_cmd) +ZTEST(host_cmd_host_commands, test_get_command_versions__invalid_cmd) { struct ec_response_get_cmd_versions response; struct ec_params_get_cmd_versions_v1 params = { @@ -37,7 +37,7 @@ ZTEST(host_cmd_host_commands, get_command_versions__invalid_cmd) zassert_equal(EC_RES_INVALID_PARAM, rv, "Got %d", rv); } -ZTEST(host_cmd_host_commands, get_comms_status) +ZTEST(host_cmd_host_commands, test_get_comms_status) { struct ec_response_get_comms_status response; int rv; @@ -52,7 +52,7 @@ ZTEST(host_cmd_host_commands, get_comms_status) zassert_false(response.flags); } -ZTEST(host_cmd_host_commands, resend_response) +ZTEST(host_cmd_host_commands, test_resend_response) { struct host_cmd_handler_args args = (struct host_cmd_handler_args)BUILD_HOST_COMMAND_SIMPLE( @@ -70,7 +70,7 @@ ZTEST(host_cmd_host_commands, resend_response) */ } -ZTEST(host_cmd_host_commands, get_proto_version) +ZTEST(host_cmd_host_commands, test_get_proto_version) { struct ec_response_proto_version response; int rv; diff --git a/zephyr/test/drivers/host_cmd/src/motion_sense.c b/zephyr/test/drivers/host_cmd/src/motion_sense.c index 919baf7219..c231f6f55e 100644 --- a/zephyr/test/drivers/host_cmd/src/motion_sense.c +++ b/zephyr/test/drivers/host_cmd/src/motion_sense.c @@ -872,7 +872,7 @@ ZTEST(host_cmd_motion_sense, test_spoof_invalid_mode) NULL); } -ZTEST(host_cmd_motion_sense, set_kb_wake_lid_angle) +ZTEST(host_cmd_motion_sense, test_set_kb_wake_lid_angle) { struct ec_response_motion_sense response; int16_t expected_lid_angle = 45; @@ -885,7 +885,7 @@ ZTEST(host_cmd_motion_sense, set_kb_wake_lid_angle) zassert_equal(expected_lid_angle, response.kb_wake_angle.ret); } -ZTEST(host_cmd_motion_sense, get_lid_angle) +ZTEST(host_cmd_motion_sense, test_get_lid_angle) { struct ec_response_motion_sense response; int rv; diff --git a/zephyr/test/drivers/host_cmd_read_memmap/src/read_memmap.c b/zephyr/test/drivers/host_cmd_read_memmap/src/read_memmap.c index 17ae4109f9..88472a3467 100644 --- a/zephyr/test/drivers/host_cmd_read_memmap/src/read_memmap.c +++ b/zephyr/test/drivers/host_cmd_read_memmap/src/read_memmap.c @@ -14,7 +14,7 @@ FAKE_VOID_FUNC(switch_interrupt, int); #endif -ZTEST(ec_cmd_read_memmap, id) +ZTEST(ec_cmd_read_memmap, test_id) { struct ec_params_read_memmap params = { .offset = EC_MEMMAP_ID, @@ -38,7 +38,7 @@ ZTEST(ec_cmd_read_memmap, id) zassert_equal('C', response[1]); } -ZTEST(ec_cmd_read_memmap, switches) +ZTEST(ec_cmd_read_memmap, test_switches) { struct ec_params_read_memmap params = { .offset = EC_MEMMAP_SWITCHES, @@ -66,7 +66,7 @@ ZTEST(ec_cmd_read_memmap, switches) } } -ZTEST(ec_cmd_read_memmap, invalid) +ZTEST(ec_cmd_read_memmap, test_invalid) { struct ec_params_read_memmap params = { .offset = EC_MEMMAP_ID, diff --git a/zephyr/test/drivers/host_command_memory_dump/src/host_command_memory_dump.c b/zephyr/test/drivers/host_command_memory_dump/src/host_command_memory_dump.c index 322980b784..373c066a3c 100644 --- a/zephyr/test/drivers/host_command_memory_dump/src/host_command_memory_dump.c +++ b/zephyr/test/drivers/host_command_memory_dump/src/host_command_memory_dump.c @@ -222,7 +222,7 @@ static enum ec_status fetch_memory_dump(struct mem_dump *dump) * Ensure that a memory dump returns empty list if requested before being * initialized. */ -ZTEST_USER(memory_dump, dump_before_registered) +ZTEST_USER(memory_dump, test_dump_before_registered) { struct ec_response_memory_dump_get_metadata metadata_response; int rv; @@ -236,7 +236,7 @@ ZTEST_USER(memory_dump, dump_before_registered) } /* Check if thread stack is included in memory dump */ -ZTEST_USER(memory_dump, dump_thread_stack) +ZTEST_USER(memory_dump, test_dump_thread_stack) { const uint32_t magic_val_1 = 0x11111111; const uint32_t magic_val_2 = 0x22222222; @@ -301,7 +301,7 @@ ZTEST_USER(memory_dump, dump_thread_stack) } /* Check if keyscan thread stack is included in memory dump */ -ZTEST_USER(memory_dump, verify_excluded_threads_not_dumped) +ZTEST_USER(memory_dump, test_verify_excluded_threads_not_dumped) { struct mem_dump dump; k_tid_t main_thread; diff --git a/zephyr/test/drivers/i2c_controller/src/i2c_controller.c b/zephyr/test/drivers/i2c_controller/src/i2c_controller.c index 594c3e6888..1044d14cd7 100644 --- a/zephyr/test/drivers/i2c_controller/src/i2c_controller.c +++ b/zephyr/test/drivers/i2c_controller/src/i2c_controller.c @@ -18,7 +18,7 @@ struct i2c_controller_fixture { struct basic_i2c_device_data *emul_data; }; -ZTEST_F(i2c_controller, write_read32_le) +ZTEST_F(i2c_controller, test_write_read32_le) { uint32_t expected = 0xAABBCCDD; uint32_t actual; @@ -38,7 +38,7 @@ ZTEST_F(i2c_controller, write_read32_le) expected); } -ZTEST_F(i2c_controller, write_read32_be) +ZTEST_F(i2c_controller, test_write_read32_be) { uint32_t expected = 0xAABBCCDD; uint32_t actual; @@ -61,7 +61,7 @@ ZTEST_F(i2c_controller, write_read32_be) expected); } -ZTEST_F(i2c_controller, write_read16_be) +ZTEST_F(i2c_controller, test_write_read16_be) { uint16_t expected = 0x1122; int actual; @@ -84,7 +84,7 @@ ZTEST_F(i2c_controller, write_read16_be) (uint16_t)actual, expected); } -ZTEST_F(i2c_controller, read32_fail) +ZTEST_F(i2c_controller, test_read32_fail) { int ret; uint32_t data; @@ -95,7 +95,7 @@ ZTEST_F(i2c_controller, read32_fail) zassert_equal(EC_ERROR_INVAL, ret, "Got %d", ret); } -ZTEST_F(i2c_controller, write32_fail) +ZTEST_F(i2c_controller, test_write32_fail) { int ret; @@ -105,7 +105,7 @@ ZTEST_F(i2c_controller, write32_fail) zassert_equal(EC_ERROR_INVAL, ret, "Got %d", ret); } -ZTEST_F(i2c_controller, field_update16) +ZTEST_F(i2c_controller, test_field_update16) { /* Write a 16-bit value with mask */ @@ -131,7 +131,7 @@ ZTEST_F(i2c_controller, field_update16) EC_ERROR_INVAL); } -ZTEST_F(i2c_controller, read_offset16__one_byte) +ZTEST_F(i2c_controller, test_read_offset16__one_byte) { /* Read 1 byte from a 16-bit register offset, which will cause us to * access the extended register space of our i2c device @@ -149,7 +149,7 @@ ZTEST_F(i2c_controller, read_offset16__one_byte) expected); } -ZTEST_F(i2c_controller, read_offset16__two_bytes) +ZTEST_F(i2c_controller, test_read_offset16__two_bytes) { /* Read 2 bytes from a 16-bit register offset, which will cause us to * access the extended register space of our i2c device @@ -168,7 +168,7 @@ ZTEST_F(i2c_controller, read_offset16__two_bytes) expected); } -ZTEST_F(i2c_controller, read_offset16__two_bytes_be) +ZTEST_F(i2c_controller, test_read_offset16__two_bytes_be) { /* Read 2 bytes from a 16-bit register offset, which will cause us to * access the extended register space of our i2c device @@ -190,7 +190,7 @@ ZTEST_F(i2c_controller, read_offset16__two_bytes_be) expected); } -ZTEST_F(i2c_controller, read_offset16__invalid) +ZTEST_F(i2c_controller, test_read_offset16__invalid) { /* Check length limits */ zassert_ok( @@ -203,7 +203,7 @@ ZTEST_F(i2c_controller, read_offset16__invalid) 1)); } -ZTEST_F(i2c_controller, write_offset16__one_byte) +ZTEST_F(i2c_controller, test_write_offset16__one_byte) { /* Write 1 byte to a 16-bit register offset, which will cause us to * access the extended register space of our i2c device @@ -221,7 +221,7 @@ ZTEST_F(i2c_controller, write_offset16__one_byte) expected); } -ZTEST_F(i2c_controller, write_offset16__two_bytes) +ZTEST_F(i2c_controller, test_write_offset16__two_bytes) { /* Write 2 bytes to a 16-bit register offset, which will cause us to * access the extended register space of our i2c device @@ -239,7 +239,7 @@ ZTEST_F(i2c_controller, write_offset16__two_bytes) expected); } -ZTEST_F(i2c_controller, write_offset16__two_bytes_be) +ZTEST_F(i2c_controller, test_write_offset16__two_bytes_be) { /* Write 2 bytes to a 16-bit register offset, which will cause us to * access the extended register space of our i2c device @@ -259,14 +259,14 @@ ZTEST_F(i2c_controller, write_offset16__two_bytes_be) expected); } -ZTEST_F(i2c_controller, write_offset16__invalid) +ZTEST_F(i2c_controller, test_write_offset16__invalid) { /* Check length limits */ zassert_ok(!i2c_write_offset16(fixture->port, fixture->addr, 0, 0, 3)); zassert_ok(!i2c_write_offset16(fixture->port, fixture->addr, 0, 0, -1)); } -ZTEST_F(i2c_controller, read_offset16_block) +ZTEST_F(i2c_controller, test_read_offset16_block) { /* Read 4 bytes from a 16-bit register offset, which will cause us to * access the extended register space of our i2c device @@ -285,7 +285,7 @@ ZTEST_F(i2c_controller, read_offset16_block) expected); } -ZTEST_F(i2c_controller, write_offset16_block) +ZTEST_F(i2c_controller, test_write_offset16_block) { /* Write 4 bytes to a 16-bit register offset, which will cause us to * access the extended register space of our i2c device @@ -304,7 +304,7 @@ ZTEST_F(i2c_controller, write_offset16_block) expected); } -ZTEST_F(i2c_controller, pec_disabled) +ZTEST_F(i2c_controller, test_pec_disabled) { uint16_t addr_flags; uint8_t write_data[] = { @@ -346,7 +346,7 @@ ZTEST_F(i2c_controller, pec_disabled) EC_ERROR_UNIMPLEMENTED); } -ZTEST_F(i2c_controller, i2c_xfer_unlocked__error_paths) +ZTEST_F(i2c_controller, test_i2c_xfer_unlocked__error_paths) { uint8_t out_buffer[1]; int out_size; diff --git a/zephyr/test/drivers/isl9241/CMakeLists.txt b/zephyr/test/drivers/isl9241/CMakeLists.txt new file mode 100644 index 0000000000..387fe2b85b --- /dev/null +++ b/zephyr/test/drivers/isl9241/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +target_sources(app PRIVATE src/isl9241.c) diff --git a/zephyr/test/drivers/isl9241/src/isl9241.c b/zephyr/test/drivers/isl9241/src/isl9241.c new file mode 100644 index 0000000000..d84d11a454 --- /dev/null +++ b/zephyr/test/drivers/isl9241/src/isl9241.c @@ -0,0 +1,232 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "battery_smart.h" +#include "charger.h" +#include "driver/charger/isl9241.h" +#include "driver/charger/isl9241_public.h" +#include "emul/emul_isl9241.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#define ISL9241_NODE DT_NODELABEL(isl9241_emul) + +struct isl9241_driver_fixture { + const struct emul *isl9241_emul; +}; + +static void *isl9241_driver_setup(void) +{ + static struct isl9241_driver_fixture fix; + + fix.isl9241_emul = EMUL_DT_GET(ISL9241_NODE); + + return &fix; +} + +ZTEST_SUITE(isl9241_driver, drivers_predicate_post_main, isl9241_driver_setup, + NULL, NULL, NULL); + +ZTEST(isl9241_driver, test_input_current_limit) +{ + int input_current = 3000; + int temp; + + zassert_ok( + charger_set_input_current_limit(CHARGER_SOLO, input_current)); + zassert_ok(charger_get_input_current_limit(CHARGER_SOLO, &temp)); + zassert_equal(input_current, temp); +} + +ZTEST(isl9241_driver, test_device_id) +{ + int id; + + zassert_ok(charger_device_id(&id)); + zassert_equal(id, 0x000E); +} + +ZTEST(isl9241_driver, test_manuf_id) +{ + int id; + + zassert_ok(charger_manufacturer_id(&id)); + zassert_equal(id, 0x0049); +} + +/* + * Unforuntely, there is no "get frequency" API, so we'll directly compare + * expected register contents for this test + */ +struct frequency_test { + int khz; + uint16_t reg; +}; + +struct frequency_test frequency_table[] = { + { .khz = 1420, .reg = ISL9241_CONTROL1_SWITCHING_FREQ_1420KHZ }, + { .khz = 1180, .reg = ISL9241_CONTROL1_SWITCHING_FREQ_1180KHZ }, + { .khz = 1020, .reg = ISL9241_CONTROL1_SWITCHING_FREQ_1020KHZ }, + { .khz = 890, .reg = ISL9241_CONTROL1_SWITCHING_FREQ_890KHZ }, + { .khz = 808, .reg = ISL9241_CONTROL1_SWITCHING_FREQ_808KHZ }, + { .khz = 724, .reg = ISL9241_CONTROL1_SWITCHING_FREQ_724KHZ }, + { .khz = 656, .reg = ISL9241_CONTROL1_SWITCHING_FREQ_656KHZ }, + { .khz = 600, .reg = ISL9241_CONTROL1_SWITCHING_FREQ_600KHZ }, +}; + +ZTEST_F(isl9241_driver, test_frequency) +{ + for (int i = 0; i < ARRAY_SIZE(frequency_table); i++) { + uint16_t register_peek; + struct frequency_test *t = &frequency_table[i]; + + zassert_ok(charger_set_frequency(t->khz)); + register_peek = isl9241_emul_peek(fixture->isl9241_emul, + ISL9241_REG_CONTROL1); + zassert_equal( + (register_peek & + ISL9241_CONTROL1_SWITCHING_FREQ_MASK) >> + 7, + t->reg, + "Failed to see correct register for %d kHz (0x%04x)\n", + t->khz, register_peek); + } +} + +ZTEST(isl9241_driver, test_options) +{ + /* We're free to set whatever we want in CONTROL0 15:0 */ + int option = ISL9241_CONTROL0_EN_CHARGE_PUMPS | + ISL9241_CONTROL0_EN_BYPASS_GATE; + int temp; + + zassert_ok(charger_set_option(option)); + zassert_ok(charger_get_option(&temp)); + zassert_equal(option, temp); +} + +ZTEST(isl9241_driver, test_inhibit_charge) +{ + int status; + + zassert_ok(charger_set_mode(CHARGE_FLAG_INHIBIT_CHARGE)); + zassert_ok(charger_get_status(&status)); + zassert_equal((status & CHARGER_CHARGE_INHIBITED), + CHARGER_CHARGE_INHIBITED); +} + +ZTEST_F(isl9241_driver, test_por_reset) +{ + zassert_ok(charger_set_mode(CHARGE_FLAG_POR_RESET)); + zassert_equal(isl9241_emul_peek(fixture->isl9241_emul, + ISL9241_REG_CONTROL3), + ISL9241_CONTROL3_DIGITAL_RESET); +} + +ZTEST(isl9241_driver, test_current) +{ + int current = 4000; + int temp; + + zassert_ok(charger_set_current(CHARGER_SOLO, current)); + zassert_ok(charger_get_current(CHARGER_SOLO, &temp)); + zassert_equal(temp, current); +} + +ZTEST(isl9241_driver, test_voltage) +{ + int voltage = 12000; + int temp; + + zassert_ok(charger_set_voltage(CHARGER_SOLO, voltage)); + zassert_ok(charger_get_voltage(CHARGER_SOLO, &temp)); + zassert_equal(temp, voltage); +} + +ZTEST_F(isl9241_driver, test_vbus_voltage) +{ + int voltage = 5088; /* ADC is in 96 mV steps */ + int status; + + isl9241_emul_set_vbus(fixture->isl9241_emul, voltage); + zassert_ok(charger_get_status(&status)); + zassert_equal((status & CHARGER_AC_PRESENT), CHARGER_AC_PRESENT); + + zassert_ok(charger_get_vbus_voltage(0, &status)); + zassert_equal(voltage, status); +} + +ZTEST_F(isl9241_driver, test_vsys_voltage) +{ + int voltage = 9984; /* ADC is in 96 mV steps */ + int temp; + + isl9241_emul_set_vsys(fixture->isl9241_emul, voltage); + zassert_ok(charger_get_vsys_voltage(0, &temp)); + zassert_equal(voltage, temp); +} + +ZTEST(isl9241_driver, test_post_init) +{ + /* Note: function is a no-op for this chip */ + zassert_ok(charger_post_init()); +} + +ZTEST_F(isl9241_driver, test_ac_prochot) +{ + /* Test bounds settings for allowed currents */ + /* Note: AC currents are scaled by the default of 20 */ + int scale = 20 / CONFIG_CHARGER_SENSE_RESISTOR_AC; + int cur = (ISL9241_AC_PROCHOT_CURRENT_MAX + 100) * scale; + + printf("cur %d ", cur); + zassert_ok(isl9241_set_ac_prochot(CHARGER_SOLO, cur)); + printf("%d\n", isl9241_emul_peek(fixture->isl9241_emul, + ISL9241_REG_AC_PROCHOT)); + zassert_equal(isl9241_emul_peek(fixture->isl9241_emul, + ISL9241_REG_AC_PROCHOT), + ISL9241_AC_PROCHOT_CURRENT_MAX); + + cur = (ISL9241_AC_PROCHOT_CURRENT_MIN - 100) * scale; + printf("cur %d ", cur); + zassert_ok(isl9241_set_ac_prochot(CHARGER_SOLO, cur)); + printf("%d\n", isl9241_emul_peek(fixture->isl9241_emul, + ISL9241_REG_AC_PROCHOT)); + zassert_equal(isl9241_emul_peek(fixture->isl9241_emul, + ISL9241_REG_AC_PROCHOT), + ISL9241_AC_PROCHOT_CURRENT_MIN); +} + +ZTEST_F(isl9241_driver, test_dc_prochot) +{ + /* Test bounds settings for allowed currents */ + /* Note: DC currents are scaled by default of 10 */ + int scale = 10 / CONFIG_CHARGER_SENSE_RESISTOR; + int cur = (ISL9241_DC_PROCHOT_CURRENT_MAX + 100) * scale; + + zassert_ok(isl9241_set_dc_prochot(CHARGER_SOLO, cur)); + zassert_equal(isl9241_emul_peek(fixture->isl9241_emul, + ISL9241_REG_DC_PROCHOT), + ISL9241_DC_PROCHOT_CURRENT_MAX); + + cur = (ISL9241_DC_PROCHOT_CURRENT_MIN - 100) * scale; + zassert_ok(isl9241_set_dc_prochot(CHARGER_SOLO, cur)); + zassert_equal(isl9241_emul_peek(fixture->isl9241_emul, + ISL9241_REG_DC_PROCHOT), + ISL9241_DC_PROCHOT_CURRENT_MIN); +} + +ZTEST(isl9241_driver, test_prochot_dump) +{ + /* + * Note: this function's purpose is to print register contents to the + * console for debugging + */ + print_charger_prochot(CHARGER_SOLO); +} diff --git a/zephyr/test/drivers/isl9241/usbc.dts b/zephyr/test/drivers/isl9241/usbc.dts new file mode 100644 index 0000000000..94ddccb7d3 --- /dev/null +++ b/zephyr/test/drivers/isl9241/usbc.dts @@ -0,0 +1,27 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/usb_pd_tcpm.h> + +/ { + usbc { + port0@0 { + compatible = "named-usbc-port"; + chg = <&isl9241_emul>; + }; + }; +}; + +&i2c0 { + status="okay"; + + /delete-node/ isl923x@9; + + isl9241_emul: isl9241_emul@9 { + compatible = "intersil,isl9241"; + status = "okay"; + reg = <0x9>; + }; +}; diff --git a/zephyr/test/drivers/keyboard_scan/src/keyboard_backlight.c b/zephyr/test/drivers/keyboard_scan/src/keyboard_backlight.c index 77131d5d5f..0f07b2fbcd 100644 --- a/zephyr/test/drivers/keyboard_scan/src/keyboard_backlight.c +++ b/zephyr/test/drivers/keyboard_scan/src/keyboard_backlight.c @@ -37,7 +37,7 @@ static uint16_t set_backlight_percent_helper(uint8_t percent) return ec_cmd_pwm_set_keyboard_backlight(NULL, ¶ms); } -ZTEST(keyboard_backlight, host_command_set_backlight__normal) +ZTEST(keyboard_backlight, test_host_command_set_backlight__normal) { /* Set the backlight intensity level to this and verify */ uint8_t expected_percentage = 50; @@ -46,7 +46,7 @@ ZTEST(keyboard_backlight, host_command_set_backlight__normal) zassert_equal(expected_percentage, kblight_get(), NULL); } -ZTEST(keyboard_backlight, host_command_set_backlight__out_of_range) +ZTEST(keyboard_backlight, test_host_command_set_backlight__out_of_range) { /* Too high */ uint8_t expected_percentage = 101; @@ -55,7 +55,7 @@ ZTEST(keyboard_backlight, host_command_set_backlight__out_of_range) set_backlight_percent_helper(expected_percentage), NULL); } -ZTEST(keyboard_backlight, host_command_get_backlight__normal) +ZTEST(keyboard_backlight, test_host_command_get_backlight__normal) { /* Set this backlight intensity and verify via host command */ uint8_t expected_percentage = 50; @@ -74,7 +74,7 @@ ZTEST(keyboard_backlight, host_command_get_backlight__normal) zassert_equal(1, response.enabled, "Got 0x%02x", response.enabled); } -ZTEST(keyboard_backlight, console_command__noargs) +ZTEST(keyboard_backlight, test_console_command__noargs) { /* Command should print current status. Set backlight on and to 70% */ @@ -94,7 +94,7 @@ ZTEST(keyboard_backlight, console_command__noargs) "Actual string: `%s`", outbuffer); } -ZTEST(keyboard_backlight, console_command__set_on) +ZTEST(keyboard_backlight, test_console_command__set_on) { /* Command should enable backlight to given intensity */ @@ -103,7 +103,7 @@ ZTEST(keyboard_backlight, console_command__set_on) zassert_equal(1, kblight_get_current_enable(), NULL); } -ZTEST(keyboard_backlight, console_command__set_off) +ZTEST(keyboard_backlight, test_console_command__set_off) { zassert_ok(set_backlight_percent_helper(40), NULL); k_sleep(K_MSEC(50)); @@ -114,7 +114,7 @@ ZTEST(keyboard_backlight, console_command__set_off) zassert_equal(0, kblight_get_current_enable(), NULL); } -ZTEST(keyboard_backlight, console_command__bad_params) +ZTEST(keyboard_backlight, test_console_command__bad_params) { zassert_equal(EC_ERROR_PARAM1, shell_execute_cmd(get_ec_shell(), "kblight NaN"), NULL); @@ -124,7 +124,7 @@ ZTEST(keyboard_backlight, console_command__bad_params) shell_execute_cmd(get_ec_shell(), "kblight 101"), NULL); } -ZTEST(keyboard_backlight, set_backlight__device_not_ready) +ZTEST(keyboard_backlight, test_set_backlight__device_not_ready) { const struct pwm_dt_spec kblight_pwm_dt = PWM_DT_SPEC_GET(KBLIGHT_PWM_NODE); diff --git a/zephyr/test/drivers/keyboard_scan/src/keyboard_scan.c b/zephyr/test/drivers/keyboard_scan/src/keyboard_scan.c index 71961c0a86..fdae74cac1 100644 --- a/zephyr/test/drivers/keyboard_scan/src/keyboard_scan.c +++ b/zephyr/test/drivers/keyboard_scan/src/keyboard_scan.c @@ -102,7 +102,7 @@ ZTEST(keyboard_scan, test_press_enter) k_sleep(K_MSEC(100)); } -ZTEST(keyboard_scan, console_command_ksstate__noargs) +ZTEST(keyboard_scan, test_console_command_ksstate__noargs) { const char *outbuffer; size_t buffer_size; @@ -124,7 +124,7 @@ ZTEST(keyboard_scan, console_command_ksstate__noargs) zassert_true(keyboard_scan_is_enabled()); } -ZTEST(keyboard_scan, console_command_ksstate__force) +ZTEST(keyboard_scan, test_console_command_ksstate__force) { /* This command forces the keyboard to start scanning (if not already) * and enable state change printing. To test: turn scanning off, run @@ -140,7 +140,7 @@ ZTEST(keyboard_scan, console_command_ksstate__force) zassert_true(keyboard_scan_get_print_state_changes()); } -ZTEST(keyboard_scan, console_command_ksstate__on_off) +ZTEST(keyboard_scan, test_console_command_ksstate__on_off) { /* This command turns state change printing on/off */ @@ -153,13 +153,13 @@ ZTEST(keyboard_scan, console_command_ksstate__on_off) zassert_false(keyboard_scan_get_print_state_changes()); } -ZTEST(keyboard_scan, console_command_ksstate__invalid) +ZTEST(keyboard_scan, test_console_command_ksstate__invalid) { /* Pass a string that cannot be parsed as a bool */ zassert_ok(!shell_execute_cmd(get_ec_shell(), "ksstate xyz")); } -ZTEST(keyboard_scan, console_command_kbpress__noargs) +ZTEST(keyboard_scan, test_console_command_kbpress__noargs) { const char *outbuffer; size_t buffer_size; @@ -176,7 +176,7 @@ ZTEST(keyboard_scan, console_command_kbpress__noargs) outbuffer); } -ZTEST(keyboard_scan, console_command_kbpress__invalid) +ZTEST(keyboard_scan, test_console_command_kbpress__invalid) { /* Row or column number out of range, or wrong type */ zassert_ok(!shell_execute_cmd(get_ec_shell(), "kbpress -1 0")); @@ -195,22 +195,16 @@ ZTEST(keyboard_scan, console_command_kbpress__invalid) */ FAKE_VOID_FUNC(key_state_changed, int, int, uint8_t); -ZTEST(keyboard_scan, console_command_kbpress__press_and_release) +ZTEST(keyboard_scan, test_console_command_kbpress__press) { - /* Pres and release a key */ + /* Press and release a key */ zassert_ok(shell_execute_cmd(get_ec_shell(), "kbpress 1 2")); - /* Hold a key down */ - zassert_ok(shell_execute_cmd(get_ec_shell(), "kbpress 3 4 1")); - - /* Release the key */ - zassert_ok(shell_execute_cmd(get_ec_shell(), "kbpress 3 4 0")); - /* Pause a bit to allow the key scan task to process. */ - k_sleep(K_MSEC(200)); + k_sleep(K_MSEC(500)); - /* Expect four key events */ - zassert_equal(4, key_state_changed_fake.call_count); + /* Expect two key events */ + zassert_equal(2, key_state_changed_fake.call_count); /* Press col=1,row=2 (state==1) */ zassert_equal(1, key_state_changed_fake.arg1_history[0]); @@ -221,19 +215,36 @@ ZTEST(keyboard_scan, console_command_kbpress__press_and_release) zassert_equal(1, key_state_changed_fake.arg1_history[1]); zassert_equal(2, key_state_changed_fake.arg0_history[1]); zassert_false(key_state_changed_fake.arg2_history[1]); +} + +ZTEST(keyboard_scan, test_console_command_kbpress__down_and_up) +{ + /* Hold a key down */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "kbpress 3 4 1")); + + /* Release the key */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "kbpress 3 4 0")); + + /* Pause a bit to allow the key scan task to process. */ + k_sleep(K_MSEC(500)); + + /* Expect two key events */ + zassert_equal(2, key_state_changed_fake.call_count, + "Actual call_count=%d", + key_state_changed_fake.call_count); /* Press col=3,row=4 (state==1) */ - zassert_equal(3, key_state_changed_fake.arg1_history[2]); - zassert_equal(4, key_state_changed_fake.arg0_history[2]); - zassert_true(key_state_changed_fake.arg2_history[2]); + zassert_equal(3, key_state_changed_fake.arg1_history[0]); + zassert_equal(4, key_state_changed_fake.arg0_history[0]); + zassert_true(key_state_changed_fake.arg2_history[0]); /* Release col=3,row=4 (state==0) */ - zassert_equal(3, key_state_changed_fake.arg1_history[3]); - zassert_equal(4, key_state_changed_fake.arg0_history[3]); - zassert_false(key_state_changed_fake.arg2_history[3]); + zassert_equal(3, key_state_changed_fake.arg1_history[1]); + zassert_equal(4, key_state_changed_fake.arg0_history[1]); + zassert_false(key_state_changed_fake.arg2_history[1]); } -ZTEST(keyboard_scan, host_command_simulate_key__locked) +ZTEST(keyboard_scan, test_host_command_simulate_key__locked) { uint16_t ret; @@ -245,7 +256,7 @@ ZTEST(keyboard_scan, host_command_simulate_key__locked) zassert_equal(EC_RES_ACCESS_DENIED, ret, "Command returned %u", ret); } -ZTEST(keyboard_scan, host_command_simulate_key__bad_params) +ZTEST(keyboard_scan, test_host_command_simulate_key__bad_params) { uint16_t ret; @@ -284,7 +295,7 @@ static uint16_t send_keypress_host_command(uint8_t col, uint8_t row, return host_command_process(&args); } -ZTEST(keyboard_scan, host_command_simulate__key_press) +ZTEST(keyboard_scan, test_host_command_simulate__key_press) { uint16_t ret; @@ -316,7 +327,7 @@ ZTEST(keyboard_scan, host_command_simulate__key_press) FAKE_VOID_FUNC(system_enter_hibernate, uint32_t, uint32_t); FAKE_VOID_FUNC(chipset_reset, int); -ZTEST(keyboard_scan, special_key_combos) +ZTEST(keyboard_scan, test_special_key_combos) { system_is_locked_fake.return_val = 0; zassert_false(system_is_locked(), "Expecting unlocked system."); @@ -380,6 +391,11 @@ static void reset_keyboard(void *data) /* Reset KB emulator */ clear_emulated_keys(); + /* Clear debouncing state to prevent latent key presses from appearing + * in a later test. + */ + test_keyboard_scan_debounce_reset(); + /* Reset all mocks. */ RESET_FAKE(key_state_changed); RESET_FAKE(system_is_locked); diff --git a/zephyr/test/drivers/keyboard_scan/src/mkbp_info.c b/zephyr/test/drivers/keyboard_scan/src/mkbp_info.c index 2e3e3ecf94..0588324c91 100644 --- a/zephyr/test/drivers/keyboard_scan/src/mkbp_info.c +++ b/zephyr/test/drivers/keyboard_scan/src/mkbp_info.c @@ -15,7 +15,7 @@ #include <emul/emul_kb_raw.h> -ZTEST(mkbp_info, host_command_mkbp_info__keyboard_info) +ZTEST(mkbp_info, test_host_command_mkbp_info__keyboard_info) { /* Get the number of keyboard rows and columns */ @@ -31,7 +31,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__keyboard_info) zassert_equal(KEYBOARD_COLS_MAX, response.cols, NULL); } -ZTEST(mkbp_info, host_command_mkbp_info__supported_buttons) +ZTEST(mkbp_info, test_host_command_mkbp_info__supported_buttons) { /* Get the set of supported buttons */ @@ -47,7 +47,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__supported_buttons) zassert_equal(get_supported_buttons(), response.buttons, NULL); } -ZTEST(mkbp_info, host_command_mkbp_info__supported_switches) +ZTEST(mkbp_info, test_host_command_mkbp_info__supported_switches) { /* Get the set of supported switches */ @@ -63,7 +63,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__supported_switches) zassert_equal(get_supported_switches(), response.switches, NULL); } -ZTEST(mkbp_info, host_command_mkbp_info__supported_invalid) +ZTEST(mkbp_info, test_host_command_mkbp_info__supported_invalid) { /* Request support info on a non-existent type of input device. */ @@ -79,7 +79,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__supported_invalid) "Host command didn't fail properly: %d", ret); } -ZTEST(mkbp_info, host_command_mkbp_info__current_keyboard_matrix) +ZTEST(mkbp_info, test_host_command_mkbp_info__current_keyboard_matrix) { /* Hold down a key so we can validate the returned keyboard matrix state */ @@ -107,7 +107,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__current_keyboard_matrix) "Expected key is not pressed"); } -ZTEST(mkbp_info, host_command_mkbp_info__current_host_events) +ZTEST(mkbp_info, test_host_command_mkbp_info__current_host_events) { int ret; union ec_response_get_next_data response; @@ -121,7 +121,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__current_host_events) zassert_equal((uint32_t)host_get_events(), response.host_event, NULL); } -ZTEST(mkbp_info, host_command_mkbp_info__current_host_events64) +ZTEST(mkbp_info, test_host_command_mkbp_info__current_host_events64) { int ret; union ec_response_get_next_data response; @@ -135,7 +135,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__current_host_events64) zassert_equal(host_get_events(), response.host_event64, NULL); } -ZTEST(mkbp_info, host_command_mkbp_info__current_buttons) +ZTEST(mkbp_info, test_host_command_mkbp_info__current_buttons) { int ret; union ec_response_get_next_data response; @@ -149,7 +149,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__current_buttons) zassert_equal(mkbp_get_button_state(), response.buttons, NULL); } -ZTEST(mkbp_info, host_command_mkbp_info__current_switches) +ZTEST(mkbp_info, test_host_command_mkbp_info__current_switches) { int ret; union ec_response_get_next_data response; @@ -163,7 +163,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__current_switches) zassert_equal(mkbp_get_switch_state(), response.switches, NULL); } -ZTEST(mkbp_info, host_command_mkbp_info__current_invalid) +ZTEST(mkbp_info, test_host_command_mkbp_info__current_invalid) { int ret; union ec_response_get_next_data response; @@ -177,7 +177,7 @@ ZTEST(mkbp_info, host_command_mkbp_info__current_invalid) ret); } -ZTEST(mkbp_info, host_command_mkbp_info__invalid) +ZTEST(mkbp_info, test_host_command_mkbp_info__invalid) { int ret; union ec_response_get_next_data response; diff --git a/zephyr/test/drivers/led_driver/src/led_common.c b/zephyr/test/drivers/led_driver/src/led_common.c index 7bab7498db..d865aba8e0 100644 --- a/zephyr/test/drivers/led_driver/src/led_common.c +++ b/zephyr/test/drivers/led_driver/src/led_common.c @@ -9,7 +9,7 @@ #include <zephyr/fff.h> #include <zephyr/ztest.h> -ZTEST(led_common, host_command__query) +ZTEST(led_common, test_host_command__query) { /* Gets the brightness range for an LED */ @@ -34,7 +34,7 @@ ZTEST(led_common, host_command__query) sizeof(expected_brightness_ranges), NULL); } -ZTEST(led_common, host_command__invalid_led) +ZTEST(led_common, test_host_command__invalid_led) { /* Try accessing info on a non-existent LED */ @@ -51,7 +51,7 @@ ZTEST(led_common, host_command__invalid_led) ret); } -ZTEST(led_common, host_command__supported_channel) +ZTEST(led_common, test_host_command__supported_channel) { /* Try setting brightness on a color channel that is not supported */ @@ -72,7 +72,7 @@ ZTEST(led_common, host_command__supported_channel) ret); } -ZTEST(led_common, host_command__manual_control) +ZTEST(led_common, test_host_command__manual_control) { /* Set brightness for an LED directly */ @@ -100,7 +100,7 @@ ZTEST(led_common, host_command__manual_control) FAKE_VOID_FUNC(board_led_auto_control); -ZTEST(led_common, host_command__auto_control) +ZTEST(led_common, test_host_command__auto_control) { /* Configure an LED for automatic control */ diff --git a/zephyr/test/drivers/nx20p348x/CMakeLists.txt b/zephyr/test/drivers/nx20p348x/CMakeLists.txt new file mode 100644 index 0000000000..b2c202bd5b --- /dev/null +++ b/zephyr/test/drivers/nx20p348x/CMakeLists.txt @@ -0,0 +1,9 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +target_include_directories(app PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/include) + +target_sources(app PRIVATE src/nx20p348x.c) +target_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_NX20P3481 app PRIVATE src/nx20p3481.c) +target_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483 app PRIVATE src/nx20p3483.c) diff --git a/zephyr/test/drivers/nx20p348x/include/nx20p348x_test_shared.h b/zephyr/test/drivers/nx20p348x/include/nx20p348x_test_shared.h new file mode 100644 index 0000000000..633dd2e700 --- /dev/null +++ b/zephyr/test/drivers/nx20p348x/include/nx20p348x_test_shared.h @@ -0,0 +1,17 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef ZEPHYR_TEST_DRIVERS_NX20_348X_TEST_SHARED_H_ +#define ZEPHYR_TEST_DRIVERS_NX20_348X_TEST_SHARED_H_ + +#include "emul/emul_nx20p348x.h" + +#define TEST_PORT USBC_PORT_C0 + +struct nx20p348x_driver_fixture { + const struct emul *nx20p348x_emul; +}; + +#endif /* ZEPHYR_TEST_DRIVERS_NX20_348X_TEST_SHARED_H_ */ diff --git a/zephyr/test/drivers/nx20p348x/src/nx20p3481.c b/zephyr/test/drivers/nx20p348x/src/nx20p3481.c new file mode 100644 index 0000000000..0897c3e8d1 --- /dev/null +++ b/zephyr/test/drivers/nx20p348x/src/nx20p3481.c @@ -0,0 +1,49 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "driver/ppc/nx20p348x.h" +#include "nx20p348x_test_shared.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "usbc_ppc.h" + +#include <zephyr/shell/shell.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest.h> + +ZTEST_F(nx20p348x_driver, test_sink_enable) +{ + uint8_t reg; + + zassert_ok(ppc_vbus_sink_enable(TEST_PORT, true)); + reg = nx20p348x_emul_peek(fixture->nx20p348x_emul, + NX20P348X_SWITCH_CONTROL_REG); + zassert_equal(reg & NX20P3481_SWITCH_CONTROL_HVSNK, + NX20P3481_SWITCH_CONTROL_HVSNK); + + zassert_ok(ppc_vbus_sink_enable(TEST_PORT, false)); + reg = nx20p348x_emul_peek(fixture->nx20p348x_emul, + NX20P348X_SWITCH_CONTROL_REG); + zassert_not_equal(reg & NX20P3481_SWITCH_CONTROL_HVSNK, + NX20P3481_SWITCH_CONTROL_HVSNK); +} + +ZTEST_F(nx20p348x_driver, test_source_enable) +{ + uint8_t reg; + + zassert_ok(ppc_vbus_source_enable(TEST_PORT, true)); + reg = nx20p348x_emul_peek(fixture->nx20p348x_emul, + NX20P348X_SWITCH_CONTROL_REG); + zassert_equal(reg & NX20P3481_SWITCH_CONTROL_5VSRC, + NX20P3481_SWITCH_CONTROL_5VSRC); + + zassert_ok(ppc_vbus_source_enable(TEST_PORT, false)); + reg = nx20p348x_emul_peek(fixture->nx20p348x_emul, + NX20P348X_SWITCH_CONTROL_REG); + zassert_not_equal(reg & NX20P3481_SWITCH_CONTROL_5VSRC, + NX20P3481_SWITCH_CONTROL_5VSRC); +} diff --git a/zephyr/test/drivers/nx20p348x/src/nx20p3483.c b/zephyr/test/drivers/nx20p348x/src/nx20p3483.c new file mode 100644 index 0000000000..7d754112a9 --- /dev/null +++ b/zephyr/test/drivers/nx20p348x/src/nx20p3483.c @@ -0,0 +1,27 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "nx20p348x_test_shared.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "usbc_ppc.h" + +#include <zephyr/shell/shell.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest.h> + +ZTEST(nx20p348x_driver, test_sink_enable_timeout_failure) +{ + /* Note: PPC requires a TCPC GPIO to enable its sinking */ + zassert_equal(ppc_vbus_sink_enable(TEST_PORT, true), EC_ERROR_TIMEOUT); +} + +ZTEST(nx20p348x_driver, test_source_enable_timeout_failure) +{ + /* Note: PPC requires a TCPC GPIO to enable its sourcing */ + zassert_equal(ppc_vbus_source_enable(TEST_PORT, true), + EC_ERROR_TIMEOUT); +} diff --git a/zephyr/test/drivers/nx20p348x/src/nx20p348x.c b/zephyr/test/drivers/nx20p348x/src/nx20p348x.c new file mode 100644 index 0000000000..5ec7ba5ae1 --- /dev/null +++ b/zephyr/test/drivers/nx20p348x/src/nx20p348x.c @@ -0,0 +1,227 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "battery_smart.h" +#include "charger.h" +#include "console.h" +#include "driver/ppc/nx20p348x.h" +#include "driver/ppc/nx20p348x_public.h" +#include "nx20p348x_test_shared.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "usb_pd_tcpm.h" + +#include <zephyr/shell/shell.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest.h> + +#define NX20P383X_NODE DT_NODELABEL(nx20p348x_emul) + +static void *nx20p348x_driver_setup(void) +{ + static struct nx20p348x_driver_fixture fix; + + fix.nx20p348x_emul = EMUL_DT_GET(NX20P383X_NODE); + + return &fix; +} + +ZTEST_SUITE(nx20p348x_driver, drivers_predicate_post_main, + nx20p348x_driver_setup, NULL, NULL, NULL); + +struct curr_limit_pair { + enum tcpc_rp_value rp; + uint8_t reg; +}; + +/* Note: Register values are slightly higher to account for overshoot */ +static struct curr_limit_pair currents[] = { + { .rp = TYPEC_RP_3A0, .reg = NX20P348X_ILIM_3_200 }, + { .rp = TYPEC_RP_1A5, .reg = NX20P348X_ILIM_1_600 }, + { .rp = TYPEC_RP_USB, .reg = NX20P348X_ILIM_0_600 }, +}; + +ZTEST_F(nx20p348x_driver, test_source_curr_limits) +{ + for (int i = 0; i < ARRAY_SIZE(currents); i++) { + uint8_t read; + + ppc_set_vbus_source_current_limit(TEST_PORT, currents[i].rp); + read = nx20p348x_emul_peek(fixture->nx20p348x_emul, + NX20P348X_5V_SRC_OCP_THRESHOLD_REG); + zassert_equal( + (read & NX20P348X_ILIM_MASK), currents[i].reg, + "Failed to see correct threshold for Rp %d (reg: 0x%02x)", + currents[i].rp, read); + } +} + +ZTEST_F(nx20p348x_driver, test_discharge_vbus) +{ + uint8_t reg; + + zassert_ok(ppc_discharge_vbus(TEST_PORT, true)); + reg = nx20p348x_emul_peek(fixture->nx20p348x_emul, + NX20P348X_DEVICE_CONTROL_REG); + zassert_equal((reg & NX20P348X_CTRL_VBUSDIS_EN), + NX20P348X_CTRL_VBUSDIS_EN); + + zassert_ok(ppc_discharge_vbus(TEST_PORT, false)); + reg = nx20p348x_emul_peek(fixture->nx20p348x_emul, + NX20P348X_DEVICE_CONTROL_REG); + zassert_not_equal((reg & NX20P348X_CTRL_VBUSDIS_EN), + NX20P348X_CTRL_VBUSDIS_EN); +} + +ZTEST(nx20p348x_driver, test_ppc_dump) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + shell_backend_dummy_clear_output(shell_zephyr); + + /* This chip supports PPC dump, so should return success */ + zassert_ok(shell_execute_cmd(shell_zephyr, "ppc_dump 0")); + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(buffer_size > 0); + + /* Weakly verify something reasonable was output to console */ + zassert_not_null(strstr(outbuffer, "]: 0x")); +} + +ZTEST_F(nx20p348x_driver, test_db_exit_err) +{ + uint8_t reg; + + /* Test an error to exit dead battery mode */ + nx20p348x_emul_set_interrupt1(fixture->nx20p348x_emul, + NX20P348X_INT1_DBEXIT_ERR); + + /* Give the interrupt time to process */ + k_sleep(K_MSEC(500)); + + /* Interrupt should have set DB exit in the control register */ + reg = nx20p348x_emul_peek(fixture->nx20p348x_emul, + NX20P348X_DEVICE_CONTROL_REG); + zassert_equal((reg & NX20P348X_CTRL_DB_EXIT), NX20P348X_CTRL_DB_EXIT); +} + +ZTEST_F(nx20p348x_driver, test_db_exit_err_max) +{ + uint8_t reg; + + /* Set a DB exit error 10 times */ + for (int i = 0; i < 10; i++) { + nx20p348x_emul_set_interrupt1(fixture->nx20p348x_emul, + NX20P348X_INT1_DBEXIT_ERR); + k_sleep(K_MSEC(500)); + } + + /* Interrupt should now be masked by the driver */ + reg = nx20p348x_emul_peek(fixture->nx20p348x_emul, + NX20P348X_INTERRUPT1_MASK_REG); + zassert_equal((reg & NX20P348X_INT1_DBEXIT_ERR), + NX20P348X_INT1_DBEXIT_ERR); +} + +/* Add filler in case of event data */ +#define MAX_RESPONSE_PD_LOG_ENTRY_SIZE (sizeof(struct ec_response_pd_log) + 16) + +static void flush_pd_log(void) +{ + uint8_t response_buffer[MAX_RESPONSE_PD_LOG_ENTRY_SIZE]; + struct ec_response_pd_log *response = + (struct ec_response_pd_log *)response_buffer; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_PD_GET_LOG_ENTRY, 0); + + args.response = response; + args.response_max = sizeof(response_buffer); + + for (int i = 0; i < 10; i++) { + zassert_ok(host_command_process(&args)); + + if (response->type == PD_EVENT_NO_ENTRY) + return; + + k_sleep(K_MSEC(500)); + } + + zassert_unreachable("Failed to flush PD log"); +} + +ZTEST_F(nx20p348x_driver, test_vbus_overcurrent) +{ + uint8_t response_buffer[MAX_RESPONSE_PD_LOG_ENTRY_SIZE]; + struct ec_response_pd_log *response = + (struct ec_response_pd_log *)response_buffer; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_PD_GET_LOG_ENTRY, 0); + + flush_pd_log(); + + /* Set up overcurrent */ + nx20p348x_emul_set_interrupt1(fixture->nx20p348x_emul, + NX20P348X_INT1_OC_5VSRC); + k_sleep(K_MSEC(500)); + + args.response = response; + args.response_max = sizeof(response_buffer); + + zassert_ok(host_command_process(&args)); + zassert_equal(TEST_PORT, PD_LOG_PORT(response->size_port)); + zassert_equal(0, PD_LOG_SIZE(response->size_port)); + zassert_equal(PD_EVENT_PS_FAULT, response->type); + zassert_equal(PS_FAULT_OCP, response->data); +} + +ZTEST_F(nx20p348x_driver, test_vbus_reverse_current) +{ + uint8_t response_buffer[MAX_RESPONSE_PD_LOG_ENTRY_SIZE]; + struct ec_response_pd_log *response = + (struct ec_response_pd_log *)response_buffer; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_PD_GET_LOG_ENTRY, 0); + + flush_pd_log(); + + /* Set up reverse current */ + nx20p348x_emul_set_interrupt1(fixture->nx20p348x_emul, + NX20P348X_INT1_RCP_5VSRC); + k_sleep(K_MSEC(500)); + + args.response = response; + args.response_max = sizeof(response_buffer); + + zassert_ok(host_command_process(&args)); + zassert_equal(TEST_PORT, PD_LOG_PORT(response->size_port)); + zassert_equal(0, PD_LOG_SIZE(response->size_port)); + zassert_equal(PD_EVENT_PS_FAULT, response->type); + zassert_equal(PS_FAULT_OCP, response->data); +} + +ZTEST_F(nx20p348x_driver, test_vbus_short) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + shell_backend_dummy_clear_output(shell_zephyr); + + /* Set up Vbus short, which we only report in the console */ + nx20p348x_emul_set_interrupt1(fixture->nx20p348x_emul, + NX20P348X_INT1_SC_5VSRC); + k_sleep(K_MSEC(500)); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(buffer_size > 0); + + /* Weakly verify something reasonable was output to console */ + zassert_not_null(strstr(outbuffer, "short")); +} diff --git a/zephyr/test/drivers/nx20p348x/usbc.dts b/zephyr/test/drivers/nx20p348x/usbc.dts new file mode 100644 index 0000000000..86fb5781d6 --- /dev/null +++ b/zephyr/test/drivers/nx20p348x/usbc.dts @@ -0,0 +1,26 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/usb_pd_tcpm.h> + +/ { + usbc { + port0@0 { + compatible = "named-usbc-port"; + ppc = <&nx20p348x_emul>; + }; + }; +}; + +&i2c2 { + status="okay"; + + nx20p348x_emul: nx20p348x_emul@9 { + compatible = "nxp,nx20p348x"; + status = "okay"; + reg = <0x71>; + irq-gpios = < &gpio0 14 GPIO_ACTIVE_LOW >; + }; +}; diff --git a/zephyr/test/drivers/ps8xxx/src/multi_port.c b/zephyr/test/drivers/ps8xxx/src/multi_port.c index f3b5d7d066..76bcbb4c38 100644 --- a/zephyr/test/drivers/ps8xxx/src/multi_port.c +++ b/zephyr/test/drivers/ps8xxx/src/multi_port.c @@ -41,7 +41,7 @@ ZTEST(multi_port, test_multiple_ports) "port 0 and port 1 contains duplicate information.\n"); } -ZTEST(multi_port, fw_version_cache) +ZTEST(multi_port, test_fw_version_cache) { zassert_ok(tcpci_emul_set_reg(ps8xxx_emul_0, PS8XXX_REG_FW_REV, 0x12), "Unable to set firmware rev for emulator 0.\n"); diff --git a/zephyr/test/drivers/rt1718s/CMakeLists.txt b/zephyr/test/drivers/rt1718s/CMakeLists.txt new file mode 100644 index 0000000000..2d0af8b6c5 --- /dev/null +++ b/zephyr/test/drivers/rt1718s/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Add source files +target_sources(app PRIVATE src/tcpc.c) diff --git a/zephyr/test/drivers/rt1718s/ppc_tcpc.dts b/zephyr/test/drivers/rt1718s/ppc_tcpc.dts new file mode 100644 index 0000000000..c32dea6019 --- /dev/null +++ b/zephyr/test/drivers/rt1718s/ppc_tcpc.dts @@ -0,0 +1,31 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/usb_pd_tcpm.h> + +/ { + usbc { + port0@0 { + compatible = "named-usbc-port"; + tcpc = <&rt1718s_emul>; + }; + }; +}; + +&i2c0 { + status="okay"; + + rt1718s_emul: rt1718s_emul@2c { + compatible = "cros,rt1718s-tcpc-emul", "richtek,rt1718s-tcpc"; + + status = "okay"; + + reg = <0x2c>; + tcpc-flags = <( + TCPC_FLAGS_ALERT_OD | + TCPC_FLAGS_CONTROL_VCONN | + TCPC_FLAGS_CONTROL_FRS)>; + }; +}; diff --git a/zephyr/test/drivers/rt1718s/prj.conf b/zephyr/test/drivers/rt1718s/prj.conf new file mode 100644 index 0000000000..a38bde7b92 --- /dev/null +++ b/zephyr/test/drivers/rt1718s/prj.conf @@ -0,0 +1,7 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_SBU=y +CONFIG_PLATFORM_EC_USB_PD_FRS_TCPC=y diff --git a/zephyr/test/drivers/rt1718s/src/tcpc.c b/zephyr/test/drivers/rt1718s/src/tcpc.c new file mode 100644 index 0000000000..8259b6f097 --- /dev/null +++ b/zephyr/test/drivers/rt1718s/src/tcpc.c @@ -0,0 +1,244 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "driver/tcpm/rt1718s.h" +#include "driver/tcpm/rt1718s_public.h" +#include "driver/tcpm/tcpci.h" +#include "emul/tcpc/emul_rt1718s.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" + +#include <zephyr/drivers/emul.h> +#include <zephyr/logging/log.h> +#include <zephyr/sys/slist.h> +#include <zephyr/ztest.h> +LOG_MODULE_REGISTER(rt1718s_tcpc_test, CONFIG_TCPCI_EMUL_LOG_LEVEL); + +#define RT1718S_NODE DT_NODELABEL(rt1718s_emul) + +static const int tcpm_rt1718s_port = USBC_PORT_C0; +static const struct emul *rt1718s_emul = EMUL_DT_GET(RT1718S_NODE); + +static void rt1718s_clear_set_reg_history(void *f) +{ + rt1718s_emul_reset_set_history(rt1718s_emul); +} + +ZTEST_SUITE(rt1718s_tcpc, drivers_predicate_post_main, NULL, + rt1718s_clear_set_reg_history, rt1718s_clear_set_reg_history, NULL); + +static uint16_t get_emul_reg(const struct emul *emul, int reg) +{ + uint16_t val; + + zassert_ok(rt1718s_emul_get_reg(emul, reg, &val), + "Cannot get reg %x on rt1718s emul", reg); + return val; +} + +static void compare_reg_val_with_mask(const struct emul *emul, int reg, + uint16_t expected, uint16_t mask) +{ + uint16_t masked_val = get_emul_reg(emul, reg) & mask; + uint16_t masked_expected = expected & mask; + + zassert_equal(masked_val, masked_expected, + "expected register %x with mask %x should be %x, get %x", + reg, mask, masked_expected, masked_val); +} + +static void test_bc12_reg_init_settings(const struct emul *emul) +{ + /* Vendor defined BC12 function is enabled */ + compare_reg_val_with_mask(emul, RT1718S_RT_MASK6, + RT1718S_RT_MASK6_M_BC12_SNK_DONE | + RT1718S_RT_MASK6_M_BC12_TA_CHG, + 0xFF); + compare_reg_val_with_mask(emul, RT1718S_RT2_SBU_CTRL_01, + RT1718S_RT2_SBU_CTRL_01_DPDM_VIEN | + RT1718S_RT2_SBU_CTRL_01_DM_SWEN | + RT1718S_RT2_SBU_CTRL_01_DP_SWEN, + 0xFF); + /* 2.7v mode is disabled */ + compare_reg_val_with_mask(emul, RT1718S_RT2_BC12_SNK_FUNC, 0, + RT1718S_RT2_BC12_SNK_FUNC_SPEC_TA_EN); + /* DCDT is set to 600ms timeout */ + compare_reg_val_with_mask(emul, RT1718S_RT2_BC12_SNK_FUNC, + RT1718S_RT2_BC12_SNK_FUNC_DCDT_SEL_600MS, + RT1718S_RT2_BC12_SNK_FUNC_DCDT_SEL_MASK); + /* vlgc option is disabled */ + compare_reg_val_with_mask(emul, RT1718S_RT2_BC12_SNK_FUNC, 0, + RT1718S_RT2_BC12_SNK_FUNC_VLGC_OPT); + /* DPDM voltage selection is set to 65V */ + compare_reg_val_with_mask( + emul, RT1718S_RT2_DPDM_CTR1_DPDM_SET, + RT1718S_RT2_DPDM_CTR1_DPDM_SET_DPDM_VSRC_SEL_0_65V, + RT1718S_RT2_DPDM_CTR1_DPDM_SET_DPDM_VSRC_SEL_MASK); + /* Sink wait vbus is disabled */ + compare_reg_val_with_mask(emul, RT1718S_RT2_BC12_SNK_FUNC, 0, + RT1718S_RT2_BC12_SNK_FUNC_BC12_WAIT_VBUS); +} + +static void test_common_reg_init_settings(const struct emul *emul) +{ + /* VBUS_VOL_SEL is set to 20V */ + compare_reg_val_with_mask(emul, RT1718S_RT2_VBUS_VOL_CTRL, + RT1718S_VBUS_VOL_TO_REG(20), + RT1718S_RT2_VBUS_VOL_CTRL_VOL_SEL); + /* VCONN_OCP_SEL is set to 400mA */ + compare_reg_val_with_mask(emul, RT1718S_VCONN_CONTROL_3, 0x7F, + RT1718S_VCONN_CONTROL_3_VCONN_OCP_SEL); + /* Vconn OCP shoot detection is increased from 200ns to 3~5us */ + compare_reg_val_with_mask(emul, RT1718S_VCON_CTRL4, 0, + RT1718S_VCON_CTRL4_OCP_CP_EN); + /* FOD function is disabled */ + compare_reg_val_with_mask(emul, 0xCF, 0, 0x40); + /* Exit shipping mode request is set */ + compare_reg_val_with_mask(emul, RT1718S_SYS_CTRL1, 0, + RT1718S_SYS_CTRL1_TCPC_CONN_INVALID); + compare_reg_val_with_mask(emul, RT1718S_SYS_CTRL1, 0xFF, + RT1718S_SYS_CTRL1_SHIPPING_OFF); + /* Alert and fault is cleared */ + compare_reg_val_with_mask(emul, TCPC_REG_FAULT_STATUS, 0, 0xFF); + compare_reg_val_with_mask(emul, TCPC_REG_ALERT, 0, 0xFFFF); + /* + * TODO Validate vendor defined alert mask is set once tcpci emul fix. + */ + /* FRS settings: Rx frs and valid vbus fall is set to unmasked */ + compare_reg_val_with_mask(emul, RT1718S_RT_MASK1, 0xFF, + RT1718S_RT_MASK1_M_RX_FRS | + RT1718S_RT_MASK1_M_VBUS_FRS_LOW); +} + +ZTEST(rt1718s_tcpc, test_init_with_device_id_es1) +{ + rt1718s_emul_set_device_id(rt1718s_emul, RT1718S_DEVICE_ID_ES1); + zassert_ok(rt1718s_tcpm_drv.init(tcpm_rt1718s_port), + "Cannot initialize rt1718s"); + test_bc12_reg_init_settings(rt1718s_emul); + test_common_reg_init_settings(rt1718s_emul); + + compare_reg_val_with_mask(rt1718s_emul, RT1718S_VCONN_CONTROL_3, 0xFF, + RT1718S_VCONN_CONTROL_3_VCONN_OVP_DEG); +} + +ZTEST(rt1718s_tcpc, test_init_with_device_id_es2) +{ + rt1718s_emul_set_device_id(rt1718s_emul, RT1718S_DEVICE_ID_ES2); + zassert_ok(rt1718s_tcpm_drv.init(tcpm_rt1718s_port), + "Cannot initialize rt1718s"); + test_bc12_reg_init_settings(rt1718s_emul); + test_common_reg_init_settings(rt1718s_emul); + + compare_reg_val_with_mask(rt1718s_emul, TCPC_REG_FAULT_CTRL, 0xFF, + TCPC_REG_FAULT_CTRL_VCONN_OCP_FAULT_DIS); + compare_reg_val_with_mask(rt1718s_emul, RT1718S_VCON_CTRL4, 0, + RT1718S_VCON_CTRL4_UVP_CP_EN | + RT1718S_VCON_CTRL4_OCP_CP_EN); + compare_reg_val_with_mask(rt1718s_emul, RT1718S_VCONN_CONTROL_2, 0xFF, + RT1718S_VCONN_CONTROL_2_OVP_EN_CC1 | + RT1718S_VCONN_CONTROL_2_OVP_EN_CC2); +} + +ZTEST(rt1718s_tcpc, test_set_vconn_enable) +{ + struct _snode *iter_node = NULL; + struct set_reg_entry_t *iter_entry = NULL; + struct set_reg_entry_t *set_vconn_limit_on_entry = NULL; + struct set_reg_entry_t *set_vconn_limit_off_entry = NULL; + struct rt1718s_emul_data *rt1718s_data = rt1718s_emul->data; + struct _slist *set_private_reg_history = + &rt1718s_data->set_private_reg_history; + + zassert_ok(rt1718s_tcpm_drv.set_vconn(tcpm_rt1718s_port, true)); + + iter_node = sys_slist_peek_head(set_private_reg_history); + while (iter_node != NULL) { + iter_entry = SYS_SLIST_CONTAINER(iter_node, iter_entry, node); + if (iter_entry->reg == RT1718S_VCON_CTRL3 && + (iter_entry->val & RT1718S_VCON_LIMIT_MODE) == 1) { + set_vconn_limit_on_entry = iter_entry; + break; + } + iter_node = iter_node->next; + } + /* b/233698718#comment9 workaround should applied */ + zassert_not_null(set_vconn_limit_on_entry, + "No entry for setting RT1718S_VCON_CTRL3"); + while (iter_node != NULL) { + iter_entry = SYS_SLIST_CONTAINER(iter_node, iter_entry, node); + if (iter_entry->reg == RT1718S_VCON_CTRL3 && + (iter_entry->val & RT1718S_VCON_LIMIT_MODE) == 0) { + set_vconn_limit_off_entry = iter_entry; + break; + } + iter_node = iter_node->next; + } + zassert_not_null(set_vconn_limit_off_entry, + "No entry for setting RT1718S_VCON_CTRL3"); + zassert_true( + (set_vconn_limit_off_entry->access_time - + set_vconn_limit_on_entry->access_time) >= 10, + "Workaround for two setting Vconn limit is smaller than 10ms"); + + /* rt1718s should be in shutdown mode. */ + compare_reg_val_with_mask(rt1718s_emul, RT1718S_VCON_CTRL3, 0x0, + RT1718S_VCON_LIMIT_MODE); + /* Vconn RVP should be enabled. */ + compare_reg_val_with_mask(rt1718s_emul, RT1718S_VCONN_CONTROL_2, 0xFF, + RT1718S_VCONN_CONTROL_2_RVP_EN); +} + +ZTEST(rt1718s_tcpc, test_set_vconn_disable) +{ + zassert_ok(rt1718s_tcpm_drv.set_vconn(tcpm_rt1718s_port, false)); + /* Vconn RVP should be disabled. */ + compare_reg_val_with_mask(rt1718s_emul, RT1718S_VCONN_CONTROL_2, 0, + RT1718S_VCONN_CONTROL_2_RVP_EN); +} + +ZTEST(rt1718s_tcpc, test_enter_low_power_mode) +{ + zassert_ok(rt1718s_tcpm_drv.enter_low_power_mode(tcpm_rt1718s_port)); + compare_reg_val_with_mask( + rt1718s_emul, RT1718S_SYS_CTRL2, RT1718S_SYS_CTRL2_LPWR_EN, + RT1718S_SYS_CTRL2_LPWR_EN | RT1718S_SYS_CTRL2_BMCIO_OSC_EN); + compare_reg_val_with_mask(rt1718s_emul, RT1718S_RT2_SBU_CTRL_01, 0, + 0xFF); +} + +ZTEST(rt1718s_tcpc, test_set_sbu) +{ + uint8_t mask = RT1718S_RT2_SBU_CTRL_01_SBU_VIEN | + RT1718S_RT2_SBU_CTRL_01_SBU1_SWEN | + RT1718S_RT2_SBU_CTRL_01_SBU2_SWEN; + + zassert_ok(rt1718s_tcpm_drv.set_sbu(tcpm_rt1718s_port, true)); + compare_reg_val_with_mask(rt1718s_emul, RT1718S_RT2_SBU_CTRL_01, 0xFF, + mask); + + zassert_ok(rt1718s_tcpm_drv.set_sbu(tcpm_rt1718s_port, false)); + compare_reg_val_with_mask(rt1718s_emul, RT1718S_RT2_SBU_CTRL_01, 0, + mask); +} + +ZTEST(rt1718s_tcpc, test_set_frs) +{ + zassert_ok(rt1718s_tcpm_drv.set_frs_enable(tcpm_rt1718s_port, true)); + compare_reg_val_with_mask(rt1718s_emul, RT1718S_FRS_CTRL2, + RT1718S_FRS_CTRL2_RX_FRS_EN | + RT1718S_FRS_CTRL2_VBUS_FRS_EN | 0x10, + 0xFF); + compare_reg_val_with_mask( + rt1718s_emul, RT1718S_VBUS_CTRL_EN, + RT1718S_VBUS_CTRL_EN_GPIO2_VBUS_PATH_EN | + RT1718S_VBUS_CTRL_EN_GPIO1_VBUS_PATH_EN | 0x3F, + 0xFF); + + zassert_ok(rt1718s_tcpm_drv.set_frs_enable(tcpm_rt1718s_port, false)); + compare_reg_val_with_mask(rt1718s_emul, RT1718S_FRS_CTRL2, 0x10, 0xFF); + compare_reg_val_with_mask(rt1718s_emul, RT1718S_VBUS_CTRL_EN, 0x3F, + 0xFF); +} diff --git a/zephyr/test/drivers/rt9490/src/charger.c b/zephyr/test/drivers/rt9490/src/charger.c index 2d892f9432..4c08065e09 100644 --- a/zephyr/test/drivers/rt9490/src/charger.c +++ b/zephyr/test/drivers/rt9490/src/charger.c @@ -14,7 +14,7 @@ static const struct emul *emul = EMUL_DT_GET(DT_NODELABEL(rt9490)); static const int chgnum = CHARGER_SOLO; -ZTEST(rt9490_chg, current) +ZTEST(rt9490_chg, test_current) { struct { int reg; @@ -51,7 +51,7 @@ ZTEST(rt9490_chg, current) zassert_not_equal(rt9490_drv.set_current(chgnum, 5001), 0, NULL); } -ZTEST(rt9490_chg, voltage) +ZTEST(rt9490_chg, test_voltage) { struct { int reg; @@ -89,7 +89,7 @@ ZTEST(rt9490_chg, voltage) zassert_not_equal(rt9490_drv.set_voltage(chgnum, 18801), 0, NULL); } -ZTEST(rt9490_chg, otg) +ZTEST(rt9490_chg, test_otg) { struct { int reg_v, reg_c, expected_v, expected_c; @@ -134,7 +134,7 @@ ZTEST(rt9490_chg, otg) zassert_equal(rt9490_drv.is_sourcing_otg_power(chgnum, 0), false, NULL); } -ZTEST(rt9490_chg, aicr) +ZTEST(rt9490_chg, test_aicr) { struct { int reg; @@ -206,7 +206,7 @@ ZTEST(rt9490_chg, test_option) zassert_true(opt == 0, NULL); } -ZTEST(rt9490_chg, misc_info) +ZTEST(rt9490_chg, test_misc_info) { int status; int device_id; diff --git a/zephyr/test/drivers/testcase.yaml b/zephyr/test/drivers/testcase.yaml index 054e76131b..d4c6fc7e75 100644 --- a/zephyr/test/drivers/testcase.yaml +++ b/zephyr/test/drivers/testcase.yaml @@ -3,372 +3,462 @@ common: tests: drivers.default: timeout: 360 - extra_args: CONF_FILE="prj.conf;default/prj.conf" - DTC_OVERLAY_FILE="default/boards/native_posix.overlay" - extra_configs: - - CONFIG_LINK_TEST_SUITE_DEFAULT=y - - CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK=y - - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y - - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y - - CONFIG_PLATFORM_EC_USB_PD_DPS=y - - CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y - - CONFIG_PLATFORM_EC_CONSOLE_CMD_TCPC_DUMP=y + extra_configs: + - CONFIG_LINK_TEST_SUITE_DEFAULT=y + - CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK=y + - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y + - CONFIG_PLATFORM_EC_USB_PD_DPS=y + - CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y + - CONFIG_PLATFORM_EC_CONSOLE_CMD_TCPC_DUMP=y + extra_conf_files: + - prj.conf + - default/prj.conf + extra_dtc_overlay_files: + - default/boards/native_posix.overlay drivers.default.bring_up: timeout: 360 - extra_args: CONF_FILE="prj.conf;default/prj.conf" - DTC_OVERLAY_FILE="default/boards/native_posix.overlay" - extra_configs: - - CONFIG_LINK_TEST_SUITE_DEFAULT=y - - CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK=y - - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y - - CONFIG_PLATFORM_EC_BRINGUP=y - - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y - - CONFIG_PLATFORM_EC_USB_PD_DPS=y - - CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y + extra_configs: + - CONFIG_LINK_TEST_SUITE_DEFAULT=y + - CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK=y + - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + - CONFIG_PLATFORM_EC_BRINGUP=y + - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y + - CONFIG_PLATFORM_EC_USB_PD_DPS=y + - CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y + extra_conf_files: + - prj.conf + - default/prj.conf + extra_dtc_overlay_files: + - default/boards/native_posix.overlay drivers.default.console_cmds: timeout: 360 - extra_args: CONF_FILE="prj.conf;default/prj.conf" - DTC_OVERLAY_FILE="default/boards/native_posix.overlay" extra_configs: - - CONFIG_LINK_TEST_SUITE_DEFAULT_CONSOLE_CMDS=y - - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + - CONFIG_LINK_TEST_SUITE_DEFAULT_CONSOLE_CMDS=y + - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + extra_conf_files: + - prj.conf + - default/prj.conf + extra_dtc_overlay_files: + - default/boards/native_posix.overlay drivers.default.console_cmds.gpio_keys: timeout: 360 - extra_args: CONF_FILE="prj.conf;default/prj.conf" - DTC_OVERLAY_FILE="default/boards/native_posix.overlay;default/boards/power_button.dtsi" extra_configs: - - CONFIG_LINK_TEST_SUITE_DEFAULT_CONSOLE_CMDS=y - - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y - - CONFIG_PLATFORM_EC_POWER_BUTTON=n + - CONFIG_LINK_TEST_SUITE_DEFAULT_CONSOLE_CMDS=y + - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + - CONFIG_PLATFORM_EC_POWER_BUTTON=n + extra_conf_files: + - prj.conf + - default/prj.conf + extra_dtc_overlay_files: + - default/boards/native_posix.overlay + - default/boards/power_button.dtsi drivers.default.mock_power: timeout: 360 - extra_args: CONF_FILE="prj.conf;default/prj.conf" - DTC_OVERLAY_FILE="default/boards/native_posix.overlay" - extra_configs: - - CONFIG_LINK_TEST_SUITE_DEFAULT=y - - CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK=y - - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y - - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y - - CONFIG_POWER_SEQUENCE_MOCK=y - - CONFIG_PLATFORM_EC_USB_PD_DPS=y - - CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y + extra_configs: + - CONFIG_LINK_TEST_SUITE_DEFAULT=y + - CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK=y + - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y + - CONFIG_POWER_SEQUENCE_MOCK=y + - CONFIG_PLATFORM_EC_USB_PD_DPS=y + - CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y + extra_conf_files: + - prj.conf + - default/prj.conf + extra_dtc_overlay_files: + - default/boards/native_posix.overlay drivers.amd_fp6_usb_mux: extra_dtc_overlay_files: - - ./boards/native_posix.overlay - - ./amd_fp6_usb_mux/usbc.dts + - ./boards/native_posix.overlay + - ./amd_fp6_usb_mux/usbc.dts extra_configs: - - CONFIG_LINK_TEST_SUITE_AMD_FP6_USB_MUX=y + - CONFIG_LINK_TEST_SUITE_AMD_FP6_USB_MUX=y drivers.anx7447: - extra_args: CONF_FILE="prj.conf;anx7447/prj.conf" - DTC_OVERLAY_FILE="./boards/native_posix.overlay;./anx7447/tcpc_policy.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_ANX7447=y + - CONFIG_LINK_TEST_SUITE_ANX7447=y + extra_conf_files: + - prj.conf + - anx7447/prj.conf + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./anx7447/tcpc_policy.dts drivers.ap_mux_control: - extra_args: CONF_FILE="prj.conf;ap_mux_control/prj.conf" extra_configs: - - CONFIG_LINK_TEST_SUITE_AP_MUX_CONTROL=y + - CONFIG_LINK_TEST_SUITE_AP_MUX_CONTROL=y + extra_conf_files: + - prj.conf + - ap_mux_control/prj.conf drivers.ap_vdm_control: - extra_args: CONF_FILE="prj.conf;ap_vdm_control/prj.conf" extra_configs: - - CONFIG_LINK_TEST_SUITE_AP_VDM_CONTROL=y + - CONFIG_LINK_TEST_SUITE_AP_VDM_CONTROL=y + extra_conf_files: + - prj.conf + - ap_vdm_control/prj.conf drivers.ap_vdm_control_disabled: - extra_args: CONF_FILE="prj.conf;ap_vdm_control/prj.conf" extra_configs: - - CONFIG_PLATFORM_EC_USB_PD_VDM_AP_CONTROL=n - - CONFIG_LINK_TEST_SUITE_AP_VDM_CONTROL=y + - CONFIG_PLATFORM_EC_USB_PD_VDM_AP_CONTROL=n + - CONFIG_LINK_TEST_SUITE_AP_VDM_CONTROL=y + extra_conf_files: + - prj.conf + - ap_vdm_control/prj.conf drivers.button: timeout: 360 extra_configs: - - CONFIG_LINK_TEST_SUITE_BUTTON=y - - CONFIG_PLATFORM_EC_CMD_BUTTON=y - - CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y - - CONFIG_PLATFORM_EC_EMULATED_SYSRQ=y + - CONFIG_LINK_TEST_SUITE_BUTTON=y + - CONFIG_PLATFORM_EC_CMD_BUTTON=y + - CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y + - CONFIG_PLATFORM_EC_EMULATED_SYSRQ=y drivers.cbi_flash: - extra_args: DTC_OVERLAY_FILE="./boards/native_posix.overlay;./cbi_flash/binman.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_CBI_FLASH=y - - CONFIG_PLATFORM_EC_CBI_FLASH=y - - CONFIG_PLATFORM_EC_FLASH_SIZE_BYTES=0x80000 + - CONFIG_LINK_TEST_SUITE_CBI_FLASH=y + - CONFIG_PLATFORM_EC_CBI_FLASH=y + - CONFIG_PLATFORM_EC_FLASH_SIZE_BYTES=0x80000 + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./cbi_flash/binman.dts drivers.common_cbi: extra_configs: - - CONFIG_LINK_TEST_SUITE_COMMON_CBI=y - - CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y + - CONFIG_LINK_TEST_SUITE_COMMON_CBI=y + - CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y drivers.common_cbi_gpio: extra_configs: - - CONFIG_LINK_TEST_SUITE_COMMON_CBI_GPIO=y - - CONFIG_PLATFORM_EC_CBI_GPIO=y + - CONFIG_LINK_TEST_SUITE_COMMON_CBI_GPIO=y + - CONFIG_PLATFORM_EC_CBI_GPIO=y drivers.common_charger: extra_configs: - - CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT_DERATE_PCT=5 - - CONFIG_PLATFORM_EC_CHARGER_MIN_INPUT_CURRENT_LIMIT=100 - - CONFIG_LINK_TEST_SUITE_COMMON_CHARGER=y - # Set to focus testing for Herobrine - # Config is y only in nissa - - CONFIG_PLATFORM_EC_CHARGER_RAA489000=n - - CONFIG_PLATFORM_EC_CHARGER_RUNTIME_CONFIG=y + - CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT_DERATE_PCT=5 + - CONFIG_PLATFORM_EC_CHARGER_MIN_INPUT_CURRENT_LIMIT=100 + - CONFIG_LINK_TEST_SUITE_COMMON_CHARGER=y + # Set to focus testing for Herobrine + # Config is y only in nissa + - CONFIG_PLATFORM_EC_CHARGER_RAA489000=n + - CONFIG_PLATFORM_EC_CHARGER_RUNTIME_CONFIG=y drivers.chargesplash: timeout: 360 extra_configs: - - CONFIG_LINK_TEST_SUITE_CHARGESPLASH=y + - CONFIG_LINK_TEST_SUITE_CHARGESPLASH=y drivers.chargesplash.mock_power: timeout: 360 extra_configs: - - CONFIG_LINK_TEST_SUITE_CHARGESPLASH=y - - CONFIG_POWER_SEQUENCE_MOCK=y + - CONFIG_LINK_TEST_SUITE_CHARGESPLASH=y + - CONFIG_POWER_SEQUENCE_MOCK=y drivers.console: extra_configs: - - CONFIG_LINK_TEST_SUITE_CONSOLE=y + - CONFIG_LINK_TEST_SUITE_CONSOLE=y drivers.console_cmd_crash: - extra_args: CONF_FILE="prj.conf;default/prj.conf" - DTC_OVERLAY_FILE="default/boards/native_posix.overlay" extra_configs: - - CONFIG_LINK_TEST_SUITE_CONSOLE_CMD_CRASH=y - - CONFIG_PLATFORM_EC_CONSOLE_CMD_CRASH=y - - CONFIG_ASSERT_TEST=y + - CONFIG_LINK_TEST_SUITE_CONSOLE_CMD_CRASH=y + - CONFIG_PLATFORM_EC_CONSOLE_CMD_CRASH=y + - CONFIG_ASSERT_TEST=y + extra_conf_files: + - prj.conf + - default/prj.conf + extra_dtc_overlay_files: + - default/boards/native_posix.overlay drivers.console_cmd_mfallow: - extra_args: CONF_FILE="prj.conf;console_cmd_mfallow/prj.conf" extra_configs: - - CONFIG_LINK_TEST_SUITE_CONSOLE_CMD_MFALLOW=y + - CONFIG_LINK_TEST_SUITE_CONSOLE_CMD_MFALLOW=y + extra_conf_files: + - prj.conf + - console_cmd_mfallow/prj.conf drivers.dps: - extra_args: CONF_FILE="prj.conf;dps/prj.conf" extra_configs: - - CONFIG_LINK_TEST_SUITE_USB_PD_DPS=y + - CONFIG_LINK_TEST_SUITE_USB_PD_DPS=y + extra_conf_files: + - prj.conf + - dps/prj.conf drivers.flash: extra_configs: - - CONFIG_LINK_TEST_SUITE_FLASH=y - - CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y + - CONFIG_LINK_TEST_SUITE_FLASH=y + - CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y drivers.flash.page_layout: extra_configs: - - CONFIG_LINK_TEST_SUITE_FLASH=y - - CONFIG_SHELL_BACKEND_DUMMY_BUF_SIZE=500 - - CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y - - CONFIG_PLATFORM_EC_USE_ZEPHYR_FLASH_PAGE_LAYOUT=y + - CONFIG_LINK_TEST_SUITE_FLASH=y + - CONFIG_SHELL_BACKEND_DUMMY_BUF_SIZE=500 + - CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y + - CONFIG_PLATFORM_EC_USE_ZEPHYR_FLASH_PAGE_LAYOUT=y drivers.gpio_unhook: extra_configs: - - CONFIG_LINK_TEST_SUITE_GPIO_UNHOOK=y - - CONFIG_GPIO_GET_CONFIG=y + - CONFIG_LINK_TEST_SUITE_GPIO_UNHOOK=y + - CONFIG_GPIO_GET_CONFIG=y drivers.host_cmd: extra_configs: - - CONFIG_LINK_TEST_SUITE_HOST_COMMANDS=y - - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y - - CONFIG_PLATFORM_EC_USB_PD_LOGGING=y - - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y - - CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y + - CONFIG_LINK_TEST_SUITE_HOST_COMMANDS=y + - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + - CONFIG_PLATFORM_EC_USB_PD_LOGGING=y + - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y + - CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y drivers.host_cmd_read_memmap: extra_configs: - - CONFIG_LINK_TEST_SUITE_HOST_COMMAND_READ_MEMMAP=y - - CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y - - CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI=n - - CONFIG_PLATFORM_EC_HOST_INTERFACE_SHI=y + - CONFIG_LINK_TEST_SUITE_HOST_COMMAND_READ_MEMMAP=y + - CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y + - CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI=n + - CONFIG_PLATFORM_EC_HOST_INTERFACE_SHI=y drivers.host_cmd_read_memmap.no_switches: extra_configs: - - CONFIG_LINK_TEST_SUITE_HOST_COMMAND_READ_MEMMAP=y - - CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y - - CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI=n - - CONFIG_PLATFORM_EC_HOST_INTERFACE_SHI=y - - CONFIG_PLATFORM_EC_SWITCH=n + - CONFIG_LINK_TEST_SUITE_HOST_COMMAND_READ_MEMMAP=y + - CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y + - CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI=n + - CONFIG_PLATFORM_EC_HOST_INTERFACE_SHI=y + - CONFIG_PLATFORM_EC_SWITCH=n drivers.isl923x: extra_configs: - - CONFIG_LINK_TEST_SUITE_ISL923X=y + - CONFIG_LINK_TEST_SUITE_ISL923X=y drivers.isl923x.mock_power: extra_configs: - - CONFIG_LINK_TEST_SUITE_ISL923X=y - - CONFIG_POWER_SEQUENCE_MOCK=y + - CONFIG_LINK_TEST_SUITE_ISL923X=y + - CONFIG_POWER_SEQUENCE_MOCK=y + drivers.isl9241: + extra_configs: + - CONFIG_LINK_TEST_SUITE_ISL9241=y + - CONFIG_PLATFORM_EC_CHARGER_DUMP_PROCHOT=y + - CONFIG_PLATFORM_EC_CHARGER_ISL9241=y + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./isl9241/usbc.dts drivers.i2c_controller: - extra_args: DTC_OVERLAY_FILE="./boards/native_posix.overlay;i2c_controller/i2c.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_I2C_CONTROLLER=y + - CONFIG_LINK_TEST_SUITE_I2C_CONTROLLER=y + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - i2c_controller/i2c.dts drivers.it8xxx2_hw_sha256: extra_configs: - - CONFIG_LINK_TEST_SUITE_IT8XXX2_HW_SHA256=y - - CONFIG_PLATFORM_EC_SHA256_HW_ACCELERATE=y + - CONFIG_LINK_TEST_SUITE_IT8XXX2_HW_SHA256=y + - CONFIG_PLATFORM_EC_SHA256_HW_ACCELERATE=y drivers.keyboard_scan: extra_configs: - - CONFIG_LINK_TEST_SUITE_KEYBOARD_SCAN=y + - CONFIG_LINK_TEST_SUITE_KEYBOARD_SCAN=y drivers.led_driver: - extra_args: CONF_FILE="prj.conf;led_driver/prj.conf" - DTC_OVERLAY_FILE="./boards/native_posix.overlay;./led_driver/led_pins.dts;./led_driver/led_policy.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_LED_DRIVER=y + - CONFIG_LINK_TEST_SUITE_LED_DRIVER=y + extra_conf_files: + - prj.conf + - led_driver/prj.conf + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./led_driver/led_pins.dts + - ./led_driver/led_policy.dts drivers.led_common: extra_configs: - - CONFIG_LINK_TEST_SUITE_LED_COMMON=y - - CONFIG_PLATFORM_EC_LED_DT=n + - CONFIG_LINK_TEST_SUITE_LED_COMMON=y + - CONFIG_PLATFORM_EC_LED_DT=n drivers.locate_chip: extra_configs: - - CONFIG_LINK_TEST_SUITE_LOCATE_CHIP_ALTS=y - - CONFIG_PLATFORM_EC_CBI=n + - CONFIG_LINK_TEST_SUITE_LOCATE_CHIP_ALTS=y + - CONFIG_PLATFORM_EC_CBI=n drivers.mkbp: extra_configs: - - CONFIG_LINK_TEST_SUITE_MKBP=y - - CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_MKBP=y - - CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y - - CONFIG_PLATFORM_EC_MKBP_EVENT=y - - CONFIG_PLATFORM_EC_MKBP_USE_GPIO=y - - CONFIG_PLATFORM_EC_KEYBOARD_KEYPAD=y - tags: - common - mkbp + - CONFIG_LINK_TEST_SUITE_MKBP=y + - CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_MKBP=y + - CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y + - CONFIG_PLATFORM_EC_MKBP_EVENT=y + - CONFIG_PLATFORM_EC_MKBP_USE_GPIO=y + - CONFIG_PLATFORM_EC_KEYBOARD_KEYPAD=y + tags: common mkbp + drivers.nx20p3481: + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./nx20p348x/usbc.dts + extra_configs: + - CONFIG_LINK_TEST_SUITE_NX20P348X=y + - CONFIG_PLATFORM_EC_USBC_PPC_NX20P3481=y + - CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483=n + drivers.nx20p3483: + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./nx20p348x/usbc.dts + extra_configs: + - CONFIG_LINK_TEST_SUITE_NX20P348X=y + - CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483=y drivers.panic_output: extra_configs: - - CONFIG_LINK_TEST_SUITE_PANIC_OUTPUT=y - - CONFIG_PLATFORM_EC_CONSOLE_CMD_CRASH=y - - CONFIG_ZTEST_THREAD_PRIORITY=1 + - CONFIG_LINK_TEST_SUITE_PANIC_OUTPUT=y + - CONFIG_PLATFORM_EC_CONSOLE_CMD_CRASH=y + - CONFIG_ZTEST_THREAD_PRIORITY=1 drivers.power_host_sleep: extra_configs: - - CONFIG_LINK_TEST_SUITE_POWER_HOST_SLEEP=y - # Make tests independent of chipset specific code - - CONFIG_AP_ARM_QUALCOMM_SC7280=n - - CONFIG_PLATFORM_EC_POWERSEQ_SC7280=n - - - CONFIG_POWER_SEQUENCE_MOCK=y - - CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y + - CONFIG_LINK_TEST_SUITE_POWER_HOST_SLEEP=y + # Make tests independent of chipset specific code + - CONFIG_AP_ARM_QUALCOMM_SC7280=n + - CONFIG_PLATFORM_EC_POWERSEQ_SC7280=n + - CONFIG_POWER_SEQUENCE_MOCK=y + - CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y drivers.ps8xxx: - extra_args: > - CONF_FILE="prj.conf;ps8xxx/prj.conf" - DTC_OVERLAY_FILE="./boards/native_posix.overlay;./ps8xxx/usbc.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_PS8XXX=y + - CONFIG_LINK_TEST_SUITE_PS8XXX=y + extra_conf_files: + - prj.conf + - ps8xxx/prj.conf + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./ps8xxx/usbc.dts" + drivers.rt1718s: + extra_configs: + - CONFIG_LINK_TEST_SUITE_RT1718S=y + extra_conf_files: + - prj.conf + - rt1718s/prj.conf + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./rt1718s/ppc_tcpc.dts drivers.rt9490: - extra_args: CONF_FILE="prj.conf;rt9490/prj.conf" - DTC_OVERLAY_FILE="./boards/native_posix.overlay;./rt9490/charger.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_RT9490=y + - CONFIG_LINK_TEST_SUITE_RT9490=y + extra_conf_files: + - prj.conf + - rt9490/prj.conf + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./rt9490/charger.dts drivers.shim_gpio_id: - extra_args: CONF_FILE="prj.conf" - DTC_OVERLAY_FILE="boards/native_posix.overlay;shim_gpio_id/gpio_id.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_SHIM_GPIO_ID=y + - CONFIG_LINK_TEST_SUITE_SHIM_GPIO_ID=y + extra_conf_files: + - prj.conf + extra_dtc_overlay_files: + - boards/native_posix.overlay + - shim_gpio_id/gpio_id.dts drivers.shim_pwm_hc: extra_configs: - - CONFIG_LINK_TEST_SUITE_SHIM_PWM_HC=y + - CONFIG_LINK_TEST_SUITE_SHIM_PWM_HC=y drivers.shim_rtc: extra_configs: - - CONFIG_LINK_TEST_SUITE_SHIM_RTC=y - - CONFIG_PLATFORM_EC_RTC=y - - CONFIG_PLATFORM_EC_HOSTCMD=y - - CONFIG_PLATFORM_EC_HOSTCMD_RTC=y + - CONFIG_LINK_TEST_SUITE_SHIM_RTC=y + - CONFIG_PLATFORM_EC_RTC=y + - CONFIG_PLATFORM_EC_HOSTCMD=y + - CONFIG_PLATFORM_EC_HOSTCMD_RTC=y drivers.system: - tags: - common - system + tags: common system extra_configs: - - CONFIG_LINK_TEST_SUITE_SYSTEM=y - - CONFIG_POWER_SEQUENCE_MOCK=y + - CONFIG_LINK_TEST_SUITE_SYSTEM=y + - CONFIG_POWER_SEQUENCE_MOCK=y drivers.system_board_version_cbi: - tags: - common - system + tags: common system extra_configs: - - CONFIG_LINK_TEST_SUITE_SYSTEM=y - - CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y - - CONFIG_POWER_SEQUENCE_MOCK=y + - CONFIG_LINK_TEST_SUITE_SYSTEM=y + - CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y + - CONFIG_POWER_SEQUENCE_MOCK=y drivers.timer: extra_configs: - - CONFIG_LINK_TEST_SUITE_TIMER=y + - CONFIG_LINK_TEST_SUITE_TIMER=y drivers.usb_common: extra_configs: - - CONFIG_LINK_TEST_SUITE_USB_COMMON=y + - CONFIG_LINK_TEST_SUITE_USB_COMMON=y drivers.usb_port_power_dumb: - extra_args: DTC_OVERLAY_FILE="./boards/native_posix.overlay;./usb_port_power_dumb/usba.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_USB_PORT_POWER_DUMB=y - - CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB=y + - CONFIG_LINK_TEST_SUITE_USB_PORT_POWER_DUMB=y + - CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB=y + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./usb_port_power_dumb/usba.dts drivers.usb_pd_discharge: extra_configs: - - CONFIG_LINK_TEST_SUITE_USB_COMMON=y - - CONFIG_PLATFORM_EC_USB_PD_DISCHARGE=y - - CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y - - CONFIG_PLATFORM_EC_USB_PD_FLAGS=y + - CONFIG_LINK_TEST_SUITE_USB_COMMON=y + - CONFIG_PLATFORM_EC_USB_PD_DISCHARGE=y + - CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y + - CONFIG_PLATFORM_EC_USB_PD_FLAGS=y drivers.usb_pd_discovery: extra_configs: - - CONFIG_LINK_TEST_SUITE_USB_PD_DISCOVERY=y + - CONFIG_LINK_TEST_SUITE_USB_PD_DISCOVERY=y drivers.usb_pd_flags: extra_configs: - - CONFIG_LINK_TEST_SUITE_USB_COMMON=y - - CONFIG_PLATFORM_EC_USB_PD_FLAGS=y - - CONFIG_PLATFORM_EC_USB_PD_RUNTIME_FLAGS=y + - CONFIG_LINK_TEST_SUITE_USB_COMMON=y + - CONFIG_PLATFORM_EC_USB_PD_FLAGS=y + - CONFIG_PLATFORM_EC_USB_PD_RUNTIME_FLAGS=y drivers.usb_retimer_fw_update: timeout: 120 - extra_args: CONF_FILE="prj.conf;usb_retimer_fw_update/prj.conf" extra_configs: - - CONFIG_LINK_TEST_SUITE_USB_RETIMER_FW_UPDATE=y + - CONFIG_LINK_TEST_SUITE_USB_RETIMER_FW_UPDATE=y + extra_conf_files: + - prj.conf + - usb_retimer_fw_update/prj.conf drivers.usbc_alt_mode: - extra_args: CONF_FILE="prj.conf;usbc_alt_mode/prj.conf" extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_ALT_MODE=y + - CONFIG_LINK_TEST_SUITE_USBC_ALT_MODE=y timeout: 120 + extra_conf_files: + - prj.conf + - usbc_alt_mode/prj.conf drivers.usbc_alt_mode_ec_entry: - extra_args: CONF_FILE="prj.conf;usbc_alt_mode/prj.conf" timeout: 120 extra_configs: - - CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY=n - - CONFIG_LINK_TEST_SUITE_USBC_ALT_MODE=y - - CONFIG_POWER_SEQUENCE_MOCK=y + - CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY=n + - CONFIG_LINK_TEST_SUITE_USBC_ALT_MODE=y + - CONFIG_POWER_SEQUENCE_MOCK=y + extra_conf_files: + - prj.conf + - usbc_alt_mode/prj.conf drivers.usbc_console_pd: extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_CONSOLE_PD=y + - CONFIG_LINK_TEST_SUITE_USBC_CONSOLE_PD=y drivers.usbc_console_pd_legacy: - extra_args: > - DTC_OVERLAY_FILE="default/boards/native_posix.overlay;./usbc_console_pd/usbc_legacy.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_CONSOLE_PD=y - - CONFIG_PLATFORM_EC_TCPC_INTERRUPT=n + - CONFIG_LINK_TEST_SUITE_USBC_CONSOLE_PD=y + - CONFIG_PLATFORM_EC_TCPC_INTERRUPT=n + extra_dtc_overlay_files: + - default/boards/native_posix.overlay + - ./usbc_console_pd/usbc_legacy.dts drivers.usbc_ctvpd: extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_CTVPD=y + - CONFIG_LINK_TEST_SUITE_USBC_CTVPD=y drivers.usbc_frs: extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_FRS=y - - CONFIG_PLATFORM_EC_USB_PD_FRS_TCPC=y + - CONFIG_LINK_TEST_SUITE_USBC_FRS=y + - CONFIG_PLATFORM_EC_USB_PD_FRS_TCPC=y drivers.usbc_ocp: extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_OCP=y + - CONFIG_LINK_TEST_SUITE_USBC_OCP=y drivers.usbc_ppc: - extra_args: > - DTC_OVERLAY_FILE="default/boards/native_posix.overlay;./usbc_ppc/ppc_alts.dts" extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_PPC=y - - CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n + - CONFIG_LINK_TEST_SUITE_USBC_PPC=y + - CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n + extra_dtc_overlay_files: + - default/boards/native_posix.overlay + - ./usbc_ppc/ppc_alts.dts drivers.usbc_tcpc: extra_dtc_overlay_files: - - default/boards/native_posix.overlay - - usbc_tcpc/tcpc_alts.dts + - default/boards/native_posix.overlay + - usbc_tcpc/tcpc_alts.dts extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_TCPC=y + - CONFIG_LINK_TEST_SUITE_USBC_TCPC=y drivers.usbc_retimer.anx7483: extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_RETIMER_ANX7483=y + - CONFIG_LINK_TEST_SUITE_USBC_RETIMER_ANX7483=y drivers.usbc_retimer.ps8811: extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_RETIMER_PS8811=y + - CONFIG_LINK_TEST_SUITE_USBC_RETIMER_PS8811=y drivers.usbc_svdm_dfp_only: - extra_args: CONF_FILE="prj.conf;usbc_svdm_dfp_only/prj.conf" - DTC_OVERLAY_FILE="usbc_svdm_dfp_only/boards/native_posix.overlay" extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_SVDM_DFP_ONLY=y + - CONFIG_LINK_TEST_SUITE_USBC_SVDM_DFP_ONLY=y + extra_conf_files: + - prj.conf + - usbc_svdm_dfp_only/prj.conf + extra_dtc_overlay_files: + - usbc_svdm_dfp_only/boards/native_posix.overlay drivers.usbc_tbt_mode: extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_TBT_MODE=y + - CONFIG_LINK_TEST_SUITE_USBC_TBT_MODE=y drivers.usbc_usb4_mode: extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_USB4_MODE=y - - CONFIG_PLATFORM_EC_USB_PD_DATA_RESET_MSG=y + - CONFIG_LINK_TEST_SUITE_USBC_USB4_MODE=y + - CONFIG_PLATFORM_EC_USB_PD_DATA_RESET_MSG=y drivers.usbc_vconn_swap: extra_configs: - - CONFIG_LINK_TEST_SUITE_USBC_VCONN_SWAP=y + - CONFIG_LINK_TEST_SUITE_USBC_VCONN_SWAP=y drivers.host_cmd_thread: extra_configs: - - CONFIG_LINK_TEST_SUITE_HOST_CMD_THREAD=y - - CONFIG_TASK_HOSTCMD_THREAD_MAIN=y + - CONFIG_LINK_TEST_SUITE_HOST_CMD_THREAD=y + - CONFIG_TASK_HOSTCMD_THREAD_MAIN=y drivers.pi3usb9201: extra_configs: - - CONFIG_LINK_TEST_SUITE_PI3USB9201=y + - CONFIG_LINK_TEST_SUITE_PI3USB9201=y drivers.memmap: extra_configs: - - CONFIG_LINK_TEST_SUITE_MEMMAP=y + - CONFIG_LINK_TEST_SUITE_MEMMAP=y drivers.host_command_memory_dump: extra_configs: - - CONFIG_LINK_TEST_SUITE_HOST_COMMAND_MEMORY_DUMP=y - - CONFIG_PLATFORM_EC_HOST_COMMAND_MEMORY_DUMP=y - - CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042=y + - CONFIG_LINK_TEST_SUITE_HOST_COMMAND_MEMORY_DUMP=y + - CONFIG_PLATFORM_EC_HOST_COMMAND_MEMORY_DUMP=y + - CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042=y diff --git a/zephyr/test/drivers/timer/src/timer.c b/zephyr/test/drivers/timer/src/timer.c index 5cbdae1ea8..abc5d0a88f 100644 --- a/zephyr/test/drivers/timer/src/timer.c +++ b/zephyr/test/drivers/timer/src/timer.c @@ -25,7 +25,7 @@ FAKE_VALUE_FUNC(int, __hw_clock_source_init64, uint64_t); FAKE_VALUE_FUNC(uint8_t *, system_get_jump_tag, uint16_t, int *, int *); -ZTEST(timer, init_from_jump_tag) +ZTEST(timer, test_init_from_jump_tag) { /* When initializing after a system jump, the timer should get set to * the time before the jump (stored in a jump tag) @@ -42,7 +42,7 @@ ZTEST(timer, init_from_jump_tag) __hw_clock_source_init64_fake.arg0_history[0], NULL); } -ZTEST(timer, init_from_zero) +ZTEST(timer, test_init_from_zero) { /* When there is no jump tag, the timer should initialize to zero. */ @@ -56,7 +56,7 @@ ZTEST(timer, init_from_zero) zassert_equal(0, __hw_clock_source_init64_fake.arg0_history[0], NULL); } -ZTEST(timer, console_cmd_gettime) +ZTEST(timer, test_console_cmd_gettime) { /* Should print the current time */ timestamp_t fake_time; @@ -76,7 +76,7 @@ ZTEST(timer, console_cmd_gettime) "Actual: '%s'", outbuffer); } -ZTEST(timer, console_cmd_timerinfo) +ZTEST(timer, test_console_cmd_timerinfo) { /* Prints current time and info on running timers. */ timestamp_t fake_time; diff --git a/zephyr/test/drivers/usb_pd_discovery/src/usb_pd_discovery.c b/zephyr/test/drivers/usb_pd_discovery/src/usb_pd_discovery.c index 8696fb68f3..fb466d66ab 100644 --- a/zephyr/test/drivers/usb_pd_discovery/src/usb_pd_discovery.c +++ b/zephyr/test/drivers/usb_pd_discovery/src/usb_pd_discovery.c @@ -69,7 +69,7 @@ ZTEST_SUITE(usb_pd_discovery, drivers_predicate_post_main, usb_pd_discovery_after, NULL); /* First up: Plain and correct DP response */ -ZTEST_F(usb_pd_discovery, verify_discovery) +ZTEST_F(usb_pd_discovery, test_verify_discovery) { struct tcpci_partner_data *partner = &fixture->partner; uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; @@ -132,7 +132,7 @@ ZTEST_F(usb_pd_discovery, verify_discovery) } /* Now: Duplicate the DP SID */ -ZTEST_F(usb_pd_discovery, verify_svid_duplicate) +ZTEST_F(usb_pd_discovery, test_verify_svid_duplicate) { struct tcpci_partner_data *partner = &fixture->partner; uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; @@ -188,7 +188,7 @@ ZTEST_F(usb_pd_discovery, verify_svid_duplicate) } /* Forget to 0 terminate the SVIDs */ -ZTEST_F(usb_pd_discovery, verify_bad_termination) +ZTEST_F(usb_pd_discovery, test_verify_bad_termination) { struct tcpci_partner_data *partner = &fixture->partner; uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; @@ -244,7 +244,7 @@ ZTEST_F(usb_pd_discovery, verify_bad_termination) } /* Reply with a NAK to DiscoverModes */ -ZTEST_F(usb_pd_discovery, verify_modes_nak) +ZTEST_F(usb_pd_discovery, test_verify_modes_nak) { struct tcpci_partner_data *partner = &fixture->partner; uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; @@ -294,7 +294,7 @@ ZTEST_F(usb_pd_discovery, verify_modes_nak) } /* Reply with the wrong SVID to DiscoverModes */ -ZTEST_F(usb_pd_discovery, verify_bad_mode) +ZTEST_F(usb_pd_discovery, test_verify_bad_mode) { struct tcpci_partner_data *partner = &fixture->partner; uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; @@ -347,7 +347,7 @@ ZTEST_F(usb_pd_discovery, verify_bad_mode) } /* Reply without required mode VDO */ -ZTEST_F(usb_pd_discovery, verify_modes_missing) +ZTEST_F(usb_pd_discovery, test_verify_modes_missing) { struct tcpci_partner_data *partner = &fixture->partner; uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; diff --git a/zephyr/test/drivers/usb_port_power_dumb/src/usb_port_power_dumb.c b/zephyr/test/drivers/usb_port_power_dumb/src/usb_port_power_dumb.c index e651bb57d8..67bf48453e 100644 --- a/zephyr/test/drivers/usb_port_power_dumb/src/usb_port_power_dumb.c +++ b/zephyr/test/drivers/usb_port_power_dumb/src/usb_port_power_dumb.c @@ -37,7 +37,7 @@ static int check_gpio_status_for_port(int port_id) return gpio_get_level(usb_port_enable[port_id]); } -ZTEST(usb_port_power_dumb, console_command__noargs) +ZTEST(usb_port_power_dumb, test_console_command__noargs) { const char *outbuffer; size_t buffer_size; @@ -54,7 +54,7 @@ ZTEST(usb_port_power_dumb, console_command__noargs) zassert_false(check_gpio_status_for_port(PORT_ID), NULL); } -ZTEST(usb_port_power_dumb, console_command__modify_port_status) +ZTEST(usb_port_power_dumb, test_console_command__modify_port_status) { const char *outbuffer; size_t buffer_size; @@ -73,7 +73,7 @@ ZTEST(usb_port_power_dumb, console_command__modify_port_status) zassert_true(check_gpio_status_for_port(PORT_ID), NULL); } -ZTEST(usb_port_power_dumb, console_command__invalid) +ZTEST(usb_port_power_dumb, test_console_command__invalid) { /* Various bad input */ zassert_ok(!shell_execute_cmd(get_ec_shell(), "usbchargemode NaN"), @@ -88,7 +88,7 @@ ZTEST(usb_port_power_dumb, console_command__invalid) NULL); } -ZTEST(usb_port_power_dumb, host_command__enable) +ZTEST(usb_port_power_dumb, test_host_command__enable) { int ret; struct ec_params_usb_charge_set_mode params = { @@ -102,7 +102,7 @@ ZTEST(usb_port_power_dumb, host_command__enable) zassert_true(check_gpio_status_for_port(PORT_ID), NULL); } -ZTEST(usb_port_power_dumb, host_command__invalid_port_id) +ZTEST(usb_port_power_dumb, test_host_command__invalid_port_id) { int ret; struct ec_params_usb_charge_set_mode params = { @@ -117,7 +117,7 @@ ZTEST(usb_port_power_dumb, host_command__invalid_port_id) zassert_false(check_gpio_status_for_port(PORT_ID), NULL); } -ZTEST(usb_port_power_dumb, host_command__invalid_mode) +ZTEST(usb_port_power_dumb, test_host_command__invalid_mode) { int ret; struct ec_params_usb_charge_set_mode params = { diff --git a/zephyr/test/drivers/usb_retimer_fw_update/src/usb_retimer_fw_update.c b/zephyr/test/drivers/usb_retimer_fw_update/src/usb_retimer_fw_update.c index 21a471f22a..e5f6c23ed6 100644 --- a/zephyr/test/drivers/usb_retimer_fw_update/src/usb_retimer_fw_update.c +++ b/zephyr/test/drivers/usb_retimer_fw_update/src/usb_retimer_fw_update.c @@ -77,7 +77,7 @@ static void usb_retimer_fw_update_after(void *data) ZTEST_SUITE(usb_retimer_fw_update, drivers_predicate_post_main, NULL, usb_retimer_fw_update_before, usb_retimer_fw_update_after, NULL); -ZTEST(usb_retimer_fw_update, verify_query_port) +ZTEST(usb_retimer_fw_update, test_verify_query_port) { /* Write our command to query ports */ acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, @@ -88,7 +88,7 @@ ZTEST(usb_retimer_fw_update, verify_query_port) "Failed to see port in query"); } -ZTEST(usb_retimer_fw_update, verify_suspend_port) +ZTEST(usb_retimer_fw_update, test_verify_suspend_port) { /* Write our command to suspend the port */ acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, @@ -104,7 +104,7 @@ ZTEST(usb_retimer_fw_update, verify_suspend_port) "Failed to see successful suspend"); } -ZTEST(usb_retimer_fw_update, verify_resume_port) +ZTEST(usb_retimer_fw_update, test_verify_resume_port) { usb_retimer_fw_update_suspend_port(); @@ -122,7 +122,7 @@ ZTEST(usb_retimer_fw_update, verify_resume_port) "Failed to see successful resume"); } -ZTEST(usb_retimer_fw_update, verify_get_mux) +ZTEST(usb_retimer_fw_update, test_verify_get_mux) { struct ec_response_typec_status typec_status; @@ -141,7 +141,7 @@ ZTEST(usb_retimer_fw_update, verify_get_mux) } /* Commands which first require suspend to be run */ -ZTEST(usb_retimer_fw_update, verify_set_mux_usb) +ZTEST(usb_retimer_fw_update, test_verify_set_mux_usb) { struct ec_response_typec_status typec_status; @@ -165,7 +165,7 @@ ZTEST(usb_retimer_fw_update, verify_set_mux_usb) USB_PD_MUX_USB_ENABLED, "Status mux disagreement"); } -ZTEST(usb_retimer_fw_update, verify_set_mux_safe) +ZTEST(usb_retimer_fw_update, test_verify_set_mux_safe) { struct ec_response_typec_status typec_status; @@ -189,7 +189,7 @@ ZTEST(usb_retimer_fw_update, verify_set_mux_safe) USB_PD_MUX_SAFE_MODE, "Status mux disagreement"); } -ZTEST(usb_retimer_fw_update, verify_set_mux_tbt) +ZTEST(usb_retimer_fw_update, test_verify_set_mux_tbt) { struct ec_response_typec_status typec_status; @@ -213,7 +213,7 @@ ZTEST(usb_retimer_fw_update, verify_set_mux_tbt) USB_PD_MUX_TBT_COMPAT_ENABLED, "Status mux disagreement"); } -ZTEST(usb_retimer_fw_update, verify_update_disconnect) +ZTEST(usb_retimer_fw_update, test_verify_update_disconnect) { uint64_t command_start; @@ -252,7 +252,7 @@ ZTEST(usb_retimer_fw_update, verify_update_disconnect) } /* Verify we get an error if port isn't suspended */ -ZTEST(usb_retimer_fw_update, verify_mux_usb_error) +ZTEST(usb_retimer_fw_update, test_verify_mux_usb_error) { /* Set the mux to USB on unsuspended port */ acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, diff --git a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c index 9f57db83fa..17959e185a 100644 --- a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c +++ b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c @@ -208,7 +208,7 @@ static void usbc_alt_mode_after(void *data) fixture->charger_emul); } -ZTEST_F(usbc_alt_mode, verify_discovery) +ZTEST_F(usbc_alt_mode, test_verify_discovery) { uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; struct ec_response_typec_discovery *discovery = @@ -239,7 +239,7 @@ ZTEST_F(usbc_alt_mode, verify_discovery) "DP mode VDOs did not match"); } -ZTEST_F(usbc_alt_mode, verify_discovery_params_too_small) +ZTEST_F(usbc_alt_mode, test_verify_discovery_params_too_small) { struct ec_response_typec_discovery discovery; @@ -252,7 +252,7 @@ ZTEST_F(usbc_alt_mode, verify_discovery_params_too_small) zassert_equal(discovery.svid_count, 0); } -ZTEST_F(usbc_alt_mode, verify_displayport_mode_entry) +ZTEST_F(usbc_alt_mode, test_verify_displayport_mode_entry) { const struct gpio_dt_spec *gpio = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_hpd); @@ -303,7 +303,7 @@ ZTEST_F(usbc_alt_mode, verify_displayport_mode_entry) zassert_equal(gpio_emul_output_get(gpio->port, gpio->pin), 1); } -ZTEST_F(usbc_alt_mode, verify_bad_hpd_irq_reject) +ZTEST_F(usbc_alt_mode, test_verify_bad_hpd_irq_reject) { const struct gpio_dt_spec *gpio = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_hpd); @@ -344,7 +344,7 @@ ZTEST_F(usbc_alt_mode, verify_bad_hpd_irq_reject) zassert_equal(gpio_emul_output_get(gpio->port, gpio->pin), 0); } -ZTEST_F(usbc_alt_mode, verify_hpd_clear) +ZTEST_F(usbc_alt_mode, test_verify_hpd_clear) { const struct gpio_dt_spec *gpio = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_hpd); @@ -402,7 +402,7 @@ ZTEST_F(usbc_alt_mode, verify_hpd_clear) zassert_equal(gpio_emul_output_get(gpio->port, gpio->pin), 0); } -ZTEST_F(usbc_alt_mode, verify_hpd_irq_set) +ZTEST_F(usbc_alt_mode, test_verify_hpd_irq_set) { const struct gpio_dt_spec *gpio = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_hpd); @@ -463,7 +463,7 @@ ZTEST_F(usbc_alt_mode, verify_hpd_irq_set) zassert_equal(gpio_emul_output_get(gpio->port, gpio->pin), 1); } -ZTEST_F(usbc_alt_mode, verify_discovery_via_pd_host_cmd) +ZTEST_F(usbc_alt_mode, test_verify_discovery_via_pd_host_cmd) { struct ec_params_usb_pd_info_request params = { .port = TEST_PORT }; struct ec_params_usb_pd_discovery_entry response; @@ -528,7 +528,7 @@ static void usbc_alt_mode_dp_unsupported_after(void *data) * When the partner advertises DP mode support but refuses to enter, discovery * should still work as if the partner were compliant. */ -ZTEST_F(usbc_alt_mode_dp_unsupported, verify_discovery) +ZTEST_F(usbc_alt_mode_dp_unsupported, test_verify_discovery) { if (IS_ENABLED(CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY)) { host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_DP); @@ -568,7 +568,7 @@ ZTEST_F(usbc_alt_mode_dp_unsupported, verify_discovery) * When the partner advertises DP support but refuses to enter DP mode, the TCPM * should try once and then give up. */ -ZTEST_F(usbc_alt_mode_dp_unsupported, verify_displayport_mode_nonentry) +ZTEST_F(usbc_alt_mode_dp_unsupported, test_verify_displayport_mode_nonentry) { if (IS_ENABLED(CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY)) { host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_DP); diff --git a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode__require_ap_mode_entry.c b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode__require_ap_mode_entry.c index 10bc4a7012..6d1286b2e5 100644 --- a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode__require_ap_mode_entry.c +++ b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode__require_ap_mode_entry.c @@ -14,7 +14,7 @@ /* Tests that require CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY enabled */ -ZTEST_F(usbc_alt_mode, verify_displayport_mode_reentry) +ZTEST_F(usbc_alt_mode, test_verify_displayport_mode_reentry) { if (!IS_ENABLED(CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY)) { ztest_test_skip(); @@ -46,7 +46,7 @@ ZTEST_F(usbc_alt_mode, verify_displayport_mode_reentry) USB_PD_MUX_DP_ENABLED, "Failed to see DP mux set"); } -ZTEST_F(usbc_alt_mode, verify_mode_exit_via_pd_host_cmd) +ZTEST_F(usbc_alt_mode, test_verify_mode_exit_via_pd_host_cmd) { const struct gpio_dt_spec *gpio = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_hpd); @@ -95,7 +95,7 @@ ZTEST_F(usbc_alt_mode, verify_mode_exit_via_pd_host_cmd) zassert_equal((status.mux_state & USB_PD_MUX_DP_ENABLED), 0); } -ZTEST_F(usbc_alt_mode, verify_early_status_hpd_set) +ZTEST_F(usbc_alt_mode, test_verify_early_status_hpd_set) { const struct gpio_dt_spec *gpio = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_hpd); diff --git a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode_ec_mode_entry.c b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode_ec_mode_entry.c index e36ba57e26..8344b37ee9 100644 --- a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode_ec_mode_entry.c +++ b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode_ec_mode_entry.c @@ -17,7 +17,7 @@ /* Tests that require CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY disabled */ -ZTEST_F(usbc_alt_mode, verify_displayport_mode_power_cycle) +ZTEST_F(usbc_alt_mode, test_verify_displayport_mode_power_cycle) { struct ec_response_typec_status status; diff --git a/zephyr/test/drivers/usbc_console_pd/src/usbc_console_pd.c b/zephyr/test/drivers/usbc_console_pd/src/usbc_console_pd.c index 37908ce1e4..3e876052f9 100644 --- a/zephyr/test/drivers/usbc_console_pd/src/usbc_console_pd.c +++ b/zephyr/test/drivers/usbc_console_pd/src/usbc_console_pd.c @@ -124,7 +124,7 @@ static void usbc_console_pd_after(void *data) common_after(&outer->common); } -ZTEST_USER_F(usbc_console_pd, pd_command) +ZTEST_USER_F(usbc_console_pd, test_pd_command) { struct common_fixture *common = &fixture->common; struct tcpci_src_emul_data *src_ext = &common->src_ext; diff --git a/zephyr/test/drivers/usbc_ctvpd/src/main.c b/zephyr/test/drivers/usbc_ctvpd/src/main.c index 0bd6639d83..909a52daa9 100644 --- a/zephyr/test/drivers/usbc_ctvpd/src/main.c +++ b/zephyr/test/drivers/usbc_ctvpd/src/main.c @@ -125,7 +125,7 @@ static void usbc_ctvpd_after(void *data) ZTEST_SUITE(usbc_ctvpd, drivers_predicate_post_main, usbc_ctvpd_setup, usbc_ctvpd_before, usbc_ctvpd_after, NULL); -ZTEST_USER_F(usbc_ctvpd, verify_discovery) +ZTEST_USER_F(usbc_ctvpd, test_verify_discovery) { uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; struct ec_response_typec_discovery *discovery = @@ -148,7 +148,7 @@ ZTEST_USER_F(usbc_ctvpd, verify_discovery) "Discovered SOP identity ACK did not match"); } -ZTEST_USER_F(usbc_ctvpd, verify_no_vconn_swap) +ZTEST_USER_F(usbc_ctvpd, test_verify_no_vconn_swap) { struct ec_response_typec_status status = host_cmd_typec_status(TEST_PORT); diff --git a/zephyr/test/drivers/usbc_ppc/ppc_alts.dts b/zephyr/test/drivers/usbc_ppc/ppc_alts.dts index 09488dc91e..ed84ff0662 100644 --- a/zephyr/test/drivers/usbc_ppc/ppc_alts.dts +++ b/zephyr/test/drivers/usbc_ppc/ppc_alts.dts @@ -17,9 +17,10 @@ &i2c0 { ppc_nx20p348x_alt: nx20p348x@77 { - compatible = "nxp,nx20p348x", "cros,i2c-mock"; + compatible = "nxp,nx20p348x"; status = "okay"; reg = <0x77>; + irq-gpios = < &gpio0 14 GPIO_ACTIVE_LOW >; is-alt; }; diff --git a/zephyr/test/drivers/usbc_tbt_mode/src/usbc_tbt_mode.c b/zephyr/test/drivers/usbc_tbt_mode/src/usbc_tbt_mode.c index 2fc895bb27..38476eb36c 100644 --- a/zephyr/test/drivers/usbc_tbt_mode/src/usbc_tbt_mode.c +++ b/zephyr/test/drivers/usbc_tbt_mode/src/usbc_tbt_mode.c @@ -211,7 +211,7 @@ static void usbc_tbt_mode_after(void *data) tcpci_partner_common_clear_logged_msgs(&fix->partner); } -ZTEST_F(usbc_tbt_mode, verify_discovery) +ZTEST_F(usbc_tbt_mode, test_verify_discovery) { uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; struct ec_response_typec_discovery *discovery = @@ -247,7 +247,7 @@ ZTEST_F(usbc_tbt_mode, verify_discovery) } /* Without an e-marked cable, TBT mode cannot be entered */ -ZTEST_F(usbc_tbt_mode, verify_tbt_entry_fail) +ZTEST_F(usbc_tbt_mode, test_verify_tbt_entry_fail) { struct ec_response_typec_status status; @@ -285,7 +285,7 @@ ZTEST_F(usbc_tbt_mode, verify_tbt_entry_fail) } /* With passive e-marked cable, TBT mode can be entered on SOP only */ -ZTEST_F(usbc_tbt_mode, verify_tbt_passive_entry_exit) +ZTEST_F(usbc_tbt_mode, test_verify_tbt_passive_entry_exit) { struct ec_response_typec_status status; diff --git a/zephyr/test/drivers/usbc_usb4_mode/src/usbc_usb4_mode.c b/zephyr/test/drivers/usbc_usb4_mode/src/usbc_usb4_mode.c index b8bb6809a4..4c21aaeac4 100644 --- a/zephyr/test/drivers/usbc_usb4_mode/src/usbc_usb4_mode.c +++ b/zephyr/test/drivers/usbc_usb4_mode/src/usbc_usb4_mode.c @@ -163,7 +163,7 @@ static void usbc_usb4_mode_after(void *data) tcpci_partner_common_clear_logged_msgs(&fix->partner); } -ZTEST_F(usbc_usb4_mode, verify_discovery) +ZTEST_F(usbc_usb4_mode, test_verify_discovery) { uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; struct ec_response_typec_discovery *discovery = @@ -188,7 +188,7 @@ ZTEST_F(usbc_usb4_mode, verify_discovery) } /* Without an e-marked cable, USB4 mode cannot be entered */ -ZTEST_F(usbc_usb4_mode, verify_usb4_entry_fail) +ZTEST_F(usbc_usb4_mode, test_verify_usb4_entry_fail) { struct ec_response_typec_status status; @@ -217,7 +217,7 @@ ZTEST_F(usbc_usb4_mode, verify_usb4_entry_fail) } /* With passive e-marked cable, USB4 mode can be entered on SOP only */ -ZTEST_F(usbc_usb4_mode, verify_usb4_passive_entry_exit) +ZTEST_F(usbc_usb4_mode, test_verify_usb4_passive_entry_exit) { struct ec_response_typec_status status; diff --git a/zephyr/test/drivers/usbc_vconn_swap/src/usbc_vconn_swap.c b/zephyr/test/drivers/usbc_vconn_swap/src/usbc_vconn_swap.c index bc1eb6cd0d..a0e373c9d8 100644 --- a/zephyr/test/drivers/usbc_vconn_swap/src/usbc_vconn_swap.c +++ b/zephyr/test/drivers/usbc_vconn_swap/src/usbc_vconn_swap.c @@ -153,7 +153,7 @@ static void usbc_vconn_swap_not_supported_after(void *data) common_after(&outer->common); } -ZTEST_F(usbc_vconn_swap, vconn_swap_before_discovery) +ZTEST_F(usbc_vconn_swap, test_vconn_swap_before_discovery) { struct ec_response_typec_status status = host_cmd_typec_status(TEST_PORT); @@ -162,7 +162,7 @@ ZTEST_F(usbc_vconn_swap, vconn_swap_before_discovery) "TCPM did not initiate VCONN Swap after attach"); } -ZTEST_F(usbc_vconn_swap, vconn_swap_via_host_command) +ZTEST_F(usbc_vconn_swap, test_vconn_swap_via_host_command) { struct ec_response_typec_status status = host_cmd_typec_status(TEST_PORT); @@ -181,7 +181,7 @@ ZTEST_F(usbc_vconn_swap, vconn_swap_via_host_command) ZTEST_SUITE(usbc_vconn_swap, drivers_predicate_post_main, usbc_vconn_swap_setup, usbc_vconn_swap_before, usbc_vconn_swap_after, NULL); -ZTEST_F(usbc_vconn_swap_not_supported, vconn_swap_force_vconn) +ZTEST_F(usbc_vconn_swap_not_supported, test_vconn_swap_force_vconn) { struct ec_response_typec_status status = host_cmd_typec_status(TEST_PORT); diff --git a/zephyr/test/kingler/src/fakes.c b/zephyr/test/kingler/src/fakes.c index 52befc59c4..fd06ab2eb1 100644 --- a/zephyr/test/kingler/src/fakes.c +++ b/zephyr/test/kingler/src/fakes.c @@ -19,6 +19,7 @@ FAKE_VOID_FUNC(switch_interrupt, enum gpio_signal); FAKE_VOID_FUNC(tcpc_alert_event, enum gpio_signal); FAKE_VOID_FUNC(ppc_interrupt, enum gpio_signal); FAKE_VOID_FUNC(bc12_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(chipset_warm_reset_interrupt, enum gpio_signal); #ifndef CONFIG_TEST_KINGLER_CCD FAKE_VOID_FUNC(ccd_interrupt, enum gpio_signal); #endif diff --git a/zephyr/test/kingler/testcase.yaml b/zephyr/test/kingler/testcase.yaml index c6507043f7..04e580fe22 100644 --- a/zephyr/test/kingler/testcase.yaml +++ b/zephyr/test/kingler/testcase.yaml @@ -1,56 +1,52 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - common: platform_allow: native_posix tests: kingler.steelix: - extra_args: - DTC_OVERLAY_FILE="kingler.steelix.overlay" extra_configs: - - CONFIG_TEST_STEELIX_RUSTY=y - - CONFIG_TEST_FORM_FACTOR_CONVERTIBLE=y - - CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSM=y + - CONFIG_TEST_STEELIX_RUSTY=y + - CONFIG_TEST_FORM_FACTOR_CONVERTIBLE=y + - CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSM=y + extra_dtc_overlay_files: + - kingler.steelix.overlay kingler.rusty: - extra_args: - DTC_OVERLAY_FILE="kingler.steelix.overlay" extra_configs: - - CONFIG_TEST_STEELIX_RUSTY=y - - CONFIG_TEST_FORM_FACTOR_CLAMSHELL=y - - CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSM=y + - CONFIG_TEST_STEELIX_RUSTY=y + - CONFIG_TEST_FORM_FACTOR_CLAMSHELL=y + - CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSM=y + extra_dtc_overlay_files: + - kingler.steelix.overlay kingler.db_detect_typec: - extra_args: - DTC_OVERLAY_FILE="kingler.default.overlay" extra_configs: - - CONFIG_TEST_DB_DETECT_TYPEC=y - - CONFIG_VARIANT_CORSOLA_DB_DETECTION=y + - CONFIG_TEST_DB_DETECT_TYPEC=y + - CONFIG_VARIANT_CORSOLA_DB_DETECTION=y + extra_dtc_overlay_files: + - kingler.default.overlay kingler.db_detect_hdmi: - extra_args: - DTC_OVERLAY_FILE="kingler.default.overlay" extra_configs: - - CONFIG_TEST_DB_DETECT_HDMI=y - - CONFIG_VARIANT_CORSOLA_DB_DETECTION=y + - CONFIG_TEST_DB_DETECT_HDMI=y + - CONFIG_VARIANT_CORSOLA_DB_DETECTION=y + extra_dtc_overlay_files: + - kingler.default.overlay kingler.db_detect_none: - extra_args: - DTC_OVERLAY_FILE="kingler.steelix.overlay" extra_configs: - - CONFIG_TEST_DB_DETECT_NONE=y - - CONFIG_VARIANT_CORSOLA_DB_DETECTION=y + - CONFIG_TEST_DB_DETECT_NONE=y + - CONFIG_VARIANT_CORSOLA_DB_DETECTION=y + extra_dtc_overlay_files: + - kingler.steelix.overlay kingler.ccd: - extra_args: - DTC_OVERLAY_FILE="kingler.default.overlay" extra_configs: - - CONFIG_TEST_KINGLER_CCD=y + - CONFIG_TEST_KINGLER_CCD=y + extra_dtc_overlay_files: + - kingler.default.overlay kingler.alt_sensor: - extra_args: - DTC_OVERLAY_FILE="kingler.steelix.overlay" extra_configs: - - CONFIG_TEST_STEELIX_RUSTY=y - - CONFIG_TEST_ALT_SENSOR_PROBE=y + - CONFIG_TEST_STEELIX_RUSTY=y + - CONFIG_TEST_ALT_SENSOR_PROBE=y + extra_dtc_overlay_files: + - kingler.steelix.overlay kingler.voltorb: - extra_args: - DTC_OVERLAY_FILE="kingler.default.overlay" extra_configs: - - CONFIG_TEST_VOLTORB=y - - CONFIG_TEST_USB_PD_POLICY=y + - CONFIG_TEST_VOLTORB=y + - CONFIG_TEST_USB_PD_POLICY=y + extra_dtc_overlay_files: + - kingler.default.overlay diff --git a/zephyr/test/krabby/prj.conf b/zephyr/test/krabby/prj.conf index 3de743c076..58b208ef7d 100644 --- a/zephyr/test/krabby/prj.conf +++ b/zephyr/test/krabby/prj.conf @@ -38,3 +38,5 @@ CONFIG_PLATFORM_EC_USB_POWER_DELIVERY=y CONFIG_PLATFORM_EC_VBOOT_HASH=n CONFIG_PLATFORM_EC_USBC_PPC=y + +CONFIG_NATIVE_UART_0_ON_STDINOUT=y diff --git a/zephyr/test/krabby/src/fake.c b/zephyr/test/krabby/src/fake.c index 9baff6f74d..5c83e1cb88 100644 --- a/zephyr/test/krabby/src/fake.c +++ b/zephyr/test/krabby/src/fake.c @@ -12,6 +12,7 @@ FAKE_VOID_FUNC(button_interrupt, enum gpio_signal); FAKE_VOID_FUNC(chipset_reset_request_interrupt, enum gpio_signal); FAKE_VOID_FUNC(power_signal_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(chipset_warm_reset_interrupt, enum gpio_signal); FAKE_VOID_FUNC(chipset_watchdog_interrupt, enum gpio_signal); FAKE_VOID_FUNC(extpower_interrupt, enum gpio_signal); FAKE_VOID_FUNC(usb_a0_interrupt, enum gpio_signal); diff --git a/zephyr/test/krabby/src/power_seq.c b/zephyr/test/krabby/src/power_seq.c index d01fbad035..de88342831 100644 --- a/zephyr/test/krabby/src/power_seq.c +++ b/zephyr/test/krabby/src/power_seq.c @@ -32,6 +32,9 @@ FAKE_VALUE_FUNC(int, system_jumped_late); #define S5_INACTIVE_SEC 11 +/* mt8186 is_held flag */ +extern bool is_held; + static void set_signal_state(enum power_state state) { const struct gpio_dt_spec *ap_ec_sysrst_odl = @@ -59,6 +62,8 @@ static void set_signal_state(enum power_state state) zassert_unreachable("state %d not supported", state); } + /* reset is_held flag */ + is_held = false; task_wake(TASK_ID_CHIPSET); k_sleep(K_SECONDS(1)); } @@ -69,8 +74,8 @@ static void power_seq_before(void *f) set_test_runner_tid(); /* Start from G3 */ - set_signal_state(POWER_G3); power_set_state(POWER_G3); + set_signal_state(POWER_G3); k_sleep(K_SECONDS(S5_INACTIVE_SEC)); RESET_FAKE(chipset_pre_init_hook); diff --git a/zephyr/test/krabby/testcase.yaml b/zephyr/test/krabby/testcase.yaml index 82bd8cd3ef..c9a683f316 100644 --- a/zephyr/test/krabby/testcase.yaml +++ b/zephyr/test/krabby/testcase.yaml @@ -1,35 +1,33 @@ -# Copyright 2022 The ChromiumOS Authors -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - common: platform_allow: native_posix tests: krabby.default: - extra_args: DTC_OVERLAY_FILE="krabby.default.overlay" extra_configs: - - CONFIG_TEST_KRABBY=y - - CONFIG_AP_ARM_MTK_MT8186=y - - CONFIG_MUX_INIT_ADC=y - - CONFIG_PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK=y - - CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y - - CONFIG_PLATFORM_EC_POWERSEQ=y - - CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n - - CONFIG_SHIMMED_TASKS=y + - CONFIG_TEST_KRABBY=y + - CONFIG_AP_ARM_MTK_MT8186=y + - CONFIG_MUX_INIT_ADC=y + - CONFIG_PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK=y + - CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y + - CONFIG_PLATFORM_EC_POWERSEQ=y + - CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n + - CONFIG_SHIMMED_TASKS=y + extra_dtc_overlay_files: + - krabby.default.overlay krabby.tentacruel: - extra_args: DTC_OVERLAY_FILE="krabby.tentacruel.overlay" extra_configs: - - CONFIG_TEST_TENTACRUEL=y - - CONFIG_PLATFORM_EC_CHARGER_PROFILE_OVERRIDE=y - - CONFIG_EEPROM=y - - CONFIG_EEPROM_SIMULATOR=n - - CONFIG_EMUL_EEPROM_AT2X=y - - CONFIG_PLATFORM_EC_MOTIONSENSE=y - - CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT=y - - CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y - - CONFIG_PLATFORM_EC_TABLET_MODE=y - - CONFIG_PLATFORM_EC_LID_ANGLE=y - - CONFIG_PLATFORM_EC_ACCELGYRO_BMI260=y - - CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y - - CONFIG_PLATFORM_EC_USBC_PPC_RT1739=y - - CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n + - CONFIG_TEST_TENTACRUEL=y + - CONFIG_PLATFORM_EC_CHARGER_PROFILE_OVERRIDE=y + - CONFIG_EEPROM=y + - CONFIG_EEPROM_SIMULATOR=n + - CONFIG_EMUL_EEPROM_AT2X=y + - CONFIG_PLATFORM_EC_MOTIONSENSE=y + - CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT=y + - CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y + - CONFIG_PLATFORM_EC_TABLET_MODE=y + - CONFIG_PLATFORM_EC_LID_ANGLE=y + - CONFIG_PLATFORM_EC_ACCELGYRO_BMI260=y + - CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y + - CONFIG_PLATFORM_EC_USBC_PPC_RT1739=y + - CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n + extra_dtc_overlay_files: + - krabby.tentacruel.overlay diff --git a/zephyr/test/math/src/fixed_point_int_sqrtf.c b/zephyr/test/math/src/fixed_point_int_sqrtf.c index 4403980a96..f949084f28 100644 --- a/zephyr/test/math/src/fixed_point_int_sqrtf.c +++ b/zephyr/test/math/src/fixed_point_int_sqrtf.c @@ -8,12 +8,12 @@ #include <zephyr/ztest.h> -ZTEST_USER(math, int_sqrtf_negative) +ZTEST_USER(math, test_int_sqrtf_negative) { zassert_equal(int_sqrtf(-100), 0); } -ZTEST_USER(math, int_sqrtf_overflow) +ZTEST_USER(math, test_int_sqrtf_overflow) { zassert_equal(int_sqrtf(INT64_MAX), INT32_MAX); } diff --git a/zephyr/test/math/src/mask.c b/zephyr/test/math/src/mask.c index c986834eb8..e3bce982a5 100644 --- a/zephyr/test/math/src/mask.c +++ b/zephyr/test/math/src/mask.c @@ -10,7 +10,7 @@ #include <zephyr/ztest.h> -ZTEST_USER(math, bitmask_uint64) +ZTEST_USER(math, test_bitmask_uint64) { zassert_equal(bitmask_uint64(-1), 0); zassert_equal(bitmask_uint64(64), 0); diff --git a/zephyr/test/math/src/math_util.c b/zephyr/test/math/src/math_util.c index 184dd2b999..e5d9d8c9f2 100644 --- a/zephyr/test/math/src/math_util.c +++ b/zephyr/test/math/src/math_util.c @@ -10,7 +10,7 @@ #include <zephyr/ztest.h> -ZTEST_USER(math, arc_cos__x_below_range) +ZTEST_USER(math, test_arc_cos__x_below_range) { fp_t result = arc_cos(FLOAT_TO_FP(-1.1)); @@ -18,7 +18,7 @@ ZTEST_USER(math, arc_cos__x_below_range) "arc_cos(-1.1) was %d", FP_TO_INT(result)); } -ZTEST_USER(math, arc_cos__x_above_range) +ZTEST_USER(math, test_arc_cos__x_above_range) { fp_t result = arc_cos(FLOAT_TO_FP(1.1)); @@ -26,7 +26,7 @@ ZTEST_USER(math, arc_cos__x_above_range) "arc_cos(1.1) was %d", FP_TO_INT(result)); } -ZTEST_USER(math, int_sqrtf) +ZTEST_USER(math, test_int_sqrtf) { zassert_equal(int_sqrtf(0), 0); zassert_equal(int_sqrtf(15), 3); @@ -36,13 +36,13 @@ ZTEST_USER(math, int_sqrtf) zassert_equal(int_sqrtf(1000000000000000005), 1000000000); } -ZTEST_USER(math, fp_sqrtf) +ZTEST_USER(math, test_fp_sqrtf) { zassert_within(fp_sqrtf(FLOAT_TO_FP(15)), FLOAT_TO_FP(3.872983), FLOAT_TO_FP(0.001), NULL); } -ZTEST_USER(math, print_ints) +ZTEST_USER(math, test_print_ints) { char buffer[10]; diff --git a/zephyr/test/math/src/vector.c b/zephyr/test/math/src/vector.c index e588be52af..344cb80f48 100644 --- a/zephyr/test/math/src/vector.c +++ b/zephyr/test/math/src/vector.c @@ -8,7 +8,7 @@ #include <zephyr/ztest.h> -ZTEST_USER(math, cosine_of_angle_diff__zero_magnitude_vector) +ZTEST_USER(math, test_cosine_of_angle_diff__zero_magnitude_vector) { intv3_t v0 = { 0, 0, 0 }; intv3_t v1 = { 1, 1, 1 }; @@ -17,7 +17,7 @@ ZTEST_USER(math, cosine_of_angle_diff__zero_magnitude_vector) zassert_equal(cosine_of_angle_diff(v1, v0), 0); } -ZTEST_USER(math, rotate_inv__null_matrix) +ZTEST_USER(math, test_rotate_inv__null_matrix) { intv3_t v = { 1, 2, 3 }; intv3_t r = { 4, 5, 6 }; diff --git a/zephyr/test/math/testcase.yaml b/zephyr/test/math/testcase.yaml index cd33e70553..465591e5a0 100644 --- a/zephyr/test/math/testcase.yaml +++ b/zephyr/test/math/testcase.yaml @@ -2,6 +2,8 @@ common: platform_allow: native_posix tests: util.math.fixed_point: - extra_args: OVERLAY_CONFIG=./fixed_point.conf + extra_overlay_confs: + - ./fixed_point.conf util.math.floating_point: - extra_args: OVERLAY_CONFIG=./floating_point.conf + extra_overlay_confs: + - ./floating_point.conf diff --git a/zephyr/test/nissa/CMakeLists.txt b/zephyr/test/nissa/CMakeLists.txt new file mode 100644 index 0000000000..dc351aa3b6 --- /dev/null +++ b/zephyr/test/nissa/CMakeLists.txt @@ -0,0 +1,17 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.13.1) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") +project(nissa) + +add_subdirectory(${PLATFORM_EC}/zephyr/test/test_utils test_utils) + +zephyr_include_directories("${PLATFORM_EC_PROGRAM_DIR}/nissa/include") + +target_sources(app PRIVATE src/stubs.c src/sub_board.c) + +target_sources(app PRIVATE + ${PLATFORM_EC_PROGRAM_DIR}/nissa/src/sub_board.c + ${PLATFORM_EC_PROGRAM_DIR}/nissa/src/common.c) diff --git a/zephyr/test/nissa/Kconfig b/zephyr/test/nissa/Kconfig new file mode 100644 index 0000000000..f8215bbf37 --- /dev/null +++ b/zephyr/test/nissa/Kconfig @@ -0,0 +1,9 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +module = NISSA +module-str = Nissa board-specific code (unit tests) +source "subsys/logging/Kconfig.template.log_config" + +source "Kconfig.zephyr" diff --git a/zephyr/test/nissa/README.md b/zephyr/test/nissa/README.md new file mode 100644 index 0000000000..17737fcba5 --- /dev/null +++ b/zephyr/test/nissa/README.md @@ -0,0 +1,3 @@ +Tests for board specific code under `zephyr/program/nissa/` + +Run with ./twister -T zephyr/test/nissa diff --git a/zephyr/test/nissa/boards/generic_npcx.dts b/zephyr/test/nissa/boards/generic_npcx.dts new file mode 100644 index 0000000000..1639dc80c8 --- /dev/null +++ b/zephyr/test/nissa/boards/generic_npcx.dts @@ -0,0 +1,179 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Device tree for a generic Nissa device based on a NPCX EC, suitable for board + * unit tests. + */ +#include <npcx_emul.dts> +#include "../program/nissa/cbi.dtsi" + +/ { + aliases { + /* type-C */ + gpio-usb-c1-int-odl = &gpio_sb_1; + /* type-A */ + gpio-en-usb-a1-vbus = &gpio_sb_2; + /* HDMI */ + gpio-en-rails-odl = &gpio_sb_1; + gpio-hdmi-en-odl = &gpio_sb_3; + gpio-hpd-odl = &gpio_sb_4; + /* LTE */ + gpio-en-sub-s5-rails = &gpio_sb_2; + }; + + gpio-interrupts { + compatible = "cros-ec,gpio-interrupts"; + + int_usb_c0: usb_c0 { + irq-pin = <&gpio_usb_c0_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_interrupt_c0"; + }; + + int_usb_c1: usb_c1 { + irq-pin = <&gpio_sb_1>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_interrupt_c1"; + }; + }; + + named-gpios { + compatible = "named-gpios"; + + gpio_ec_soc_dsw_pwrok: ec_soc_dsw_pwrok { + gpios = <&gpio6 1 GPIO_OUTPUT>; + }; + + gpio_ec_soc_hdmi_hpd: ec_soc_hdmi_hpd { + gpios = <&gpioe 4 GPIO_OUTPUT>; + }; + + entering_rw { + gpios = <&gpio0 3 GPIO_OUTPUT>; + enum-name = "GPIO_ENTERING_RW"; + }; + + gpio_en_pp5000_pen_x: en_pp5000_pen_x { + gpios = <&gpioe 2 GPIO_OUTPUT>; + }; + + gpio_en_slp_z: en_slp_z { + gpios = <&gpioe 1 GPIO_OUTPUT>; + }; + + gpio_hdmi_sel: hdmi_sel { + gpios = <&gpioc 6 GPIO_OUTPUT>; + }; + + gpio_usb_a0_enable: usb_a0_enable { + gpios = <&gpio1 0 GPIO_OUTPUT>; + }; + + gpio_usb_a0_ilimit_sdp: usb_a0_ilimit_sdp { + gpios = <&gpio1 2 GPIO_OUTPUT>; + enum-name = "GPIO_USB1_ILIM_SEL"; + }; + + gpio_sub_usb_a1_ilimit_sdp: usb_a1_ilimit_sdp { + gpios = <&gpio1 3 GPIO_OUTPUT>; + enum-name = "GPIO_USB2_ILIM_SEL"; + }; + + gpio_usb_c0_int_odl: usb_c0_int_odl { + gpios = <&gpio0 1 GPIO_INPUT_PULL_UP>; + }; + + gpio_sb_1: sb-1 { + gpios = <&gpio0 2 GPIO_PULL_UP>; + no-auto-init; + }; + + gpio_sb_2: sb-2 { + gpios = <&gpiod 4 GPIO_OUTPUT>; + no-auto-init; + }; + + gpio_sb_3: sb-3 { + gpios = <&gpiof 4 0>; + no-auto-init; + }; + + gpio_sb_4: sb-4 { + gpios = <&gpiof 5 GPIO_INPUT>; + no-auto-init; + }; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + i2c_ec_i2c_usb_c0: ec_i2c_usb_c0 { + i2c-port = <&i2c_ctrl0>; + enum-names = "I2C_PORT_USB_C0_TCPC"; + }; + i2c_ec_i2c_sub_usb_c1: ec_i2c_sub_usb_c1 { + i2c-port = <&i2c_ctrl1>; + enum-names = "I2C_PORT_USB_C1_TCPC"; + }; + }; + + usba { + compatible = "cros-ec,usba-port-enable-pins"; + enable-pins = <&gpio_usb_a0_enable &gpio_sb_2>; + status = "okay"; + }; + + usbc { + #address-cells = <1>; + #size-cells = <0>; + port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + tcpc = <&tcpci_emul_0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_0>; + }; + }; + port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + tcpc = <&tcpci_emul_1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_1>; + }; + usb_mux_chain_1_no_mux: usb-mux-chain-1-alternate { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; + }; + }; + port0-muxes { + virtual_mux_0: virtual-mux-0 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + port1-muxes { + virtual_mux_1: virtual-mux-1 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + }; +}; + +&i2c_ctrl0 { + tcpci_emul_0: tcpci_emul@82 { + compatible = "cros,tcpci-generic-emul"; + status = "okay"; + reg = <0x82>; + }; +}; + +&i2c_ctrl1 { + tcpci_emul_1: tcpci_emul@82 { + compatible = "cros,tcpci-generic-emul"; + status = "okay"; + reg = <0x82>; + }; +}; diff --git a/zephyr/test/nissa/prj.conf b/zephyr/test/nissa/prj.conf new file mode 100644 index 0000000000..3d4f0e5f3d --- /dev/null +++ b/zephyr/test/nissa/prj.conf @@ -0,0 +1,24 @@ +# Copyright 2023 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_ZTEST=y +CONFIG_ZTEST_ASSERT_VERBOSE=1 +CONFIG_ZTEST_NEW_API=y +CONFIG_ASSERT=y + +CONFIG_CROS_EC=y +CONFIG_PLATFORM_EC=y + +# Configuration used for Nissa boards, with some items that aren't relevant +# disabled so they don't depend on us defining items they want. +CONFIG_PLATFORM_EC_USBC=y +CONFIG_PLATFORM_EC_USBC_PPC=n +CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE=n +CONFIG_PLATFORM_EC_USB_CHARGER=n +CONFIG_PLATFORM_EC_USB_PD_HOST_CMD=n +CONFIG_PLATFORM_EC_USB_PORT_ENABLE_DYNAMIC=y + +# Allow the test fixture to use k_malloc +CONFIG_HEAP_MEM_POOL_SIZE=1024
\ No newline at end of file diff --git a/zephyr/test/nissa/src/stubs.c b/zephyr/test/nissa/src/stubs.c new file mode 100644 index 0000000000..970232197e --- /dev/null +++ b/zephyr/test/nissa/src/stubs.c @@ -0,0 +1,27 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Function stubs needed for building Nissa board code, but that aren't + * meaningful to testing. + */ + +#include "common.h" + +__overridable void pd_power_supply_reset(int port) +{ +} + +__overridable int pd_set_power_supply_ready(int port) +{ + return 0; +} + +__overridable void pd_set_input_current_limit(int port, uint32_t max_ma, + uint32_t supply_voltage) +{ +} + +__overridable void usb_interrupt_c0(enum gpio_signal signal) +{ +} diff --git a/zephyr/test/nissa/src/sub_board.c b/zephyr/test/nissa/src/sub_board.c new file mode 100644 index 0000000000..78b5b19143 --- /dev/null +++ b/zephyr/test/nissa/src/sub_board.c @@ -0,0 +1,245 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Unit tests for program/nissa/src/sub_board.c. + */ +#include "cros_cbi.h" +#include "hooks.h" +#include "nissa_hdmi.h" +#include "nissa_sub_board.h" +#include "usb_pd.h" + +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/fff.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include <ap_power/ap_power.h> +#include <ap_power/ap_power_events.h> + +FAKE_VALUE_FUNC(int, cros_cbi_get_fw_config, enum cbi_fw_config_field_id, + uint32_t *); +FAKE_VOID_FUNC(usb_interrupt_c1, enum gpio_signal); + +/* + * Private bits of board code that are visible for testing. + * + * The cached sub-board ID needs to be cleared by tests so we can run multiple + * tests per process, and usb_pd_count_init() needs to run following each update + * of reported sub-board. + */ +extern enum nissa_sub_board_type nissa_cached_sub_board; +void board_usb_pd_count_init(void); + +/* Shim GPIO initialization from devicetree. */ +int init_gpios(const struct device *unused); + +static uint32_t fw_config_value; + +/** Set the value of the CBI fw_config field returned by the fake. */ +static void set_fw_config_value(uint32_t value) +{ + fw_config_value = value; + board_usb_pd_count_init(); +} + +/** Custom fake for cros_cgi_get_fw_config(). */ +static int get_fake_fw_config_field(enum cbi_fw_config_field_id field_id, + uint32_t *value) +{ + *value = fw_config_value; + return 0; +} + +#define ASSERT_GPIO_FLAGS(spec, expected) \ + do { \ + gpio_flags_t flags; \ + zassert_ok(gpio_emul_flags_get((spec)->port, (spec)->pin, \ + &flags)); \ + zassert_equal(flags, expected, \ + "actual value was %#x; expected %#x", flags, \ + expected); \ + } while (0) + +static int get_gpio_output(const struct gpio_dt_spec *const spec) +{ + return gpio_emul_output_get(spec->port, spec->pin); +} + +struct nissa_sub_board_fixture { + const struct gpio_dt_spec *sb_1; + const struct gpio_dt_spec *sb_2; + const struct gpio_dt_spec *sb_3; + const struct gpio_dt_spec *sb_4; +}; + +static void *suite_setup_fn() +{ + struct nissa_sub_board_fixture *fixture = + k_malloc(sizeof(struct nissa_sub_board_fixture)); + + zassume_not_null(fixture); + fixture->sb_1 = GPIO_DT_FROM_NODELABEL(gpio_sb_1); + fixture->sb_2 = GPIO_DT_FROM_NODELABEL(gpio_sb_2); + fixture->sb_3 = GPIO_DT_FROM_NODELABEL(gpio_sb_3); + fixture->sb_4 = GPIO_DT_FROM_NODELABEL(gpio_sb_4); + + return fixture; +} + +static void test_before_fn(void *fixture_) +{ + struct nissa_sub_board_fixture *fixture = fixture_; + + /* Reset cached global state. */ + nissa_cached_sub_board = NISSA_SB_UNKNOWN; + fw_config_value = -1; + + /* Return the fake fw_config value. */ + RESET_FAKE(cros_cbi_get_fw_config); + cros_cbi_get_fw_config_fake.custom_fake = get_fake_fw_config_field; + + /* Unconfigure sub-board GPIOs. */ + gpio_pin_configure_dt(fixture->sb_1, GPIO_DISCONNECTED); + gpio_pin_configure_dt(fixture->sb_2, GPIO_DISCONNECTED); + gpio_pin_configure_dt(fixture->sb_3, GPIO_DISCONNECTED); + gpio_pin_configure_dt(fixture->sb_4, GPIO_DISCONNECTED); + /* Reset C1 interrupt to deasserted. */ + gpio_emul_input_set(fixture->sb_1->port, fixture->sb_1->pin, 1); + + RESET_FAKE(usb_interrupt_c1); +} + +ZTEST_SUITE(nissa_sub_board, NULL, suite_setup_fn, test_before_fn, NULL, NULL); + +ZTEST_F(nissa_sub_board, test_usb_c_a) +{ + /* Set the sub-board, reported configuration is correct. */ + set_fw_config_value(FW_SUB_BOARD_1); + zassert_equal(nissa_get_sb_type(), NISSA_SB_C_A); + zassert_equal(board_get_usb_pd_port_count(), 2); + + /* Should have fetched CBI exactly once, asking for the sub-board. */ + zassert_equal(cros_cbi_get_fw_config_fake.call_count, 1); + zassert_equal(cros_cbi_get_fw_config_fake.arg0_history[0], + FW_SUB_BOARD); + + /* Run IO configuration in init. */ + init_gpios(NULL); + hook_notify(HOOK_INIT); + + /* Check that the sub-board GPIOs are configured correctly. */ + ASSERT_GPIO_FLAGS(fixture->sb_2 /* A1 VBUS enable */, GPIO_OUTPUT); + ASSERT_GPIO_FLAGS(fixture->sb_1 /* C1 interrupt */, + GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_EDGE_FALLING); + + /* USB-C1 interrupt is handled. */ + RESET_FAKE(usb_interrupt_c1); + gpio_emul_input_set(fixture->sb_1->port, fixture->sb_1->pin, 0); + zassert_equal(usb_interrupt_c1_fake.call_count, 1, + "usb_interrupt was called %d times", + usb_interrupt_c1_fake.call_count); +} + +ZTEST_F(nissa_sub_board, test_usb_c_lte) +{ + set_fw_config_value(FW_SUB_BOARD_2); + zassert_equal(nissa_get_sb_type(), NISSA_SB_C_LTE); + zassert_equal(board_get_usb_pd_port_count(), 2); + + init_gpios(NULL); + hook_notify(HOOK_INIT); + + /* GPIOs are configured as expected. */ + ASSERT_GPIO_FLAGS(fixture->sb_2 /* Standby power enable */, + GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW); + ASSERT_GPIO_FLAGS(fixture->sb_1 /* C1 interrupt */, + GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_EDGE_FALLING); + + /* USB interrupt is handled. */ + RESET_FAKE(usb_interrupt_c1); + gpio_emul_input_set(fixture->sb_1->port, fixture->sb_1->pin, 0); + zassert_equal(usb_interrupt_c1_fake.call_count, 1, + "usb_interrupt was called %d times", + usb_interrupt_c1_fake.call_count); + + /* LTE power gets enabled on S5. */ + ap_power_ev_send_callbacks(AP_POWER_PRE_INIT); + zassert_equal(get_gpio_output(fixture->sb_2), 1); + /* And disabled on G3. */ + ap_power_ev_send_callbacks(AP_POWER_HARD_OFF); + zassert_equal(get_gpio_output(fixture->sb_2), 0); +} + +ZTEST_F(nissa_sub_board, test_usb_a_hdmi) +{ + set_fw_config_value(FW_SUB_BOARD_3); + zassert_equal(nissa_get_sb_type(), NISSA_SB_HDMI_A); + zassert_equal(board_get_usb_pd_port_count(), 1); + + init_gpios(NULL); + hook_notify(HOOK_INIT); + + /* USB-A controls are enabled. */ + ASSERT_GPIO_FLAGS(fixture->sb_2 /* A1 VBUS enable */, GPIO_OUTPUT); + + /* + * HDMI IOs configured as expected. The HDMI power enable and DDC select + * pins are impossible to test because emulated GPIOs don't support + * open-drain mode, so this only checks HPD. + */ + ASSERT_GPIO_FLAGS(fixture->sb_4, + GPIO_INPUT | GPIO_ACTIVE_LOW | GPIO_INT_EDGE_BOTH); + + /* Power events adjust HDMI port power as expected. */ + ap_power_ev_send_callbacks(AP_POWER_PRE_INIT); + zassert_equal(get_gpio_output(GPIO_DT_FROM_NODELABEL(gpio_hdmi_sel)), + 1); + ap_power_ev_send_callbacks(AP_POWER_STARTUP); + ap_power_ev_send_callbacks(AP_POWER_SHUTDOWN); + ap_power_ev_send_callbacks(AP_POWER_HARD_OFF); + zassert_equal(get_gpio_output(GPIO_DT_FROM_NODELABEL(gpio_hdmi_sel)), + 0); + + /* HPD input gets copied through to the output, and inverted. */ + gpio_emul_input_set(fixture->sb_4->port, fixture->sb_4->pin, 1); + zassert_equal( + get_gpio_output(GPIO_DT_FROM_NODELABEL(gpio_ec_soc_hdmi_hpd)), + 0); + gpio_emul_input_set(fixture->sb_4->port, fixture->sb_4->pin, 0); + zassert_equal( + get_gpio_output(GPIO_DT_FROM_NODELABEL(gpio_ec_soc_hdmi_hpd)), + 1); +} + +ZTEST(nissa_sub_board, test_unset_board) +{ + /* fw_config with an unset sub-board means none is present. */ + set_fw_config_value(0); + zassert_equal(nissa_get_sb_type(), NISSA_SB_NONE); + zassert_equal(board_get_usb_pd_port_count(), 1); +} + +static int get_fw_config_error(enum cbi_fw_config_field_id field, + uint32_t *value) +{ + return EC_ERROR_UNKNOWN; +} + +ZTEST(nissa_sub_board, test_cbi_error) +{ + /* + * Reading fw_config from CBI returns an error, so sub-board is treated + * as absent. + */ + cros_cbi_get_fw_config_fake.custom_fake = get_fw_config_error; + zassert_equal(nissa_get_sb_type(), NISSA_SB_NONE); +} + +/** Override default HDMI configuration to exercise the power enable as well. */ +__override void nissa_configure_hdmi_power_gpios(void) +{ + nissa_configure_hdmi_rails(); + nissa_configure_hdmi_vcc(); +} diff --git a/zephyr/test/nissa/testcase.yaml b/zephyr/test/nissa/testcase.yaml new file mode 100644 index 0000000000..c9b568e326 --- /dev/null +++ b/zephyr/test/nissa/testcase.yaml @@ -0,0 +1,10 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +common: + platform_allow: native_posix +tests: + nissa.sub_board: + extra_dtc_overlay_files: + - "boards/generic_npcx.dts" diff --git a/zephyr/test/qcom_power/testcase.yaml b/zephyr/test/qcom_power/testcase.yaml index fba474392b..026032d06b 100644 --- a/zephyr/test/qcom_power/testcase.yaml +++ b/zephyr/test/qcom_power/testcase.yaml @@ -3,6 +3,8 @@ common: tests: qcom_power.default: {} qcom_power.power_gpio_keys: - extra_args: DTC_OVERLAY_FILE="./boards/native_posix.overlay;./boards/power_button.dtsi" extra_configs: - - CONFIG_PLATFORM_EC_POWER_BUTTON=n + - CONFIG_PLATFORM_EC_POWER_BUTTON=n + extra_dtc_overlay_files: + - ./boards/native_posix.overlay + - ./boards/power_button.dtsi diff --git a/zephyr/test/rex/CMakeLists.txt b/zephyr/test/rex/CMakeLists.txt index da2b456f2c..b9e1b1410a 100644 --- a/zephyr/test/rex/CMakeLists.txt +++ b/zephyr/test/rex/CMakeLists.txt @@ -15,3 +15,6 @@ target_sources_ifdef(CONFIG_TEST_USB_PD_POLICY app PRIVATE ${PLATFORM_EC_PROGRAM target_sources_ifdef(CONFIG_TEST_BOARD_POWER app PRIVATE src/board_power.c) target_sources_ifdef(CONFIG_TEST_BOARD_POWER app PRIVATE ${PLATFORM_EC_PROGRAM_DIR}/rex/src/board_power.c) + +target_sources_ifdef(CONFIG_TEST_BOARD_USB_MUX_CONFIG app PRIVATE src/usb_mux_config.c) +target_sources_ifdef(CONFIG_TEST_BOARD_USB_MUX_CONFIG app PRIVATE ${PLATFORM_EC_PROGRAM_DIR}/rex/rex/src/usb_mux_config.c) diff --git a/zephyr/test/rex/Kconfig b/zephyr/test/rex/Kconfig index f50890be10..ee844046be 100644 --- a/zephyr/test/rex/Kconfig +++ b/zephyr/test/rex/Kconfig @@ -2,6 +2,12 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. +config TEST_BOARD_USB_MUX_CONFIG + bool "Run the tests intended for usb_mux_config" + help + Include usb_mux_config.c into the binary and test their + functions. + config TEST_USB_PD_POLICY bool "Run the tests intended for usb_pd_policy" help diff --git a/zephyr/test/rex/board_power.dtsi b/zephyr/test/rex/board_power.dtsi index 3f6369757b..e5f90dfa80 100644 --- a/zephyr/test/rex/board_power.dtsi +++ b/zephyr/test/rex/board_power.dtsi @@ -23,14 +23,14 @@ /* GPIO_PULL_UP will cause this start asserted, * i.e. not pressed. */ - gpios = <&gpio0 1 (GPIO_INPUT | GPIO_PULL_UP)>; + gpios = <&gpio0 3 (GPIO_INPUT | GPIO_PULL_UP)>; enum-name = "GPIO_POWER_BUTTON_L"; }; gpio_wp_l: wp_l { - gpios = <&gpio0 3 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + gpios = <&gpio0 4 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; }; entering-rw { - gpios = <&gpio0 1 GPIO_OUTPUT_LOW>; + gpios = <&gpio0 5 GPIO_OUTPUT_LOW>; enum-name = "GPIO_ENTERING_RW"; }; }; diff --git a/zephyr/test/rex/boards/rex/rex.dtsi b/zephyr/test/rex/boards/rex/rex.dtsi new file mode 100644 index 0000000000..0f30563537 --- /dev/null +++ b/zephyr/test/rex/boards/rex/rex.dtsi @@ -0,0 +1,7 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "../native_posix.overlay" +#include "../../../../program/rex/rex/cbi.dtsi" diff --git a/zephyr/test/rex/src/usb_mux_config.c b/zephyr/test/rex/src/usb_mux_config.c new file mode 100644 index 0000000000..fe4e69feb8 --- /dev/null +++ b/zephyr/test/rex/src/usb_mux_config.c @@ -0,0 +1,74 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "cros_cbi.h" +#include "hooks.h" +#include "usb_mux.h" +#include "usbc/usb_muxes.h" + +#include <zephyr/devicetree.h> +#include <zephyr/fff.h> +#include <zephyr/ztest.h> + +FAKE_VALUE_FUNC(int, cros_cbi_get_fw_config, enum cbi_fw_config_field_id, + uint32_t *); + +int mock_cros_cbi_get_fw_config(enum cbi_fw_config_field_id field_id, + uint32_t *value) +{ + *value = FW_USB_DB_USB3; + return 0; +} + +int mock_cros_cbi_get_fw_config_no_usb_db(enum cbi_fw_config_field_id field_id, + uint32_t *value) +{ + *value = FW_USB_DB_NOT_CONNECTED; + return 0; +} + +int mock_cros_cbi_get_fw_config_error(enum cbi_fw_config_field_id field_id, + uint32_t *value) +{ + return -1; +} + +static void usb_mux_config_before(void *fixture) +{ + ARG_UNUSED(fixture); + + RESET_FAKE(cros_cbi_get_fw_config); +} + +ZTEST_USER(usb_mux_config, test_setup_mux) +{ + cros_cbi_get_fw_config_fake.custom_fake = mock_cros_cbi_get_fw_config; + + hook_notify(HOOK_INIT); + + zassert_equal(1, cros_cbi_get_fw_config_fake.call_count); +} + +ZTEST_USER(usb_mux_config, test_setup_mux_no_usb_db) +{ + cros_cbi_get_fw_config_fake.custom_fake = + mock_cros_cbi_get_fw_config_no_usb_db; + + hook_notify(HOOK_INIT); + + zassert_equal(1, cros_cbi_get_fw_config_fake.call_count); +} + +ZTEST_USER(usb_mux_config, test_setup_mux_error_reading_cbi) +{ + cros_cbi_get_fw_config_fake.custom_fake = + mock_cros_cbi_get_fw_config_error; + + hook_notify(HOOK_INIT); + + zassert_equal(1, cros_cbi_get_fw_config_fake.call_count); +} + +ZTEST_SUITE(usb_mux_config, NULL, NULL, usb_mux_config_before, NULL, NULL); diff --git a/zephyr/test/rex/testcase.yaml b/zephyr/test/rex/testcase.yaml index abd5955435..9331a51956 100644 --- a/zephyr/test/rex/testcase.yaml +++ b/zephyr/test/rex/testcase.yaml @@ -20,3 +20,9 @@ tests: - CONFIG_AP_POWER_EVENTS_MOCK=y - CONFIG_POWER_SIGNALS_MOCK=y - CONFIG_AP_EVENTS=n + + rex.rex.usb_mux_config: + extra_dtc_overlay_files: + - boards/rex/rex.dtsi + extra_configs: + - CONFIG_TEST_BOARD_USB_MUX_CONFIG=y diff --git a/zephyr/test/skyrim/testcase.yaml b/zephyr/test/skyrim/testcase.yaml index 43ea40da6f..b2bf8d2a06 100644 --- a/zephyr/test/skyrim/testcase.yaml +++ b/zephyr/test/skyrim/testcase.yaml @@ -82,11 +82,11 @@ tests: - CONFIG_TEST_BOARD_PPC_CONFIG=y skyrim.skyrim.form_factor: - extra_args: - DTC_OVERLAY_FILE="./boards/skyrim/skyrim.dtsi;" extra_configs: - CONFIG_TEST_BOARD_SKYRIM=y - CONFIG_TEST_BOARD_FORM_FACTOR=y + extra_dtc_overlay_files: + - ./boards/skyrim/skyrim.dtsi # Winterhold tests skyrim.winterhold: diff --git a/zephyr/test/skyrim/tests/baseboard/src/usb_pd_policy.c b/zephyr/test/skyrim/tests/baseboard/src/usb_pd_policy.c index 1a8e5e8805..10c9e93b1a 100644 --- a/zephyr/test/skyrim/tests/baseboard/src/usb_pd_policy.c +++ b/zephyr/test/skyrim/tests/baseboard/src/usb_pd_policy.c @@ -19,7 +19,7 @@ FAKE_VALUE_FUNC(int, ppc_vbus_sink_enable, int, int); int board_is_sourcing_vbus(int port); -ZTEST(usb_pd_policy, pd_check_vconn_swap) +ZTEST(usb_pd_policy, test_pd_check_vconn_swap) { const struct gpio_dt_spec *gpio = GPIO_DT_FROM_NODELABEL(gpio_pg_pwr_s5); @@ -37,7 +37,7 @@ ZTEST(usb_pd_policy, pd_check_vconn_swap) zassert_false(pd_check_vconn_swap(1)); } -ZTEST(usb_pd_policy, pd_power_supply_reset_c0_success) +ZTEST(usb_pd_policy, test_pd_power_supply_reset_c0_success) { ppc_vbus_source_enable_fake.return_val = EC_SUCCESS; ppc_vbus_sink_enable_fake.return_val = EC_SUCCESS; @@ -61,7 +61,7 @@ ZTEST(usb_pd_policy, pd_power_supply_reset_c0_success) zassert_equal(pd_send_host_event_fake.call_count, 1); } -ZTEST(usb_pd_policy, pd_power_supply_reset_c1_success) +ZTEST(usb_pd_policy, test_pd_power_supply_reset_c1_success) { ppc_vbus_source_enable_fake.return_val = EC_SUCCESS; ppc_vbus_sink_enable_fake.return_val = EC_SUCCESS; @@ -85,7 +85,7 @@ ZTEST(usb_pd_policy, pd_power_supply_reset_c1_success) zassert_equal(pd_send_host_event_fake.call_count, 1); } -ZTEST(usb_pd_policy, pd_set_power_supply_ready_c0_success) +ZTEST(usb_pd_policy, test_pd_set_power_supply_ready_c0_success) { ppc_vbus_source_enable_fake.return_val = EC_SUCCESS; ppc_vbus_sink_enable_fake.return_val = EC_SUCCESS; @@ -115,7 +115,7 @@ ZTEST(usb_pd_policy, pd_set_power_supply_ready_c0_success) zassert_equal(pd_send_host_event_fake.call_count, 1); } -ZTEST(usb_pd_policy, pd_set_power_supply_ready_c1_success) +ZTEST(usb_pd_policy, test_pd_set_power_supply_ready_c1_success) { ppc_vbus_source_enable_fake.return_val = EC_SUCCESS; ppc_vbus_sink_enable_fake.return_val = EC_SUCCESS; @@ -145,7 +145,7 @@ ZTEST(usb_pd_policy, pd_set_power_supply_ready_c1_success) zassert_equal(pd_send_host_event_fake.call_count, 1); } -ZTEST(usb_pd_policy, pd_set_power_supply_ready_c0_failure) +ZTEST(usb_pd_policy, test_pd_set_power_supply_ready_c0_failure) { /* Test with ppc_vbus_sink_enable_fake failing. */ ppc_vbus_sink_enable_fake.return_val = EC_ERROR_INVAL; @@ -169,7 +169,7 @@ ZTEST(usb_pd_policy, pd_set_power_supply_ready_c0_failure) zassert_equal(pd_send_host_event_fake.call_count, 0); } -ZTEST(usb_pd_policy, pd_set_power_supply_ready_c1_failure) +ZTEST(usb_pd_policy, test_pd_set_power_supply_ready_c1_failure) { /* Test with ppc_vbus_sink_enable_fake failing. */ ppc_vbus_sink_enable_fake.return_val = EC_ERROR_INVAL; @@ -193,7 +193,7 @@ ZTEST(usb_pd_policy, pd_set_power_supply_ready_c1_failure) zassert_equal(pd_send_host_event_fake.call_count, 0); } -ZTEST(usb_pd_policy, board_pd_set_frs_enable) +ZTEST(usb_pd_policy, test_board_pd_set_frs_enable) { const struct gpio_dt_spec *c0 = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_fastsw_ctl_en); @@ -214,7 +214,7 @@ ZTEST(usb_pd_policy, board_pd_set_frs_enable) zassert_equal(gpio_emul_output_get(c1->port, c1->pin), 0); } -ZTEST(usb_pd_policy, board_is_sourcing_vbus_c0_true) +ZTEST(usb_pd_policy, test_board_is_sourcing_vbus_c0_true) { tcpm_get_src_ctrl_fake.return_val = true; zassert_true(board_is_sourcing_vbus(0)); @@ -223,7 +223,7 @@ ZTEST(usb_pd_policy, board_is_sourcing_vbus_c0_true) zassert_equal(tcpm_get_src_ctrl_fake.arg0_val, 0); } -ZTEST(usb_pd_policy, board_is_sourcing_vbus_c0_false) +ZTEST(usb_pd_policy, test_board_is_sourcing_vbus_c0_false) { tcpm_get_src_ctrl_fake.return_val = false; zassert_false(board_is_sourcing_vbus(0)); @@ -232,7 +232,7 @@ ZTEST(usb_pd_policy, board_is_sourcing_vbus_c0_false) zassert_equal(tcpm_get_src_ctrl_fake.arg0_val, 0); } -ZTEST(usb_pd_policy, board_is_sourcing_vbus_c1_true) +ZTEST(usb_pd_policy, test_board_is_sourcing_vbus_c1_true) { tcpm_get_src_ctrl_fake.return_val = true; zassert_true(board_is_sourcing_vbus(1)); @@ -241,7 +241,7 @@ ZTEST(usb_pd_policy, board_is_sourcing_vbus_c1_true) zassert_equal(tcpm_get_src_ctrl_fake.arg0_val, 1); } -ZTEST(usb_pd_policy, board_is_sourcing_vbus_c1_false) +ZTEST(usb_pd_policy, test_board_is_sourcing_vbus_c1_false) { tcpm_get_src_ctrl_fake.return_val = false; zassert_false(board_is_sourcing_vbus(1)); diff --git a/zephyr/test/skyrim/tests/common/src/alt_charger.c b/zephyr/test/skyrim/tests/common/src/alt_charger.c index c03d31aaeb..0bd641fad0 100644 --- a/zephyr/test/skyrim/tests/common/src/alt_charger.c +++ b/zephyr/test/skyrim/tests/common/src/alt_charger.c @@ -38,7 +38,7 @@ static void alt_charger_before(void *fixture) ZTEST_SUITE(alt_charger, NULL, NULL, alt_charger_before, NULL, NULL); -ZTEST(alt_charger, normal_charger) +ZTEST(alt_charger, test_normal_charger) { alt_charger = false; alt_charger_init(); @@ -46,7 +46,7 @@ ZTEST(alt_charger, normal_charger) zassert_equal(chg_enable_alternate_test_fake.call_count, 0); } -ZTEST(alt_charger, alt_charger) +ZTEST(alt_charger, test_alt_charger) { alt_charger = true; alt_charger_init(); diff --git a/zephyr/test/skyrim/tests/common/src/fan.c b/zephyr/test/skyrim/tests/common/src/fan.c index 4968938298..275a7f1463 100644 --- a/zephyr/test/skyrim/tests/common/src/fan.c +++ b/zephyr/test/skyrim/tests/common/src/fan.c @@ -51,7 +51,7 @@ static void fan_before(void *fixture) ZTEST_SUITE(fan, NULL, NULL, fan_before, NULL, NULL); -ZTEST(fan, board_supports_pcore_ocp) +ZTEST(fan, test_board_supports_pcore_ocp) { /* Only supported for board version > 3. */ board_version = 2; @@ -62,7 +62,7 @@ ZTEST(fan, board_supports_pcore_ocp) zassert_true(board_supports_pcore_ocp()); } -ZTEST(fan, fan_init) +ZTEST(fan, test_fan_init) { /* Only disable fans on board version >= 3. */ fan_present = false; diff --git a/zephyr/test/skyrim/tests/common/src/ppc_config.c b/zephyr/test/skyrim/tests/common/src/ppc_config.c index ca759fa66a..0527520413 100644 --- a/zephyr/test/skyrim/tests/common/src/ppc_config.c +++ b/zephyr/test/skyrim/tests/common/src/ppc_config.c @@ -25,7 +25,7 @@ int board_aoz1380_set_vbus_source_current_limit(int port, ZTEST_SUITE(ppc_config, NULL, NULL, ppc_config_before, NULL, NULL); -ZTEST(ppc_config, board_aoz1380_set_vbus_source_current_limit) +ZTEST(ppc_config, test_board_aoz1380_set_vbus_source_current_limit) { int rv; const struct gpio_dt_spec *gpio = @@ -48,7 +48,7 @@ ZTEST(ppc_config, board_aoz1380_set_vbus_source_current_limit) zassert_equal(rv, EC_ERROR_INVAL); } -ZTEST(ppc_config, ppc_interrupt) +ZTEST(ppc_config, test_ppc_interrupt) { ppc_interrupt(GPIO_USB_C0_PPC_INT_ODL); zassert_equal(aoz1380_interrupt_fake.call_count, 1); diff --git a/zephyr/test/skyrim/tests/frostflow/src/usb_mux_config.c b/zephyr/test/skyrim/tests/frostflow/src/usb_mux_config.c index 3a4b80d347..688453d13f 100644 --- a/zephyr/test/skyrim/tests/frostflow/src/usb_mux_config.c +++ b/zephyr/test/skyrim/tests/frostflow/src/usb_mux_config.c @@ -19,7 +19,7 @@ int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state); ZTEST_SUITE(usb_mux_config, NULL, NULL, NULL, NULL, NULL); -ZTEST(usb_mux_config, board_c0_amd_fp6_mux_set) +ZTEST(usb_mux_config, test_board_c0_amd_fp6_mux_set) { const struct gpio_dt_spec *c0 = GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip); @@ -48,7 +48,7 @@ ZTEST(usb_mux_config, board_c0_amd_fp6_mux_set) zassert_equal(gpio_emul_output_get(c1->port, c1->pin), 1); } -ZTEST(usb_mux_config, board_c1_ps8818_mux_set) +ZTEST(usb_mux_config, test_board_c1_ps8818_mux_set) { const struct gpio_dt_spec *gpio = GPIO_DT_FROM_NODELABEL(gpio_usb_c1_in_hpd); diff --git a/zephyr/test/skyrim/tests/winterhold/src/ppc_config.c b/zephyr/test/skyrim/tests/winterhold/src/ppc_config.c index 4fce497faf..0f319d8ea4 100644 --- a/zephyr/test/skyrim/tests/winterhold/src/ppc_config.c +++ b/zephyr/test/skyrim/tests/winterhold/src/ppc_config.c @@ -20,7 +20,7 @@ void ppc_interrupt(enum gpio_signal signal); ZTEST_SUITE(ppc_config, NULL, NULL, ppc_config_before, NULL, NULL); -ZTEST(ppc_config, ppc_interrupt_c0) +ZTEST(ppc_config, test_ppc_interrupt_c0) { ppc_interrupt(GPIO_USB_C0_PPC_INT_ODL); zassert_equal(nx20p348x_interrupt_fake.call_count, 1); @@ -28,7 +28,7 @@ ZTEST(ppc_config, ppc_interrupt_c0) zassert_equal(nx20p348x_interrupt_fake.arg0_val, 0); } -ZTEST(ppc_config, ppc_interrupt_c1) +ZTEST(ppc_config, test_ppc_interrupt_c1) { ppc_interrupt(GPIO_USB_C1_PPC_INT_ODL); zassert_equal(nx20p348x_interrupt_fake.call_count, 1); diff --git a/zephyr/test/system_safe_mode/prj.conf b/zephyr/test/system_safe_mode/prj.conf index 6ecdbe1b16..6c520dd235 100644 --- a/zephyr/test/system_safe_mode/prj.conf +++ b/zephyr/test/system_safe_mode/prj.conf @@ -13,6 +13,7 @@ CONFIG_TASK_HOSTCMD_THREAD_DEDICATED=y CONFIG_PLATFORM_EC_HOSTCMD=y CONFIG_ASSERT_TEST=y CONFIG_SHIMMED_TASKS=y +CONFIG_TASKS_SET_TEST_RUNNER_TID_RULE=y # Disable because not needed CONFIG_PLATFORM_EC_BACKLIGHT_LID=n diff --git a/zephyr/test/system_shim/testcase.yaml b/zephyr/test/system_shim/testcase.yaml index 29b5fa55c0..bd49c15791 100644 --- a/zephyr/test/system_shim/testcase.yaml +++ b/zephyr/test/system_shim/testcase.yaml @@ -4,5 +4,6 @@ common: system tests: system_shim.default: - extra_args: DTC_OVERLAY_FILE="./default.overlay" + extra_dtc_overlay_files: + - ./default.overlay system_shim.no_chosen: {} diff --git a/zephyr/test/vboot_efs2/boards/native_posix.overlay b/zephyr/test/vboot_efs2/boards/native_posix.overlay index 54bc09ace0..157ca70510 100644 --- a/zephyr/test/vboot_efs2/boards/native_posix.overlay +++ b/zephyr/test/vboot_efs2/boards/native_posix.overlay @@ -25,7 +25,7 @@ gpios = <&gpio0 3 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; }; usb_c0_tcpc_int_odl: usb_c0_tcpc_int_odl { - gpios = <&gpio0 4 GPIO_INPUT>; + gpios = <&gpio0 4 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; }; ec_batt_pres_odl { gpios = <&gpio0 5 GPIO_INPUT>; diff --git a/zephyr/zmake/tests/test_project.py b/zephyr/zmake/tests/test_project.py index 327d119bad..6acde6a48b 100644 --- a/zephyr/zmake/tests/test_project.py +++ b/zephyr/zmake/tests/test_project.py @@ -138,7 +138,11 @@ CONFIG_FILE_1 = """ register_raw_project(project_name="one", zephyr_board="one") register_host_project(project_name="two") register_npcx_project(project_name="three", zephyr_board="three") -register_binman_project(project_name="four", zephyr_board="four") +register_binman_project( + project_name="four", + zephyr_board="four", + inherited_from="baseboard" +) """ CONFIG_FILE_2 = """ @@ -146,6 +150,7 @@ register_raw_project( project_name="five", zephyr_board="foo", dts_overlays=[here / "gpio.dts"], + inherited_from=["root", "myboard"], ) """ @@ -174,9 +179,11 @@ def test_find_projects(tmp_path): assert projects["four"].config.project_dir == cf1_dir assert projects["four"].config.zephyr_board == "four" + assert projects["four"].config.full_name == "baseboard.four" assert projects["five"].config.project_dir == cf2_dir assert projects["five"].config.zephyr_board == "foo" + assert projects["five"].config.full_name == "root.myboard.five" def test_find_projects_name_conflict(tmp_path): @@ -218,6 +225,9 @@ another = some_variant.variant( tmp_path / "gpio.dts", tmp_path / "another.dts", ] + assert projects["some"].config.full_name == "some" + assert projects["some-variant"].config.full_name == "some.some-variant" + assert projects["another"].config.full_name == "some.some-variant.another" @pytest.mark.parametrize( diff --git a/zephyr/zmake/zmake/compare_builds.py b/zephyr/zmake/zmake/compare_builds.py index 6f1f804f68..54d51dd18a 100644 --- a/zephyr/zmake/zmake/compare_builds.py +++ b/zephyr/zmake/zmake/compare_builds.py @@ -8,6 +8,7 @@ import dataclasses import logging import os import pathlib +import shlex import subprocess import sys @@ -51,7 +52,14 @@ def git_do_checkout(module_name, work_dir, git_source, dst_dir, git_ref): dst_dir: Destination directory for the checkout, relative to the work_dir. git_ref: Git reference to checkout. """ - cmd = ["git", "clone", "--quiet", "--no-checkout", git_source, dst_dir] + cmd = [ + "git", + "clone", + "--quiet", + "--no-checkout", + "file://" + str(git_source), + str(dst_dir), + ] try: subprocess.run( @@ -62,7 +70,7 @@ def git_do_checkout(module_name, work_dir, git_source, dst_dir, git_ref): stderr=subprocess.DEVNULL, ) except subprocess.CalledProcessError: - logging.error("Clone failed for %s", module_name) + logging.error("Clone failed for %s: %s", module_name, shlex.join(cmd)) sys.exit(1) cmd = ["git", "-C", dst_dir, "checkout", "--quiet", git_ref] @@ -75,7 +83,12 @@ def git_do_checkout(module_name, work_dir, git_source, dst_dir, git_ref): stderr=subprocess.DEVNULL, ) except subprocess.CalledProcessError: - logging.error("Checkout of %s failed for %s", git_ref, module_name) + logging.error( + "Checkout of %s failed for %s: %s", + git_ref, + module_name, + shlex.join(cmd), + ) sys.exit(1) diff --git a/zephyr/zmake/zmake/project.py b/zephyr/zmake/zmake/project.py index 3c18520b55..2c91e27ba7 100644 --- a/zephyr/zmake/zmake/project.py +++ b/zephyr/zmake/zmake/project.py @@ -52,6 +52,20 @@ class ProjectConfig: default_factory=list ) project_dir: pathlib.Path = dataclasses.field(default_factory=pathlib.Path) + inherited_from: typing.Iterable[str] = dataclasses.field( + default_factory=list + ) + + @property + def full_name(self) -> str: + """Get the full project name, e.g. baseboard.variant""" + inherited_from = ( + [self.inherited_from] + if isinstance(self.inherited_from, str) + else self.inherited_from + ) + + return ".".join([*inherited_from, self.project_name]) class Project: @@ -198,12 +212,16 @@ class ProjectRegistrationHandler: Another ProjectRegistrationHandler. """ new_config = dataclasses.asdict(self.base_config) + new_config["inherited_from"] = [ + *self.base_config.inherited_from, + self.base_config.project_name, + ] + for key, value in kwargs.items(): if isinstance(value, list): new_config[key] = [*new_config[key], *value] else: new_config[key] = value - return self.register_func(**new_config) diff --git a/zephyr/zmake/zmake/zmake.py b/zephyr/zmake/zmake/zmake.py index 6b7f2b2ded..70988a12c5 100644 --- a/zephyr/zmake/zmake/zmake.py +++ b/zephyr/zmake/zmake/zmake.py @@ -483,11 +483,6 @@ class Zmake: if static_version else {} ), - **( - {"EXTRA_CFLAGS": "-save-temps=obj"} - if save_temps - else {} - ), }, ) if cmake_defs: @@ -521,6 +516,10 @@ class Zmake: base_config |= zmake.build_config.BuildConfig( kconfig_defs={"CONFIG_COVERAGE": "y"} ) + if save_temps: + base_config |= zmake.build_config.BuildConfig( + kconfig_defs={"CONFIG_COMPILER_SAVE_TEMPS": "y"} + ) if allow_warnings: base_config |= zmake.build_config.BuildConfig( cmake_defs={"ALLOW_WARNINGS": "ON"} |
