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| author | Louis Yung-Chieh Lo <yjlou@chromium.org> | 2013-12-17 14:42:18 -0800 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2013-12-19 02:33:37 +0000 |
| commit | 41876dca3eaa18a33a5655206424f09564345d2c (patch) | |
| tree | 875e11a949372f08789e3f3a8886a03795ea7a45 | |
| parent | 2d92547fbf92eb4934e377f82de804d9dd9daa90 (diff) | |
| download | chrome-ec-41876dca3eaa18a33a5655206424f09564345d2c.tar.gz | |
nyan: change the XPSHOLD waiting time
According to the nVidia power engineer, we shall wait for 40ms to see
XPSHOLD asserted after PMIC_PWRON_L is asserted.
Also change the code since it was obscured. Comments was out-of-sync too.
BUG=None
BRANCH=None
TEST=Verified on rev 3.12.
Change-Id: If479d8398f4008f0b029d450b3d28ac98cdf969f
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/180502
Reviewed-by: Randall Spangler <rspangler@chromium.org>
| -rw-r--r-- | power/tegra.c | 29 |
1 files changed, 8 insertions, 21 deletions
diff --git a/power/tegra.c b/power/tegra.c index 6e9960e7d3..28f3a892b5 100644 --- a/power/tegra.c +++ b/power/tegra.c @@ -69,14 +69,11 @@ */ #define DELAY_SHUTDOWN_ON_POWER_HOLD (10200 * MSEC) /* 10.2 seconds */ -/* Maximum delay after power button press before we deassert GPIO_PMIC_PWRON */ -#define DELAY_RELEASE_PWRON SECOND /* 1s */ - /* - * nyan's GPIO_SOC1V8_XPSHOLD will go low for ~20ms after initial high. - * XPSHOLD_DEBOUNCE is used to wait this long, then check the signal again. + * nyan's GPIO_SOC1V8_XPSHOLD will go low for 36~40ms after PMIC_PWRON_L is low. + * XPSHOLD_DEBOUNCE is waiting slightly longer. */ -#define XPSHOLD_DEBOUNCE (30 * 1000) /* 30 ms */ +#define XPSHOLD_TIMEOUT (50 * MSEC) /* 50 ms */ /* * The hold time for pulling down the PMIC_WARM_RESET_L pin so that @@ -510,23 +507,13 @@ static int wait_for_power_button_release(unsigned int timeout_us) } /** - * Wait for the XPSHOLD signal from the AP to be asserted within timeout_us - * and if asserted clear the PMIC_PWRON signal + * Wait for the XPSHOLD signal from the AP to be asserted. * - * @return 0 if ok, -1 if power button failed to release + * @return 0 if ok, -1 if XPSHOLD doesn't show up in time. */ -static int react_to_xpshold(unsigned int timeout_us) +static int wait_for_xpshold(void) { - /* wait for Power button release */ - wait_in_signal(GPIO_SOC1V8_XPSHOLD, 1, timeout_us); - -#ifdef BOARD_NYAN - /* - * nyan's GPIO_SOC1V8_XPSHOLD will go low for about 20ms after initial - * high. Wait XPSHOLD_DEBOUNCE time, then check the signal again. - */ - udelay(XPSHOLD_DEBOUNCE); -#endif + wait_in_signal(GPIO_SOC1V8_XPSHOLD, 1, XPSHOLD_TIMEOUT); if (gpio_get_level(GPIO_SOC1V8_XPSHOLD) == 0) { CPRINTF("[%T XPSHOLD not seen in time]\n"); @@ -610,7 +597,7 @@ void chipset_task(void) if (!power_on()) { int continue_power = 0; - if (!react_to_xpshold(DELAY_RELEASE_PWRON)) { + if (!wait_for_xpshold()) { /* AP looks good */ if (!wait_for_power_button_release( DELAY_SHUTDOWN_ON_POWER_HOLD)) |