diff options
| author | Barney_Liao <barney_liao@pegatron.corp-partner.google.com> | 2019-07-16 13:38:59 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-07-18 04:46:14 +0000 |
| commit | bb5f16bd8b4b20182b2b426f0c0fd2f7953fe004 (patch) | |
| tree | f647b93b5841cb1fb3468819ba7b8d87443fbed4 | |
| parent | aa5923a716aa155a1710ea85ef587a0c58711372 (diff) | |
| download | chrome-ec-bb5f16bd8b4b20182b2b426f0c0fd2f7953fe004.tar.gz | |
Helios:Initial Type-C Controller PS8751 setting
Setting Type-C Port1 controller register 0xE8 (High Speed Signal
Detector threshold adjustment) to 0x80 (-25%).
BUG=b:136531130
BRANCH=master
TEST=Manual
Check Type-C Port1 register 0xE8.
Change-Id: I5957fcd3389296500992ea3075dcde4a3b690f98
Signed-off-by: Barney_Liao <barney_liao@pegatron.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1703724
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
| -rw-r--r-- | board/helios/board.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/board/helios/board.c b/board/helios/board.c index 170818256a..e40833f2a9 100644 --- a/board/helios/board.c +++ b/board/helios/board.c @@ -387,3 +387,10 @@ void board_overcurrent_event(int port, int is_overcurrented) /* Note that the level is inverted because the pin is active low. */ gpio_set_level(GPIO_USB_C_OC_ODL, !is_overcurrented); } + +int board_tcpc_post_init(int port) +{ + return port == USB_PD_PORT_TCPC_1 ? + tcpc_write(port, PS8XXX_REG_MUX_USB_C2SS_HS_THRESHOLD, 0x80) : + EC_SUCCESS; +} |