diff options
| author | Dustin L. Howett <dustin@howett.net> | 2022-02-13 22:42:20 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-05-03 04:01:27 +0000 |
| commit | 4243cef7ca4755b6576ec930cbf5bc06e55e1497 (patch) | |
| tree | abe60f8a09a471739533c4c0c538336d097d5d4e | |
| parent | 8c00b75df04d7e7f25e47f08bf9b757226ade333 (diff) | |
| download | chrome-ec-4243cef7ca4755b6576ec930cbf5bc06e55e1497.tar.gz | |
ec_commands: Add a const for the MCHP MEC IO range
Some devices that use the CrOS EC only offer the eight I/O ports
required by the Microchip MEC series embedded controller chip via ACPI
or another mechanism.
While this constant is not used in the ec code itself, we should provide
documentation of this fact.
BUG=none
BRANCH=none
TEST=Built successfully
Signed-off-by: Dustin L. Howett <dustin@howett.net>
Change-Id: Ie99fb029334f1f35197be87185d1e842b7bbf4fb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3460548
Reviewed-by: Prashant Malani <pmalani@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
Tested-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
| -rw-r--r-- | include/ec_commands.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/include/ec_commands.h b/include/ec_commands.h index a226674907..2c13ba7391 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -106,10 +106,14 @@ extern "C" { /* * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff * and they tell the kernel that so we have to think of it as two parts. + * + * Other BIOSes report only the I/O port region spanned by the Microchip + * MEC series EC; an attempt to address a larger region may fail. */ -#define EC_HOST_CMD_REGION0 0x800 -#define EC_HOST_CMD_REGION1 0x880 -#define EC_HOST_CMD_REGION_SIZE 0x80 +#define EC_HOST_CMD_REGION0 0x800 +#define EC_HOST_CMD_REGION1 0x880 +#define EC_HOST_CMD_REGION_SIZE 0x80 +#define EC_HOST_CMD_MEC_REGION_SIZE 0x8 /* EC command register bit functions */ #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ |