osiris: Modify USB type-c configuration

Change C0 TCPM to PS8815
Change C1 PPC to syv682x
Change C0 usb_mux to PS8815
Remove C2 function
Remove intel BB retime

BUG=b:224423318
BRANCH=none
TEST=make BOARD=osiris
Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
Change-Id: I21492e5a4e792d4305c4a0e1bbf28f47907e61d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3601919
Reviewed-by: Boris Mittelberg <bmbm@google.com>

5 files changed, 45 insertions, 317 deletions

diff --git a/board/osiris/board.c b/board/osiris/board.c
index c0c6dc057d..cac0892afb 100644
--- a/board/osiris/board.c
+++ b/board/osiris/board.c
@@ -41,11 +41,7 @@ __override void board_cbi_init(void)
 static void board_chipset_resume(void)
 {
 	/* Allow keyboard backlight to be enabled */
-
-	if (get_board_id() == 1)
-		gpio_set_level(GPIO_ID_1_EC_KB_BL_EN, 1);
-	else
-		gpio_set_level(GPIO_EC_KB_BL_EN_L, 0);
+	gpio_set_level(GPIO_EC_KB_BL_EN_L, 0);
 }
 DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
 
@@ -53,24 +49,6 @@ DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
 static void board_chipset_suspend(void)
 {
 	/* Turn off the keyboard backlight if it's on. */
-
-	if (get_board_id() == 1)
-		gpio_set_level(GPIO_ID_1_EC_KB_BL_EN, 0);
-	else
-		gpio_set_level(GPIO_EC_KB_BL_EN_L, 1);
+	gpio_set_level(GPIO_EC_KB_BL_EN_L, 1);
 }
 DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);
-
-/*
- * Explicitly apply the board ID 1 *gpio.inc settings to pins that
- * were reassigned on current boards.
- */
-
-static void set_board_id_1_gpios(void)
-{
-	if (get_board_id() != 1)
-		return;
-
-	gpio_set_flags(GPIO_ID_1_EC_KB_BL_EN, GPIO_OUT_LOW);
-}
-DECLARE_HOOK(HOOK_INIT, set_board_id_1_gpios, HOOK_PRIO_FIRST);
diff --git a/board/osiris/board.h b/board/osiris/board.h
index 17649117d9..5567ba7cd6 100644
--- a/board/osiris/board.h
+++ b/board/osiris/board.h
@@ -73,18 +73,16 @@
 #define USB_PORT_COUNT			1
 #define CONFIG_USB_PORT_POWER_DUMB
 
-/* USB Type C and USB PD defines */
-#define CONFIG_USB_PD_REQUIRE_AP_MODE_ENTRY
-
-#define CONFIG_IO_EXPANDER
-#define CONFIG_IO_EXPANDER_NCT38XX
-#define CONFIG_IO_EXPANDER_PORT_COUNT		4
+#undef CONFIG_USB_PD_TCPM_NCT38XX
+#define CONFIG_USB_PD_TCPM_PS8815 /* C0 and C1 */
 
 #define CONFIG_USB_PD_FRS_PPC
 
 #define CONFIG_USB_PD_TCPM_PS8815
 #define CONFIG_USB_PD_TCPM_PS8815_FORCE_DID
-#define CONFIG_USBC_RETIMER_INTEL_BB
+
+/* Retimer */
+#undef CONFIG_USBC_RETIMER_INTEL_BB
 
 /* I2C speed console command */
 #define CONFIG_CMD_I2C_SPEED
@@ -93,7 +91,6 @@
 #define CONFIG_HOSTCMD_I2C_CONTROL
 
 #define CONFIG_USBC_PPC_SYV682X
-#define CONFIG_USBC_PPC_NX20P3483
 
 /* TODO: b/177608416 - measure and check these values on osiris */
 #define PD_POWER_SUPPLY_TURN_ON_DELAY	30000 /* us */
@@ -172,21 +169,6 @@
 
 #define I2C_ADDR_MP2964_FLAGS	0x20
 
-/*
- * see b/174768555#comment22
- */
-#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR	0x56
-#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR	0x57
-
-/* Enabling Thunderbolt-compatible mode */
-#define CONFIG_USB_PD_TBT_COMPAT_MODE
-
-/* Enabling USB4 mode */
-#define CONFIG_USB_PD_USB4
-
-/* Retimer */
-#define CONFIG_USBC_RETIMER_FW_UPDATE
-
 /* Thermal features */
 #define CONFIG_THERMISTOR
 #define CONFIG_TEMP_SENSOR
@@ -228,14 +210,6 @@ enum sensor_id {
 	SENSOR_COUNT
 };
 
-enum ioex_port {
-	IOEX_C0_NCT38XX = 0,
-	IOEX_C2_NCT38XX,
-	IOEX_ID_1_C0_NCT38XX,
-	IOEX_ID_1_C2_NCT38XX,
-	IOEX_PORT_COUNT
-};
-
 enum battery_type {
 	BATTERY_AP19B8M,
 	BATTERY_TYPE_COUNT
diff --git a/board/osiris/gpio.inc b/board/osiris/gpio.inc
index e35ad8c723..cbb0ee78d3 100644
--- a/board/osiris/gpio.inc
+++ b/board/osiris/gpio.inc
@@ -31,9 +31,6 @@ GPIO_INT(USB_C0_RT_INT_ODL,              PIN(B, 1), GPIO_INT_FALLING, retimer_in
 GPIO_INT(USB_C1_BC12_INT_ODL,            PIN(5, 0), GPIO_INT_FALLING, bc12_interrupt)
 GPIO_INT(USB_C1_PPC_INT_ODL,             PIN(F, 5), GPIO_INT_FALLING, ppc_interrupt)
 GPIO_INT(USB_C1_TCPC_INT_ODL,            PIN(A, 2), GPIO_INT_FALLING, tcpc_alert_event)
-GPIO_INT(USB_C2_BC12_INT_ODL,            PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt)
-GPIO_INT(USB_C2_PPC_INT_ODL,             PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt)
-GPIO_INT(USB_C2_RT_INT_ODL,              PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt)
 
 /* USED GPIOs: */
 GPIO(CCD_MODE_ODL,                   PIN(E, 5), GPIO_INPUT)
@@ -119,14 +116,15 @@ ALTERNATE(PIN_MASK(0, 0x02), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW) /
 ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN1_L&GPID2/GPIOD2 */
 
 /* Unused Pins */
-UNUSED(PIN(E, 1))       /* GPIOE1 */
 UNUSED(PIN(D, 6))       /* GPOD6/CR_SOUT3/SHDF_ESPI_L */
 UNUSED(PIN(3, 2))       /* GPO32/TRIS_L */
 UNUSED(PIN(3, 4))       /* GPIO34 */
 UNUSED(PIN(3, 5))       /* GPO35/CR_SOUT4/TEST_L */
 UNUSED(PIN(6, 6))       /* GPIO66 */
 UNUSED(PIN(5, 7))       /* GPIO57/SER_IRQ/ESPI_ALERT_L */
-UNUSED(PIN(D, 4))       /* GPIOD4 */
+UNUSED(PIN(8, 3))       /* GPIO83 */
+UNUSED(PIN(7, 0))       /* GPIO70 */
+UNUSED(PIN(4, 1))       /* GPIO41 */
 
 
 /* Pre-configured PSL balls:  J8  K6 */
@@ -138,30 +136,8 @@ UNUSED(PIN(D, 4))       /* GPIOD4 */
  */
 GPIO(EC_KSO_02_INV,               PIN(1, 7), GPIO_OUT_LOW)
 
-/* Board ID 1 IO expander configuration */
+GPIO(USB_C0_OC_ODL,     PIN(D, 4), GPIO_ODR_HIGH)
+GPIO(USB_C0_FRS_EN,     PIN(6, 0), GPIO_LOW)
+GPIO(USB_C0_RT_RST_ODL, PIN(C, 2), GPIO_ODR_LOW)
 
-IOEX(ID_1_USB_C0_RT_RST_ODL, EXPIN(IOEX_ID_1_C0_NCT38XX, 0, 2), GPIO_ODR_LOW)
-/* GPIO03_P1 to PU */
-IOEX(ID_1_USB_C0_FRS_EN,     EXPIN(IOEX_ID_1_C0_NCT38XX, 0, 4), GPIO_LOW)
-IOEX(ID_1_USB_C0_OC_ODL,     EXPIN(IOEX_ID_1_C0_NCT38XX, 0, 6), GPIO_ODR_HIGH)
-/* GPIO07_P1 to PU */
-
-IOEX(ID_1_USB_C2_RT_RST_ODL, EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 2), GPIO_ODR_LOW)
-/* GPIO03_P2 to PU */
-IOEX(ID_1_USB_C2_FRS_EN,     EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 4), GPIO_LOW)
-IOEX(ID_1_USB_C1_OC_ODL,     EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 6), GPIO_ODR_HIGH)
-IOEX(ID_1_USB_C2_OC_ODL,     EXPIN(IOEX_ID_1_C2_NCT38XX, 0, 7), GPIO_ODR_HIGH)
-
-/* Board ID 2 IO expander configuration */
-
-/* GPIO02_P2 to PU */
-/* GPIO03_P2 to PU */
-IOEX(USB_C0_OC_ODL,          EXPIN(IOEX_C0_NCT38XX, 0, 4), GPIO_ODR_HIGH)
-IOEX(USB_C0_FRS_EN,          EXPIN(IOEX_C0_NCT38XX, 0, 6), GPIO_OUT_LOW)
-IOEX(USB_C0_RT_RST_ODL,      EXPIN(IOEX_C0_NCT38XX, 0, 7), GPIO_ODR_LOW)
-
-IOEX(USB_C2_RT_RST_ODL,      EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW)
-IOEX(USB_C1_OC_ODL,          EXPIN(IOEX_C2_NCT38XX, 0, 3), GPIO_ODR_HIGH)
-IOEX(USB_C2_OC_ODL,          EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_ODR_HIGH)
-IOEX(USB_C2_FRS_EN,          EXPIN(IOEX_C2_NCT38XX, 0, 6), GPIO_OUT_LOW)
-/* GPIO07_P2 to PU */
+GPIO(USB_C1_OC_ODL,     PIN(E, 1), GPIO_ODR_HIGH)
\ No newline at end of file
diff --git a/board/osiris/usbc_config.c b/board/osiris/usbc_config.c
index ecaf2df5e4..b9c2258d61 100644
--- a/board/osiris/usbc_config.c
+++ b/board/osiris/usbc_config.c
@@ -13,10 +13,7 @@
 #include "compile_time_macros.h"
 #include "console.h"
 #include "driver/bc12/pi3usb9201_public.h"
-#include "driver/ppc/nx20p348x.h"
 #include "driver/ppc/syv682x_public.h"
-#include "driver/retimer/bb_retimer_public.h"
-#include "driver/tcpm/nct38xx.h"
 #include "driver/tcpm/ps8xxx_public.h"
 #include "driver/tcpm/tcpci.h"
 #include "ec_commands.h"
@@ -39,27 +36,19 @@
 #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
 #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
 
-#ifdef CONFIG_ZEPHYR
-enum ioex_port {
-	IOEX_C0_NCT38XX = 0,
-	IOEX_C2_NCT38XX,
-	IOEX_ID_1_C0_NCT38XX,
-	IOEX_ID_1_C2_NCT38XX,
-	IOEX_PORT_COUNT
-};
-#endif /* CONFIG_ZEPHYR */
-
 /* USBC TCPC configuration */
 const struct tcpc_config_t tcpc_config[] = {
 	[USBC_PORT_C0] = {
 		.bus_type = EC_BUS_TYPE_I2C,
 		.i2c_info = {
 			.port = I2C_PORT_USB_C0_C2_TCPC,
-			.addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
+			.addr_flags = PS8XXX_I2C_ADDR1_FLAGS,
 		},
-		.drv = &nct38xx_tcpm_drv,
+		.drv = &ps8xxx_tcpm_drv,
 		.flags = TCPC_FLAGS_TCPCI_REV2_0 |
-			TCPC_FLAGS_NO_DEBUG_ACC_CONTROL,
+			 TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V |
+			 TCPC_FLAGS_CONTROL_VCONN |
+			 TCPC_FLAGS_CONTROL_FRS,
 	},
 	[USBC_PORT_C1] = {
 		.bus_type = EC_BUS_TYPE_I2C,
@@ -73,15 +62,6 @@ const struct tcpc_config_t tcpc_config[] = {
 			 TCPC_FLAGS_CONTROL_VCONN |
 			 TCPC_FLAGS_CONTROL_FRS,
 	},
-	[USBC_PORT_C2] = {
-		.bus_type = EC_BUS_TYPE_I2C,
-		.i2c_info = {
-			.port = I2C_PORT_USB_C0_C2_TCPC,
-			.addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS,
-		},
-		.drv = &nct38xx_tcpm_drv,
-		.flags = TCPC_FLAGS_TCPCI_REV2_0,
-	},
 };
 BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT);
 BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT);
@@ -103,19 +83,11 @@ struct ppc_config_t ppc_chips[] = {
 	[USBC_PORT_C0] = {
 		.i2c_port = I2C_PORT_USB_C0_C2_PPC,
 		.i2c_addr_flags = SYV682X_ADDR0_FLAGS,
-		.frs_en = IOEX_USB_C0_FRS_EN,
 		.drv = &syv682x_drv,
 	},
 	[USBC_PORT_C1] = {
-		/* Compatible with Silicon Mitus SM5360A */
 		.i2c_port = I2C_PORT_USB_C1_PPC,
-		.i2c_addr_flags = NX20P3483_ADDR2_FLAGS,
-		.drv = &nx20p348x_drv,
-	},
-	[USBC_PORT_C2] = {
-		.i2c_port = I2C_PORT_USB_C0_C2_PPC,
-		.i2c_addr_flags = SYV682X_ADDR2_FLAGS,
-		.frs_en = IOEX_USB_C2_FRS_EN,
+		.i2c_addr_flags = SYV682X_ADDR0_FLAGS,
 		.drv = &syv682x_drv,
 	},
 };
@@ -123,23 +95,19 @@ BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT);
 
 unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
 
-/* USBC mux configuration - Alder Lake includes internal mux */
-static const struct usb_mux usbc0_tcss_usb_mux = {
-	.usb_port = USBC_PORT_C0,
-	.driver = &virtual_usb_mux_driver,
-	.hpd_update = &virtual_hpd_update,
-};
-static const struct usb_mux usbc2_tcss_usb_mux = {
-	.usb_port = USBC_PORT_C2,
-	.driver = &virtual_usb_mux_driver,
-	.hpd_update = &virtual_hpd_update,
-};
 
 /*
- * USB3 DB mux configuration - the top level mux still needs to be set
+ * USB3 MB/DB mux configuration - the top level mux still needs to be set
  * to the virtual_usb_mux_driver so the AP gets notified of mux changes
  * and updates the TCSS configuration on state changes.
  */
+
+static const struct usb_mux usbc0_usb3_mb_retimer = {
+	.usb_port = USBC_PORT_C0,
+	.driver = &tcpci_tcpm_usb_mux_driver,
+	.hpd_update = &ps8xxx_tcpc_update_hpd_status,
+};
+
 static const struct usb_mux usbc1_usb3_db_retimer = {
 	.usb_port = USBC_PORT_C1,
 	.driver = &tcpci_tcpm_usb_mux_driver,
@@ -148,12 +116,11 @@ static const struct usb_mux usbc1_usb3_db_retimer = {
 
 const struct usb_mux usb_muxes[] = {
 	[USBC_PORT_C0] = {
+		/* PS8815 MB */
 		.usb_port = USBC_PORT_C0,
-		.driver = &bb_usb_retimer,
-		.hpd_update = bb_retimer_hpd_update,
-		.i2c_port = I2C_PORT_USB_C0_C2_MUX,
-		.i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR,
-		.next_mux = &usbc0_tcss_usb_mux,
+		.driver = &virtual_usb_mux_driver,
+		.hpd_update = &virtual_hpd_update,
+		.next_mux = &usbc0_usb3_mb_retimer,
 	},
 	[USBC_PORT_C1] = {
 		/* PS8815 DB */
@@ -162,18 +129,9 @@ const struct usb_mux usb_muxes[] = {
 		.hpd_update = &virtual_hpd_update,
 		.next_mux = &usbc1_usb3_db_retimer,
 	},
-	[USBC_PORT_C2] = {
-		.usb_port = USBC_PORT_C2,
-		.driver = &bb_usb_retimer,
-		.hpd_update = bb_retimer_hpd_update,
-		.i2c_port = I2C_PORT_USB_C0_C2_MUX,
-		.i2c_addr_flags = USBC_PORT_C2_BB_RETIMER_I2C_ADDR,
-		.next_mux = &usbc2_tcss_usb_mux,
-	},
 };
 BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT);
 
-#ifndef CONFIG_ZEPHYR
 /* BC1.2 charger detect configuration */
 const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
 	[USBC_PORT_C0] = {
@@ -182,52 +140,11 @@ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = {
 	},
 	[USBC_PORT_C1] = {
 		.i2c_port = I2C_PORT_USB_C1_BC12,
-		.i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS,
-	},
-	[USBC_PORT_C2] = {
-		.i2c_port = I2C_PORT_USB_C0_C2_BC12,
-		.i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS,
+		.i2c_addr_flags = PI3USB9201_I2C_ADDR_2_FLAGS,
 	},
 };
 BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT);
 
-/*
- * USB C0 and C2 uses burnside bridge chips and have their reset
- * controlled by their respective TCPC chips acting as GPIO expanders.
- *
- * ioex_init() is normally called before we take the TCPCs out of
- * reset, so we need to start in disabled mode, then explicitly
- * call ioex_init().
- */
-
-struct ioexpander_config_t ioex_config[] = {
-	[IOEX_C0_NCT38XX] = {
-		.i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
-		.i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
-		.drv = &nct38xx_ioexpander_drv,
-		.flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED,
-	},
-	[IOEX_C2_NCT38XX] = {
-		.i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
-		.i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS,
-		.drv = &nct38xx_ioexpander_drv,
-		.flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED,
-	},
-	[IOEX_ID_1_C0_NCT38XX] = {
-		.i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
-		.i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
-		.drv = &nct38xx_ioexpander_drv,
-		.flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED,
-	},
-	[IOEX_ID_1_C2_NCT38XX] = {
-		.i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
-		.i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS,
-		.drv = &nct38xx_ioexpander_drv,
-		.flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED,
-	},
-};
-BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT);
-#endif /* !CONFIG_ZEPHYR */
 
 #ifdef CONFIG_CHARGE_RAMP_SW
 
@@ -274,84 +191,13 @@ void config_usb_db_type(void)
 	CPRINTS("Configured USB DB type number is %d", db_type);
 }
 
-__override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
-{
-	enum ioex_signal rst_signal;
-
-	if (me->usb_port == USBC_PORT_C0) {
-/* TODO: explore how to handle board id in zephyr*/
-#ifndef CONFIG_ZEPHYR
-		if (get_board_id() == 1)
-			rst_signal = IOEX_ID_1_USB_C0_RT_RST_ODL;
-		else
-#endif /* !CONFIG_ZEPHYR */
-			rst_signal = IOEX_USB_C0_RT_RST_ODL;
-	} else if (me->usb_port == USBC_PORT_C2) {
-/* TODO: explore how to handle board id in zephyr*/
-#ifndef CONFIG_ZEPHYR
-		if (get_board_id() == 1)
-			rst_signal = IOEX_ID_1_USB_C2_RT_RST_ODL;
-		else
-#endif /* !CONFIG_ZEPHYR */
-			rst_signal = IOEX_USB_C2_RT_RST_ODL;
-	} else {
-		return EC_ERROR_INVAL;
-	}
-
-	/*
-	 * We do not have a load switch for the burnside bridge chips,
-	 * so we only need to sequence reset.
-	 */
-
-	if (enable) {
-		/*
-		 * Tpw, minimum time from VCC to RESET_N de-assertion is 100us.
-		 * For boards that don't provide a load switch control, the
-		 * retimer_init() function ensures power is up before calling
-		 * this function.
-		 */
-		ioex_set_level(rst_signal, 1);
-		/*
-		 * Allow 1ms time for the retimer to power up lc_domain
-		 * which powers I2C controller within retimer
-		 */
-		msleep(1);
-		if (get_board_id() == 1) {
-			int val;
-
-			/*
-			 * Check if we were able to deassert
-			 * reset. Board ID 1 uses a GPIO that is
-			 * uncontrollable when a debug accessory is
-			 * connected.
-			 */
-			if (ioex_get_level(rst_signal, &val) != EC_SUCCESS)
-				return EC_ERROR_UNKNOWN;
-			if (val != 1)
-				return EC_ERROR_NOT_POWERED;
-		}
-	} else {
-		ioex_set_level(rst_signal, 0);
-		msleep(1);
-	}
-	return EC_SUCCESS;
-}
-
 void board_reset_pd_mcu(void)
 {
-	enum gpio_signal tcpc_rst;
-
-	tcpc_rst = GPIO_USB_C0_C2_TCPC_RST_ODL;
-
 	/*
 	 * TODO(b/179648104): figure out correct timing
 	 */
-
-	gpio_set_level(tcpc_rst, 0);
-	if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
-		gpio_set_level(GPIO_USB_C1_RST_ODL, 0);
-		gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
-	}
+	gpio_set_level(GPIO_USB_C1_RST_ODL, 0);
+	gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
 
 	/*
 	 * delay for power-on to reset-off and min. assertion time
@@ -359,11 +205,8 @@ void board_reset_pd_mcu(void)
 
 	msleep(20);
 
-	gpio_set_level(tcpc_rst, 1);
-	if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
-		gpio_set_level(GPIO_USB_C1_RST_ODL, 1);
-		gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
-	}
+	gpio_set_level(GPIO_USB_C1_RST_ODL, 1);
+	gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
 
 	/* wait for chips to come up */
 
@@ -376,39 +219,18 @@ static void board_tcpc_init(void)
 	if (!system_jumped_late())
 		board_reset_pd_mcu();
 
-	/*
-	 * These IO expander pins are implemented using the
-	 * C0/C2 TCPC, so they must be set up after the TCPC has
-	 * been taken out of reset.
-	 */
-	if (get_board_id() == 1) {
-		ioex_init(IOEX_ID_1_C0_NCT38XX);
-		ioex_init(IOEX_ID_1_C2_NCT38XX);
-	} else {
-		ioex_init(IOEX_C0_NCT38XX);
-		ioex_init(IOEX_C2_NCT38XX);
-	}
-
 	/* Enable PPC interrupts. */
 	gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL);
-	gpio_enable_interrupt(GPIO_USB_C2_PPC_INT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
 
 	/* Enable TCPC interrupts. */
 	gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
 
-#ifndef CONFIG_ZEPHYR
 	/* Enable BC1.2 interrupts. */
 	gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL);
-	gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL);
-#endif /* !CONFIG_ZEPHYR */
+	gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL);
 
-	if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
-		gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
-		gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
-#ifndef CONFIG_ZEPHYR
-		gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL);
-#endif /* !CONFIG_ZEPHYR */
-	}
 }
 DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET);
 
@@ -417,10 +239,9 @@ uint16_t tcpc_get_alert_status(void)
 	uint16_t status = 0;
 
 	if (gpio_get_level(GPIO_USB_C0_C2_TCPC_INT_ODL) == 0)
-		status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2;
+		status |= PD_STATUS_TCPC_ALERT_0;
 
-	if ((ec_cfg_usb_db_type() != DB_USB_ABSENT) &&
-	    gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0)
+	if (gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0)
 		status |= PD_STATUS_TCPC_ALERT_1;
 
 	return status;
@@ -430,11 +251,8 @@ int ppc_get_alert_status(int port)
 {
 	if (port == USBC_PORT_C0)
 		return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0;
-	else if ((port == USBC_PORT_C1) &&
-		 (ec_cfg_usb_db_type() != DB_USB_ABSENT))
+	else if (port == USBC_PORT_C1)
 		return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0;
-	else if (port == USBC_PORT_C2)
-		return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0;
 	return 0;
 }
 
@@ -445,8 +263,6 @@ void tcpc_alert_event(enum gpio_signal signal)
 		schedule_deferred_pd_interrupt(USBC_PORT_C0);
 		break;
 	case GPIO_USB_C1_TCPC_INT_ODL:
-		if (ec_cfg_usb_db_type() == DB_USB_ABSENT)
-			break;
 		schedule_deferred_pd_interrupt(USBC_PORT_C1);
 		break;
 	default:
@@ -461,8 +277,6 @@ void bc12_interrupt(enum gpio_signal signal)
 		task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12);
 		break;
 	case GPIO_USB_C1_BC12_INT_ODL:
-		if (ec_cfg_usb_db_type() == DB_USB_ABSENT)
-			break;
 		task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12);
 		break;
 	default:
@@ -477,17 +291,7 @@ void ppc_interrupt(enum gpio_signal signal)
 		syv682x_interrupt(USBC_PORT_C0);
 		break;
 	case GPIO_USB_C1_PPC_INT_ODL:
-		switch (ec_cfg_usb_db_type()) {
-		case DB_USB_ABSENT:
-		case DB_USB_ABSENT2:
-			break;
-		case DB_USB3_PS8815:
-			nx20p348x_interrupt(USBC_PORT_C1);
-			break;
-		}
-		break;
-	case GPIO_USB_C2_PPC_INT_ODL:
-		syv682x_interrupt(USBC_PORT_C2);
+		syv682x_interrupt(USBC_PORT_C1);
 		break;
 	default:
 		break;
@@ -508,9 +312,6 @@ __override bool board_is_dts_port(int port)
 
 __override bool board_is_tbt_usb4_port(int port)
 {
-	if (port == USBC_PORT_C0 || port == USBC_PORT_C2)
-		return true;
-
 	return false;
 }
 
diff --git a/board/osiris/usbc_config.h b/board/osiris/usbc_config.h
index c44f9779b5..3ea16a6d56 100644
--- a/board/osiris/usbc_config.h
+++ b/board/osiris/usbc_config.h
@@ -9,13 +9,12 @@
 #define __CROS_EC_USBC_CONFIG_H
 
 #ifndef CONFIG_ZEPHYR
-#define CONFIG_USB_PD_PORT_MAX_COUNT	3
+#define CONFIG_USB_PD_PORT_MAX_COUNT	2
 #endif
 
 enum usbc_port {
 	USBC_PORT_C0 = 0,
 	USBC_PORT_C1,
-	USBC_PORT_C2,
 	USBC_PORT_COUNT
 };