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author | Hung-Te Lin <hungte@chromium.org> | 2020-12-22 09:26:23 +0000 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-12-22 14:34:20 +0000 |
commit | d3dde4c56d3b00564087025032485495ddd18b75 (patch) | |
tree | c66d25767b6295f1e2819cc456b4d4c672327631 | |
parent | 0822de05d8fe9cada1329991a5edc1a0eb3ea544 (diff) | |
download | chrome-ec-d3dde4c56d3b00564087025032485495ddd18b75.tar.gz |
Revert "npcx9: remove unnecessary default CONFIGs for internal flash"
This reverts commit a3dd3c3a941794bd6efcdfac0b70bfae7441ed29.
Reason for revert: chromium:1161113
board/npcx9_evb/board.c:103:4:error:
CONFIG_SPI_FLASH_PORTundeclared here
Original change's description:
> npcx9: remove unnecessary default CONFIGs for internal flash
>
> In npcx9, the internal flash is accessed via FIU/UMA (implementing in
> chip/npcx/flash.c). It won’t use the common/spi_flash.c to access the
> internal flash. Let’s remove these two default CONFIGs to prevent
> people from confusing.
>
> BRANCH=none
> BUG=b:165777478
> TEST=buildall pass
>
> Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
> Signed-off-by: CHLin <CHLin56@nuvoton.com>
> Change-Id: Id04dc9ff5402262b5cdf0815ae953ced777b5d96
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597124
> Reviewed-by: caveh jalali <caveh@chromium.org>
Bug: chromium:1161113
Change-Id: I57fb92418e71f8ce0ffd77bad34d4e5055552af1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2600713
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
Auto-Submit: Hung-Te Lin <hungte@chromium.org>
-rw-r--r-- | chip/npcx/config_chip-npcx9.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/chip/npcx/config_chip-npcx9.h b/chip/npcx/config_chip-npcx9.h index a13723f980..9f7b0f52d0 100644 --- a/chip/npcx/config_chip-npcx9.h +++ b/chip/npcx/config_chip-npcx9.h @@ -98,6 +98,8 @@ #endif /* Internal spi-flash setting */ +#define CONFIG_SPI_FLASH_PORT 0 +#define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q40 /* Internal spi flash type */ #define CONFIG_FLASH_SIZE 0x00080000 /* 512 KB internal spi flash */ |