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| author | Gerrit <chrome-bot@google.com> | 2012-05-22 15:50:09 -0700 |
|---|---|---|
| committer | Gerrit Code Review <gerrit@gerrit.golo.chromium.org> | 2012-05-22 15:50:09 -0700 |
| commit | 8b468a8a269a79b6af075c4872649524ff6841a0 (patch) | |
| tree | b60e30f6aa28c10365a2af273ad2d5b29997bdf7 | |
| parent | 37732ced8c49985489152363e795ef8712924951 (diff) | |
| parent | 4a7774c1226b5af2ae99d753902be4a84e55955f (diff) | |
| download | chrome-ec-8b468a8a269a79b6af075c4872649524ff6841a0.tar.gz | |
Merge "stm32: ensure I2C properly behave after sysjump"
| -rw-r--r-- | chip/stm32/i2c.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/chip/stm32/i2c.c b/chip/stm32/i2c.c index 2ccecdba16..e1018ed31b 100644 --- a/chip/stm32/i2c.c +++ b/chip/stm32/i2c.c @@ -176,6 +176,12 @@ static int i2c_init2(void) /* enable I2C2 clock */ STM32_RCC_APB1ENR |= 1 << 22; + /* force reset if the bus is stuck in BUSY state */ + if (STM32_I2C_SR2(I2C2) & 0x2) { + STM32_I2C_CR1(I2C2) = 0x8000; + STM32_I2C_CR1(I2C2) = 0x0000; + } + /* set clock configuration : standard mode (100kHz) */ STM32_I2C_CCR(I2C2) = I2C_CCR; |